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From: "Nicholas Piggin" <npiggin@gmail.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>, qemu-devel@nongnu.org
Cc: "Song Gao" <gaosong@loongson.cn>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Greg Kurz" <groug@kaod.org>,
	"Aurelien Jarno" <aurelien@aurel32.net>,
	qemu-ppc@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
	"Daniel Henrique Barboza" <danielhb413@gmail.com>,
	"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"David Gibson" <david@gibson.dropbear.id.au>,
	"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Yoshinori Sato" <ysato@users.sourceforge.jp>,
	"Xiaojuan Yang" <yangxiaojuan@loongson.cn>,
	qemu-arm@nongnu.org
Subject: Re: [PATCH 07/12] target/ppc: Use generic hrev64_i64() in BRH / BSWAP16x8 opcodes
Date: Fri, 25 Aug 2023 17:38:31 +1000	[thread overview]
Message-ID: <CV1GDHA1R3DJ.1LZ6DG73V2VVU@wheely> (raw)
In-Reply-To: <20230822125332.55086-1-philmd@linaro.org>

On Tue Aug 22, 2023 at 10:53 PM AEST, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>  target/ppc/translate.c              | 10 +---------
>  target/ppc/translate/vsx-impl.c.inc | 19 ++-----------------
>  2 files changed, 3 insertions(+), 26 deletions(-)
>
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index 74796ec7ba..91a9ec2d1c 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -6435,15 +6435,7 @@ static void gen_brw(DisasContext *ctx)
>  /* brh */
>  static void gen_brh(DisasContext *ctx)
>  {
> -    TCGv_i64 mask = tcg_constant_i64(0x00ff00ff00ff00ffull);
> -    TCGv_i64 t1 = tcg_temp_new_i64();
> -    TCGv_i64 t2 = tcg_temp_new_i64();
> -
> -    tcg_gen_shri_i64(t1, cpu_gpr[rS(ctx->opcode)], 8);
> -    tcg_gen_and_i64(t2, t1, mask);
> -    tcg_gen_and_i64(t1, cpu_gpr[rS(ctx->opcode)], mask);
> -    tcg_gen_shli_i64(t1, t1, 8);
> -    tcg_gen_or_i64(cpu_gpr[rA(ctx->opcode)], t1, t2);
> +    tcg_gen_hrev64_i64(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]);
>  }
>  #endif
>  
> diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc
> index 0f5b0056f1..639ab7f1bc 100644
> --- a/target/ppc/translate/vsx-impl.c.inc
> +++ b/target/ppc/translate/vsx-impl.c.inc
> @@ -154,23 +154,8 @@ static void gen_lxvdsx(DisasContext *ctx)
>  static void gen_bswap16x8(TCGv_i64 outh, TCGv_i64 outl,
>                            TCGv_i64 inh, TCGv_i64 inl)
>  {
> -    TCGv_i64 mask = tcg_constant_i64(0x00FF00FF00FF00FF);
> -    TCGv_i64 t0 = tcg_temp_new_i64();
> -    TCGv_i64 t1 = tcg_temp_new_i64();
> -
> -    /* outh = ((inh & mask) << 8) | ((inh >> 8) & mask) */
> -    tcg_gen_and_i64(t0, inh, mask);
> -    tcg_gen_shli_i64(t0, t0, 8);
> -    tcg_gen_shri_i64(t1, inh, 8);
> -    tcg_gen_and_i64(t1, t1, mask);
> -    tcg_gen_or_i64(outh, t0, t1);
> -
> -    /* outl = ((inl & mask) << 8) | ((inl >> 8) & mask) */
> -    tcg_gen_and_i64(t0, inl, mask);
> -    tcg_gen_shli_i64(t0, t0, 8);
> -    tcg_gen_shri_i64(t1, inl, 8);
> -    tcg_gen_and_i64(t1, t1, mask);
> -    tcg_gen_or_i64(outl, t0, t1);
> +    tcg_gen_hrev64_i64(outh, inh);
> +    tcg_gen_hrev64_i64(outl, inl);
>  }
>  
>  static void gen_bswap32x4(TCGv_i64 outh, TCGv_i64 outl,

Reviewed-by: Nicholas Piggin <npiggin@gmail.com>


  parent reply	other threads:[~2023-08-25  7:39 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-22 12:40 [PATCH 00/12] tcg: Factor hrev{32,64}_{i32,i64,tl} out Philippe Mathieu-Daudé
2023-08-22 12:40 ` [PATCH 01/12] tcg/tcg-op: Factor tcg_gen_hrev32_i32() out Philippe Mathieu-Daudé
2023-08-22 12:40 ` [PATCH 02/12] target/arm: Use generic hrev32_i32() in ARM REV16 and VREV16 opcodes Philippe Mathieu-Daudé
2023-08-22 12:40 ` [PATCH 03/12] target/cris: Use generic hrev32_i32() in SWAPB opcode Philippe Mathieu-Daudé
2023-08-22 13:27   ` Philippe Mathieu-Daudé
2023-08-22 12:40 ` [PATCH 04/12] target/rx: Use generic hrev32_i32() in REVW opcode Philippe Mathieu-Daudé
2023-08-22 12:40 ` [PATCH 05/12] tcg/tcg-op: Factor tcg_gen_hrev64_i64() out Philippe Mathieu-Daudé
2023-08-22 12:46 ` [PATCH 10/12] target/arm: Use generic hrev_i64() in Aarch64 REV16 opcode Philippe Mathieu-Daudé
2023-08-22 12:47 ` [PATCH 09/12] tcg/tcg-op: Add tcg_gen_hrev32_i64() and tcg_gen_hrev_i64() Philippe Mathieu-Daudé
2023-08-22 12:51 ` [PATCH 08/12] target/loongarch: Use generic hrev64_i64() in REVB.4H opcode Philippe Mathieu-Daudé
2023-08-22 13:28   ` Philippe Mathieu-Daudé
2023-08-22 14:02     ` Philippe Mathieu-Daudé
2023-08-22 12:52 ` [PATCH 11/12] target/loongarch: Use generic hrev64_i32() in REVB.2H opcode Philippe Mathieu-Daudé
2023-08-22 13:30   ` Philippe Mathieu-Daudé
2023-08-22 16:11     ` Philippe Mathieu-Daudé
2023-08-22 17:04       ` Richard Henderson
2023-08-22 12:53 ` [PATCH 07/12] target/ppc: Use generic hrev64_i64() in BRH / BSWAP16x8 opcodes Philippe Mathieu-Daudé
2023-08-22 19:35   ` Daniel Henrique Barboza
2023-08-25  7:38   ` Nicholas Piggin [this message]
2023-08-22 12:57 ` [PATCH 06/12] target/mips: Use generic hrev64_i64() in DSBH opcode Philippe Mathieu-Daudé
2023-08-22 12:57 ` [PATCH 12/12] target/mips: Use generic hrev32_tl() in WSBH opcode Philippe Mathieu-Daudé
2023-08-22 15:42   ` Richard Henderson
2023-08-22 16:59     ` Philippe Mathieu-Daudé
2023-08-22 15:37 ` [PATCH 00/12] tcg: Factor hrev{32,64}_{i32,i64,tl} out Richard Henderson
2023-08-25  7:58 ` Nicholas Piggin

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