Re: [PATCH v5 3/5] ppc/pseries: Add Power11 cpu type

["Nicholas Piggin" <npiggin@gmail.com>]

On Thu Jun 6, 2024 at 10:16 PM AEST, Aditya Gupta wrote:
> Add sPAPR CPU Core definition for Power11
>
> Cc: David Gibson <david@gibson.dropbear.id.au> (reviewer:sPAPR (pseries))
> Cc: Harsh Prateek Bora <harshpb@linux.ibm.com> (reviewer:sPAPR (pseries))
> Cc: Cédric Le Goater <clg@kaod.org>
> Cc: Daniel Henrique Barboza <danielhb413@gmail.com>
> Cc: Frédéric Barrat <fbarrat@linux.ibm.com>
> Cc: Harsh Prateek Bora <harshpb@linux.ibm.com>
> Cc: Mahesh J Salgaonkar <mahesh@linux.ibm.com>
> Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
> Cc: Nicholas Piggin <npiggin@gmail.com>
> Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
> Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>

Reviewed-by: Nicholas Piggin <npiggin@gmail.com>

> ---
>  docs/system/ppc/pseries.rst | 17 +++++++++++++----
>  hw/ppc/spapr_cpu_core.c     |  1 +
>  2 files changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/docs/system/ppc/pseries.rst b/docs/system/ppc/pseries.rst
> index a876d897b6e4..bbc51aa7fcdb 100644
> --- a/docs/system/ppc/pseries.rst
> +++ b/docs/system/ppc/pseries.rst
> @@ -14,10 +14,19 @@ virtualization capabilities.
>  Supported devices
>  =================
>  
> - * Multi processor support for many Power processors generations: POWER7,
> -   POWER7+, POWER8, POWER8NVL, POWER9, and Power10. Support for POWER5+ exists,
> -   but its state is unknown.
> - * Interrupt Controller, XICS (POWER8) and XIVE (POWER9 and Power10)
> + * Multi processor support for many Power processors generations:
> +   - POWER7, POWER7+
> +   - POWER8, POWER8NVL
> +   - POWER9
> +   - Power10
> +   - Power11
> +   - Support for POWER5+ also exists, works with correct kernel/userspace
> + * Interrupt Controller
> +    - XICS (POWER8)
> +    - XIVE (Supported by below:)
> +        - POWER9
> +        - Power10
> +        - Power11
>   * vPHB PCIe Host bridge.
>   * vscsi and vnet devices, compatible with the same devices available on a
>     PowerVM hypervisor with VIOS managing LPARs.
> diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
> index e7c9edd033c8..62416b7e0a7e 100644
> --- a/hw/ppc/spapr_cpu_core.c
> +++ b/hw/ppc/spapr_cpu_core.c
> @@ -401,6 +401,7 @@ static const TypeInfo spapr_cpu_core_type_infos[] = {
>      DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
>      DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.2"),
>      DEFINE_SPAPR_CPU_CORE_TYPE("power10_v2.0"),
> +    DEFINE_SPAPR_CPU_CORE_TYPE("power11_v2.0"),
>  #ifdef CONFIG_KVM
>      DEFINE_SPAPR_CPU_CORE_TYPE("host"),
>  #endif