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From: "Nicholas Piggin" <npiggin@gmail.com>
To: "Aditya Gupta" <adityag@linux.ibm.com>,
	"Mahesh J Salgaonkar" <mahesh@linux.ibm.com>,
	"Madhavan Srinivasan" <maddy@linux.ibm.com>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Harsh Prateek Bora" <harshpb@linux.ibm.com>
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
	"Daniel Henrique Barboza" <danielhb413@gmail.com>,
	"Frédéric Barrat" <fbarrat@linux.ibm.com>
Subject: Re: [PATCH v5 2/5] target/ppc: Add Power11 DD2.0 processor
Date: Tue, 23 Jul 2024 15:27:43 +1000	[thread overview]
Message-ID: <D2WO4QRM304Q.3K1R34TJVQH12@gmail.com> (raw)
In-Reply-To: <20240606121657.254308-3-adityag@linux.ibm.com>

On Thu Jun 6, 2024 at 10:16 PM AEST, Aditya Gupta wrote:
> Add CPU target code to add support for new Power11 Processor.
>
> Power11 core is same as Power10, hence reuse functions defined for
> Power10.
>
> Cc: Cédric Le Goater <clg@kaod.org>
> Cc: Daniel Henrique Barboza <danielhb413@gmail.com>
> Cc: Frédéric Barrat <fbarrat@linux.ibm.com>
> Cc: Harsh Prateek Bora <harshpb@linux.ibm.com>
> Cc: Mahesh J Salgaonkar <mahesh@linux.ibm.com>
> Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
> Cc: Nicholas Piggin <npiggin@gmail.com>
> Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
> ---
>  target/ppc/compat.c     |  7 ++++++
>  target/ppc/cpu-models.c |  3 +++
>  target/ppc/cpu-models.h |  3 +++
>  target/ppc/cpu_init.c   | 54 +++++++++++++++++++++++++++++++++++++++++
>  4 files changed, 67 insertions(+)
>
> diff --git a/target/ppc/compat.c b/target/ppc/compat.c
> index ebef2cccecf3..12dd8ae290ca 100644
> --- a/target/ppc/compat.c
> +++ b/target/ppc/compat.c
> @@ -100,6 +100,13 @@ static const CompatInfo compat_table[] = {
>          .pcr_level = PCR_COMPAT_3_10,
>          .max_vthreads = 8,
>      },
> +    { /* POWER11, ISA3.10 */
> +        .name = "power11",
> +        .pvr = CPU_POWERPC_LOGICAL_3_10_PLUS,
> +        .pcr = PCR_COMPAT_3_10,
> +        .pcr_level = PCR_COMPAT_3_10,
> +        .max_vthreads = 8,
> +    },
>  };
>  
>  static const CompatInfo *compat_by_pvr(uint32_t pvr)
> diff --git a/target/ppc/cpu-models.c b/target/ppc/cpu-models.c
> index f2301b43f78b..ece348178188 100644
> --- a/target/ppc/cpu-models.c
> +++ b/target/ppc/cpu-models.c
> @@ -734,6 +734,8 @@
>                  "POWER9 v2.2")
>      POWERPC_DEF("power10_v2.0",  CPU_POWERPC_POWER10_DD20,           POWER10,
>                  "POWER10 v2.0")
> +    POWERPC_DEF("power11_v2.0",  CPU_POWERPC_POWER11_DD20,           POWER11,
> +                "POWER11_v2.0")
>  #endif /* defined (TARGET_PPC64) */
>  
>  /***************************************************************************/
> @@ -909,6 +911,7 @@ PowerPCCPUAlias ppc_cpu_aliases[] = {
>      { "power8nvl", "power8nvl_v1.0" },
>      { "power9", "power9_v2.2" },
>      { "power10", "power10_v2.0" },
> +    { "power11", "power11_v2.0" },
>  #endif
>  
>      /* Generic PowerPCs */
> diff --git a/target/ppc/cpu-models.h b/target/ppc/cpu-models.h
> index 0229ef3a9a5c..ef74e387b047 100644
> --- a/target/ppc/cpu-models.h
> +++ b/target/ppc/cpu-models.h
> @@ -354,6 +354,8 @@ enum {
>      CPU_POWERPC_POWER10_BASE       = 0x00800000,
>      CPU_POWERPC_POWER10_DD1        = 0x00801100,
>      CPU_POWERPC_POWER10_DD20       = 0x00801200,
> +    CPU_POWERPC_POWER11_BASE       = 0x00820000,
> +    CPU_POWERPC_POWER11_DD20       = 0x00821200,
>      CPU_POWERPC_970_v22            = 0x00390202,
>      CPU_POWERPC_970FX_v10          = 0x00391100,
>      CPU_POWERPC_970FX_v20          = 0x003C0200,
> @@ -391,6 +393,7 @@ enum {
>      CPU_POWERPC_LOGICAL_2_07       = 0x0F000004,
>      CPU_POWERPC_LOGICAL_3_00       = 0x0F000005,
>      CPU_POWERPC_LOGICAL_3_10       = 0x0F000006,
> +    CPU_POWERPC_LOGICAL_3_10_PLUS  = 0x0F000007,

_PLUS (or POWER7P etc) was a model name itself and had different
PVR and maybe different features in some cases, which is a bit
different to the situation here. Could be confusing to call this
_PLUS, so I would just call it _3_10_P11, as annoying as it is.

Thanks,
Nick


  parent reply	other threads:[~2024-07-23  5:28 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-06 12:16 [PATCH v5 0/5] Power11 support for QEMU [PSeries] Aditya Gupta
2024-06-06 12:16 ` [PATCH v5 1/5] target/ppc: reduce code duplication across Power9/10 init code Aditya Gupta
2024-07-23  4:21   ` Nicholas Piggin
2024-07-23  5:02     ` Aditya Gupta
2024-07-23  5:22   ` Nicholas Piggin
2024-07-23 15:13     ` Aditya Gupta
2024-07-24  4:16       ` Harsh Prateek Bora
2024-07-24  6:31     ` Aditya Gupta
2024-07-24  6:50     ` Aditya Gupta
2024-07-24 12:04       ` BALATON Zoltan
2024-06-06 12:16 ` [PATCH v5 2/5] target/ppc: Add Power11 DD2.0 processor Aditya Gupta
2024-07-23  4:30   ` Nicholas Piggin
2024-07-23  5:01     ` Aditya Gupta
2024-07-23  5:27   ` Nicholas Piggin [this message]
2024-06-06 12:16 ` [PATCH v5 3/5] ppc/pseries: Add Power11 cpu type Aditya Gupta
2024-07-23  4:34   ` Nicholas Piggin
2024-06-06 12:16 ` [PATCH v5 4/5] target/ppc: Introduce 'PowerPCCPUClass::logical_pvr' Aditya Gupta
2024-07-23  5:13   ` Nicholas Piggin
2024-07-23  5:42     ` Aditya Gupta
2024-06-06 12:16 ` [PATCH v5 5/5] target/ppc: Fix regression due to Power10 and Power11 having same PCR Aditya Gupta
2024-07-23  4:58   ` Nicholas Piggin
2024-07-23  5:08     ` Aditya Gupta
2024-06-06 12:22 ` [PATCH v5 0/5] Power11 support for QEMU [PSeries] Aditya Gupta
2024-07-22  9:12 ` Aditya Gupta

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