From: "Diederik de Haas" <didi.debian@cknow.org>
To: "Benjamin Gaignard" <benjamin.gaignard@collabora.com>,
<nicolas.dufresne@collabora.com>, <p.zabel@pengutronix.de>,
<mchehab@kernel.org>
Cc: <linux-media@vger.kernel.org>,
<linux-rockchip@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3] media: verisilicon: HEVC: Initialize start_bit field
Date: Mon, 20 Jan 2025 20:39:12 +0100 [thread overview]
Message-ID: <D775LAB5KL3Y.1NF80DZVT3G35@cknow.org> (raw)
In-Reply-To: <20250120153555.404806-1-benjamin.gaignard@collabora.com>
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On Mon Jan 20, 2025 at 4:35 PM CET, Benjamin Gaignard wrote:
> Always set start_bit field to 0, if not it could lead to corrupted frames
> specially when decoding VP9 bitstreams at the same time since VP9 driver
> set it for its own purpose.
>
> Fixes: cb5dd5a0fa51 ("media: hantro: Introduce G2/HEVC decoder")
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> Tested-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
> ---
> drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c b/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
> index 85a44143b378..0e212198dd65 100644
> --- a/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
> +++ b/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
> @@ -518,6 +518,7 @@ static void set_buffers(struct hantro_ctx *ctx)
> hantro_reg_write(vpu, &g2_stream_len, src_len);
> hantro_reg_write(vpu, &g2_strm_buffer_len, src_buf_len);
> hantro_reg_write(vpu, &g2_strm_start_offset, 0);
> + hantro_reg_write(vpu, &g2_start_bit, 0);
> hantro_reg_write(vpu, &g2_write_mvs_e, 1);
>
> hantro_write_addr(vpu, G2_TILE_SIZES_ADDR, ctx->hevc_dec.tile_sizes.dma);
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WARNING: multiple messages have this Message-ID (diff)
From: "Diederik de Haas" <didi.debian@cknow.org>
To: "Benjamin Gaignard" <benjamin.gaignard@collabora.com>,
<nicolas.dufresne@collabora.com>, <p.zabel@pengutronix.de>,
<mchehab@kernel.org>
Cc: <linux-media@vger.kernel.org>,
<linux-rockchip@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3] media: verisilicon: HEVC: Initialize start_bit field
Date: Mon, 20 Jan 2025 20:39:12 +0100 [thread overview]
Message-ID: <D775LAB5KL3Y.1NF80DZVT3G35@cknow.org> (raw)
In-Reply-To: <20250120153555.404806-1-benjamin.gaignard@collabora.com>
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On Mon Jan 20, 2025 at 4:35 PM CET, Benjamin Gaignard wrote:
> Always set start_bit field to 0, if not it could lead to corrupted frames
> specially when decoding VP9 bitstreams at the same time since VP9 driver
> set it for its own purpose.
>
> Fixes: cb5dd5a0fa51 ("media: hantro: Introduce G2/HEVC decoder")
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> Tested-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
> ---
> drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c b/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
> index 85a44143b378..0e212198dd65 100644
> --- a/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
> +++ b/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
> @@ -518,6 +518,7 @@ static void set_buffers(struct hantro_ctx *ctx)
> hantro_reg_write(vpu, &g2_stream_len, src_len);
> hantro_reg_write(vpu, &g2_strm_buffer_len, src_buf_len);
> hantro_reg_write(vpu, &g2_strm_start_offset, 0);
> + hantro_reg_write(vpu, &g2_start_bit, 0);
> hantro_reg_write(vpu, &g2_write_mvs_e, 1);
>
> hantro_write_addr(vpu, G2_TILE_SIZES_ADDR, ctx->hevc_dec.tile_sizes.dma);
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next prev parent reply other threads:[~2025-01-20 19:39 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-20 15:35 [PATCH v3] media: verisilicon: HEVC: Initialize start_bit field Benjamin Gaignard
2025-01-20 15:35 ` Benjamin Gaignard
2025-01-20 19:39 ` Diederik de Haas [this message]
2025-01-20 19:39 ` Diederik de Haas
2025-01-20 19:43 ` Diederik de Haas
2025-01-20 19:43 ` Diederik de Haas
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