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From: "Radim Krčmář" <rkrcmar@ventanamicro.com>
To: "Xu Lu" <luxu.kernel@bytedance.com>, <anup@brainfault.org>,
	<atish.patra@linux.dev>, <paul.walmsley@sifive.com>,
	<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>, <alex@ghiti.fr>
Cc: <kvm@vger.kernel.org>, <kvm-riscv@lists.infradead.org>,
	<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	"linux-riscv" <linux-riscv-bounces@lists.infradead.org>
Subject: Re: [PATCH] RISC-V: KVM: Delegate illegal instruction fault
Date: Fri, 20 Jun 2025 14:04:28 +0200	[thread overview]
Message-ID: <DARCHDIZG7IP.2VTEVNMVX8R1E@ventanamicro.com> (raw)
In-Reply-To: <20250620091720.85633-1-luxu.kernel@bytedance.com>

2025-06-20T17:17:20+08:00, Xu Lu <luxu.kernel@bytedance.com>:
> Delegate illegal instruction fault to VS mode in default to avoid such
> exceptions being trapped to HS and redirected back to VS.
>
> Signed-off-by: Xu Lu <luxu.kernel@bytedance.com>
> ---
> diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
> @@ -48,6 +48,7 @@
> +					 BIT(EXC_INST_ILLEGAL)    | \

You should also remove the dead code in kvm_riscv_vcpu_exit.

And why not delegate the others as well?
(EXC_LOAD_MISALIGNED, EXC_STORE_MISALIGNED, EXC_LOAD_ACCESS,
 EXC_STORE_ACCESS, and EXC_INST_ACCESS.)

Thanks.

-- 
kvm-riscv mailing list
kvm-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/kvm-riscv

WARNING: multiple messages have this Message-ID (diff)
From: "Radim Krčmář" <rkrcmar@ventanamicro.com>
To: "Xu Lu" <luxu.kernel@bytedance.com>, <anup@brainfault.org>,
	<atish.patra@linux.dev>, <paul.walmsley@sifive.com>,
	<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>, <alex@ghiti.fr>
Cc: <kvm@vger.kernel.org>, <kvm-riscv@lists.infradead.org>,
	<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	"linux-riscv" <linux-riscv-bounces@lists.infradead.org>
Subject: Re: [PATCH] RISC-V: KVM: Delegate illegal instruction fault
Date: Fri, 20 Jun 2025 14:04:28 +0200	[thread overview]
Message-ID: <DARCHDIZG7IP.2VTEVNMVX8R1E@ventanamicro.com> (raw)
In-Reply-To: <20250620091720.85633-1-luxu.kernel@bytedance.com>

2025-06-20T17:17:20+08:00, Xu Lu <luxu.kernel@bytedance.com>:
> Delegate illegal instruction fault to VS mode in default to avoid such
> exceptions being trapped to HS and redirected back to VS.
>
> Signed-off-by: Xu Lu <luxu.kernel@bytedance.com>
> ---
> diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
> @@ -48,6 +48,7 @@
> +					 BIT(EXC_INST_ILLEGAL)    | \

You should also remove the dead code in kvm_riscv_vcpu_exit.

And why not delegate the others as well?
(EXC_LOAD_MISALIGNED, EXC_STORE_MISALIGNED, EXC_LOAD_ACCESS,
 EXC_STORE_ACCESS, and EXC_INST_ACCESS.)

Thanks.

WARNING: multiple messages have this Message-ID (diff)
From: "Radim Krčmář" <rkrcmar@ventanamicro.com>
To: "Xu Lu" <luxu.kernel@bytedance.com>, <anup@brainfault.org>,
	<atish.patra@linux.dev>, <paul.walmsley@sifive.com>,
	<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>, <alex@ghiti.fr>
Cc: <kvm@vger.kernel.org>, <kvm-riscv@lists.infradead.org>,
	<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	"linux-riscv" <linux-riscv-bounces@lists.infradead.org>
Subject: Re: [PATCH] RISC-V: KVM: Delegate illegal instruction fault
Date: Fri, 20 Jun 2025 14:04:28 +0200	[thread overview]
Message-ID: <DARCHDIZG7IP.2VTEVNMVX8R1E@ventanamicro.com> (raw)
In-Reply-To: <20250620091720.85633-1-luxu.kernel@bytedance.com>

2025-06-20T17:17:20+08:00, Xu Lu <luxu.kernel@bytedance.com>:
> Delegate illegal instruction fault to VS mode in default to avoid such
> exceptions being trapped to HS and redirected back to VS.
>
> Signed-off-by: Xu Lu <luxu.kernel@bytedance.com>
> ---
> diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
> @@ -48,6 +48,7 @@
> +					 BIT(EXC_INST_ILLEGAL)    | \

You should also remove the dead code in kvm_riscv_vcpu_exit.

And why not delegate the others as well?
(EXC_LOAD_MISALIGNED, EXC_STORE_MISALIGNED, EXC_LOAD_ACCESS,
 EXC_STORE_ACCESS, and EXC_INST_ACCESS.)

Thanks.

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2025-06-20 12:57 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-20  9:17 [PATCH] RISC-V: KVM: Delegate illegal instruction fault Xu Lu
2025-06-20  9:17 ` Xu Lu
2025-06-20  9:17 ` Xu Lu
2025-06-20 12:04 ` Radim Krčmář [this message]
2025-06-20 12:04   ` Radim Krčmář
2025-06-20 12:04   ` Radim Krčmář
2025-06-22 10:11   ` [External] " Xu Lu
2025-06-22 10:11     ` Xu Lu
2025-06-22 10:11     ` Xu Lu
2025-06-23 10:04     ` Radim Krčmář
2025-06-23 10:04       ` Radim Krčmář
2025-06-23 10:04       ` Radim Krčmář
2025-06-23 10:29       ` Xu Lu
2025-06-23 10:29         ` Xu Lu
2025-06-23 10:29         ` Xu Lu
2025-06-23  8:04   ` Clément Léger
2025-06-23  8:04     ` Clément Léger
2025-06-23  8:04     ` Clément Léger
2025-06-23  9:54     ` Radim Krčmář
2025-06-23  9:54       ` Radim Krčmář
2025-06-23  9:54       ` Radim Krčmář
2025-06-23 12:12     ` [External] " Xu Lu
2025-06-23 12:12       ` Xu Lu
2025-06-23 12:12       ` Xu Lu
2025-06-23 12:35       ` Clément Léger
2025-06-23 12:35         ` Clément Léger
2025-06-23 12:35         ` Clément Léger
2025-06-23 13:30         ` Xu Lu
2025-06-23 13:30           ` Xu Lu
2025-06-23 13:30           ` Xu Lu
2025-06-23 13:42           ` Clément Léger
2025-06-23 13:42             ` Clément Léger
2025-06-23 13:42             ` Clément Léger
2025-06-23 14:09             ` Xu Lu
2025-06-23 14:09               ` Xu Lu
2025-06-23 14:09               ` Xu Lu
2025-06-23 14:11               ` Clément Léger
2025-06-23 14:11                 ` Clément Léger
2025-06-23 14:11                 ` Clément Léger

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