From: "Diederik de Haas" <didi.debian@cknow.org>
To: "John Clark" <inindev@gmail.com>, <heiko@sntech.de>
Cc: <robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-rockchip@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 2/2] arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
Date: Sat, 21 Jun 2025 15:48:42 +0200 [thread overview]
Message-ID: <DAS9BQ77MMNE.26Z2XFDOQDRBQ@cknow.org> (raw)
In-Reply-To: <20250621124900.214098-3-inindev@gmail.com>
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Hi,
On Sat Jun 21, 2025 at 2:49 PM CEST, John Clark wrote:
> Add device tree for FriendlyElec NanoPi M5 with Rockchip RK3576 SoC
> (4x Cortex-A72, 4x Cortex-A53, Mali-G52 MC3 GPU, 6 TOPS NPU). Enables
> basic booting and connectivity.
> ...
> diff --git a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
> new file mode 100644
> index 000000000000..c63be9060651
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
> @@ -0,0 +1,999 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd.
> + * Copyright (c) 2025 John Clark <inindev@gmail.com>
> + */
> +
> +/dts-v1/;
> ...
> +&pcie0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie_m2_reset>;
> + reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
> + vpcie3v3-supply = <&vcc_3v3_m2_keym>;
> + status = "okay";
> +};
> +
> +&pinctrl {
> + gpio-key {
> + key1_pin: key1-pin {
> + rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + gpio-leds {
> + sys_led_pin: sys-led-pin {
> + rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + lan_led_pin: lan-led-pin {
> + rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + wan_led_pin: wan-led-pin {
> + rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + gmac {
> + gmac0_int: gmac0-int {
> + rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + gmac0_rst: gmac0-rst {
> + rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + gmac1_int: gmac1-int {
> + rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + gmac1_rst: gmac1-rst {
> + rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + hdmi {
> + hdmi_con_en: hdmi-con-en {
> + rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + headphone {
> + hp_det: hp-det {
> + rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + hym8563 {
> + hym8563_int: hym8563-int {
> + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + pcie {
> + pcie_m2_pwren: pcie-m2-pwren {
> + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + pcie_m2_reset: pcie-m2-reset {
> + rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + sdmmc {
> + sd_s0_pwren: sd-s0-pwren {
> + rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + usb {
> + usb_host_pwren: usb-host-pwren {
> + rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + usb_otg0_pwren: usb-otg0-pwren {
> + rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +};
Consider using names/label which are (consistently) close to the labels
as used in the schematics.
ref: https://lore.kernel.org/linux-rockchip/5461462.0VBMTVartN@phil/
Cheers,
Diederik
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WARNING: multiple messages have this Message-ID (diff)
From: "Diederik de Haas" <didi.debian@cknow.org>
To: "John Clark" <inindev@gmail.com>, <heiko@sntech.de>
Cc: <robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-rockchip@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 2/2] arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
Date: Sat, 21 Jun 2025 15:48:42 +0200 [thread overview]
Message-ID: <DAS9BQ77MMNE.26Z2XFDOQDRBQ@cknow.org> (raw)
In-Reply-To: <20250621124900.214098-3-inindev@gmail.com>
[-- Attachment #1.1: Type: text/plain, Size: 3075 bytes --]
Hi,
On Sat Jun 21, 2025 at 2:49 PM CEST, John Clark wrote:
> Add device tree for FriendlyElec NanoPi M5 with Rockchip RK3576 SoC
> (4x Cortex-A72, 4x Cortex-A53, Mali-G52 MC3 GPU, 6 TOPS NPU). Enables
> basic booting and connectivity.
> ...
> diff --git a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
> new file mode 100644
> index 000000000000..c63be9060651
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
> @@ -0,0 +1,999 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd.
> + * Copyright (c) 2025 John Clark <inindev@gmail.com>
> + */
> +
> +/dts-v1/;
> ...
> +&pcie0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie_m2_reset>;
> + reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
> + vpcie3v3-supply = <&vcc_3v3_m2_keym>;
> + status = "okay";
> +};
> +
> +&pinctrl {
> + gpio-key {
> + key1_pin: key1-pin {
> + rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + gpio-leds {
> + sys_led_pin: sys-led-pin {
> + rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + lan_led_pin: lan-led-pin {
> + rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + wan_led_pin: wan-led-pin {
> + rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + gmac {
> + gmac0_int: gmac0-int {
> + rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + gmac0_rst: gmac0-rst {
> + rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + gmac1_int: gmac1-int {
> + rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + gmac1_rst: gmac1-rst {
> + rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + hdmi {
> + hdmi_con_en: hdmi-con-en {
> + rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + headphone {
> + hp_det: hp-det {
> + rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + hym8563 {
> + hym8563_int: hym8563-int {
> + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + pcie {
> + pcie_m2_pwren: pcie-m2-pwren {
> + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + pcie_m2_reset: pcie-m2-reset {
> + rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + sdmmc {
> + sd_s0_pwren: sd-s0-pwren {
> + rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + usb {
> + usb_host_pwren: usb-host-pwren {
> + rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + usb_otg0_pwren: usb-otg0-pwren {
> + rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +};
Consider using names/label which are (consistently) close to the labels
as used in the schematics.
ref: https://lore.kernel.org/linux-rockchip/5461462.0VBMTVartN@phil/
Cheers,
Diederik
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next prev parent reply other threads:[~2025-06-21 13:51 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-21 12:48 [PATCH v3 0/2] Add FriendlyElec NanoPi M5 support for Rockchip RK3576 John Clark
2025-06-21 12:48 ` John Clark
2025-06-21 12:48 ` [PATCH v3 1/2] dt-bindings: arm: rockchip: add FriendlyElec NanoPi M5 board John Clark
2025-06-21 12:48 ` John Clark
2025-06-21 12:49 ` [PATCH v3 2/2] arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support John Clark
2025-06-21 12:49 ` John Clark
2025-06-21 13:48 ` Diederik de Haas [this message]
2025-06-21 13:48 ` Diederik de Haas
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