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From: "Michael Walle" <mwalle@kernel.org>
To: "Marek Vasut" <marek.vasut@mailbox.org>
Cc: <linux-mtd@lists.infradead.org>,
	"Miquel Raynal" <miquel.raynal@bootlin.com>,
	"Pratyush Yadav" <pratyush@kernel.org>,
	"Richard Weinberger" <richard@nod.at>,
	"Tudor Ambarus" <tudor.ambarus@linaro.org>,
	"Vignesh Raghavendra" <vigneshr@ti.com>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2] mtd: spi-nor: winbond: Add support for W77Q51NW
Date: Tue, 29 Jul 2025 10:48:15 +0200	[thread overview]
Message-ID: <DBOEQE01XFID.21SA81RTH4OOX@kernel.org> (raw)
In-Reply-To: <d592e97a-fad2-4269-b854-d3e82d985035@mailbox.org>


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On Tue Jul 29, 2025 at 5:51 AM CEST, Marek Vasut wrote:
> On 7/28/25 8:32 AM, Michael Walle wrote:
> >>>> I have limited supply of these devices, so OTP is untested. The flash
> >>>> does have OTP registers, that's why the .otp entry is there. Why should
> >>>> I remove it if the OTP registers are in the chip ?
> >>>
> >>> We only add tested features. I'm just the messenger here :o. Anyway,
> >>> OTP is not really one-time-programmable here, you can write and
> >>> erase it again as long as you don't lock it, if that was your
> >>> concern.
> >>
> >> So how do I test the OTP without locking it ?
> > 
> > flash_otp_{write,info,dump,erase}, just don't use flash_otp_lock.
>
> Thanks. flash_otp_dump -u /dev/mtd0 returns zeroes, so I suspect the OTP 
> is not working. The chip does work even without this entry and the 
> content /sys/kernel/debug/spi-nor/spi0.0/capabilities and 
> /sys/kernel/debug/spi-nor/spi0.0/params did not change, so I think the 
> best way forward is to drop this patch, until I can figure out the OTP 
> on this chip ?

Probably. Good to know that the flash is working for you.

-michael

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WARNING: multiple messages have this Message-ID (diff)
From: "Michael Walle" <mwalle@kernel.org>
To: "Marek Vasut" <marek.vasut@mailbox.org>
Cc: <linux-mtd@lists.infradead.org>,
	"Miquel Raynal" <miquel.raynal@bootlin.com>,
	"Pratyush Yadav" <pratyush@kernel.org>,
	"Richard Weinberger" <richard@nod.at>,
	"Tudor Ambarus" <tudor.ambarus@linaro.org>,
	"Vignesh Raghavendra" <vigneshr@ti.com>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2] mtd: spi-nor: winbond: Add support for W77Q51NW
Date: Tue, 29 Jul 2025 10:48:15 +0200	[thread overview]
Message-ID: <DBOEQE01XFID.21SA81RTH4OOX@kernel.org> (raw)
In-Reply-To: <d592e97a-fad2-4269-b854-d3e82d985035@mailbox.org>

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On Tue Jul 29, 2025 at 5:51 AM CEST, Marek Vasut wrote:
> On 7/28/25 8:32 AM, Michael Walle wrote:
> >>>> I have limited supply of these devices, so OTP is untested. The flash
> >>>> does have OTP registers, that's why the .otp entry is there. Why should
> >>>> I remove it if the OTP registers are in the chip ?
> >>>
> >>> We only add tested features. I'm just the messenger here :o. Anyway,
> >>> OTP is not really one-time-programmable here, you can write and
> >>> erase it again as long as you don't lock it, if that was your
> >>> concern.
> >>
> >> So how do I test the OTP without locking it ?
> > 
> > flash_otp_{write,info,dump,erase}, just don't use flash_otp_lock.
>
> Thanks. flash_otp_dump -u /dev/mtd0 returns zeroes, so I suspect the OTP 
> is not working. The chip does work even without this entry and the 
> content /sys/kernel/debug/spi-nor/spi0.0/capabilities and 
> /sys/kernel/debug/spi-nor/spi0.0/params did not change, so I think the 
> best way forward is to drop this patch, until I can figure out the OTP 
> on this chip ?

Probably. Good to know that the flash is working for you.

-michael

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  reply	other threads:[~2025-07-29  8:51 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-21 20:22 [PATCH v2] mtd: spi-nor: winbond: Add support for W77Q51NW Marek Vasut
2025-07-21 20:22 ` Marek Vasut
2025-07-22  8:25 ` Tudor Ambarus
2025-07-22  8:25   ` Tudor Ambarus
2025-07-22  8:43 ` Michael Walle
2025-07-22  8:43   ` Michael Walle
2025-07-22  9:37   ` Tudor Ambarus
2025-07-22  9:37     ` Tudor Ambarus
2025-07-22 13:51     ` Michael Walle
2025-07-22 13:51       ` Michael Walle
2025-07-22 14:28   ` Marek Vasut
2025-07-22 14:28     ` Marek Vasut
2025-07-23  6:36     ` Michael Walle
2025-07-23  6:36       ` Michael Walle
2025-07-27 20:26       ` Marek Vasut
2025-07-27 20:26         ` Marek Vasut
2025-07-28  6:32         ` Michael Walle
2025-07-28  6:32           ` Michael Walle
2025-07-29  3:51           ` Marek Vasut
2025-07-29  3:51             ` Marek Vasut
2025-07-29  8:48             ` Michael Walle [this message]
2025-07-29  8:48               ` Michael Walle

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