* [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of mt35xu512aba"
@ 2025-12-12 8:30 ` Haibo Chen
0 siblings, 0 replies; 10+ messages in thread
From: Haibo Chen @ 2025-12-12 8:30 UTC (permalink / raw)
To: Tudor Ambarus, Pratyush Yadav, Michael Walle, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra
Cc: linux-mtd, linux-kernel, han.xu, Haibo Chen
This reverts commit 44dd635cd632824f412ff2a6b320d9302a277ad0.
Find two batches mt35xu512aba has different SFDP but with same
jedec ID. To make all batches of mt35xu512aba work well and
support OCT DTR mode, back to hardcode the flags.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
mt35xu512aba chip with label 4KA17 RW303:
root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# cat jedec_id
2c5b1a
root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# cat manufacturer
micron
root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# hexdump -Cv sfdp
00000000 53 46 44 50 0a 01 03 ff 00 08 01 17 30 00 00 ff |SFDP........0...|
00000010 84 00 01 02 90 00 00 ff 05 01 01 06 a0 00 00 ff |................|
00000020 0a 00 01 08 b0 00 00 ff ff ff ff ff ff ff ff ff |................|
00000030 e5 20 8a ff ff ff ff 1f 00 00 00 00 00 00 00 00 |. ..............|
00000040 ee ff ff ff ff ff 00 00 ff ff 00 00 0c 20 11 d8 |............. ..|
00000050 0f 52 00 00 39 61 99 00 87 8e 03 d3 ac a1 27 3d |.R..9a........'=|
00000060 7a 75 7a 75 fb bd d5 5c 00 00 70 ff 81 50 f8 a1 |zuzu...\..p..P..|
00000070 2f cb 27 8b 00 00 04 01 00 06 01 00 ff ff ff 8e |/.'.............|
00000080 00 00 00 00 00 00 00 00 00 00 00 00 ff ff ff ff |................|
00000090 43 0e ff ff 21 dc 5c ff ff ff ff ff ff ff ff ff |C...!.\.........|
000000a0 00 0b 80 9e b1 81 b5 85 00 f0 ff 9f 00 0a 00 00 |................|
000000b0 00 0a 1a 88 10 00 00 00 ff ff ff ff ff ff ff ff |................|
000000c0 00 00 06 01 00 00 00 00 14 01 81 03 00 00 00 00 |................|
000000d0
mt35xu512aba chip with label 0DA15 RW303:
root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# ls
jedec_id manufacturer sfdp
root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# cat jedec_id
2c5b1a
root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# cat manufacturer
micron
root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# hexdump -Cv sfdp
00000000 53 46 44 50 06 01 01 ff 00 06 01 10 30 00 00 ff |SFDP........0...|
00000010 84 00 01 02 80 00 00 ff ff ff ff ff ff ff ff ff |................|
00000020 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000030 e5 20 8a ff ff ff ff 1f 00 00 00 00 00 00 00 00 |. ..............|
00000040 ee ff ff ff ff ff 00 00 ff ff 00 00 0c 20 11 d8 |............. ..|
00000050 0f 52 00 00 24 5a 99 00 8b 8e 03 e1 ac 01 27 38 |.R..$Z........'8|
00000060 7a 75 7a 75 fb bd d5 5c 00 00 70 ff 81 b0 38 36 |zuzu...\..p...86|
00000070 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000080 43 0e ff ff 21 dc 5c ff |C...!.\.|
00000088
---
drivers/mtd/spi-nor/micron-st.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
index 88033384a71e5d19f5a26ca91f56a49e3017183a..0a67053a60693684080554db5b4688aefc00062e 100644
--- a/drivers/mtd/spi-nor/micron-st.c
+++ b/drivers/mtd/spi-nor/micron-st.c
@@ -192,10 +192,14 @@ static const struct spi_nor_fixups mt35xu01gbba_fixups = {
static const struct flash_info micron_nor_parts[] = {
{
- /* MT35XU512ABA */
.id = SNOR_ID(0x2c, 0x5b, 0x1a),
+ .name = "mt35xu512aba",
+ .sector_size = SZ_128K,
+ .size = SZ_64M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_OCTAL_READ |
+ SPI_NOR_OCTAL_DTR_READ | SPI_NOR_OCTAL_DTR_PP,
.mfr_flags = USE_FSR,
- .fixup_flags = SPI_NOR_IO_MODE_EN_VOLATILE,
+ .fixup_flags = SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE,
.fixups = &mt35xu512aba_fixups,
}, {
/* MT35XU01GBBA */
---
base-commit: d9771d0dbe18dd643760431870a6abf9b0866bb0
change-id: 20251212-nor-2f37cf12eeca
Best regards,
--
Haibo Chen <haibo.chen@nxp.com>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of mt35xu512aba"
@ 2025-12-12 8:30 ` Haibo Chen
0 siblings, 0 replies; 10+ messages in thread
From: Haibo Chen @ 2025-12-12 8:30 UTC (permalink / raw)
To: Tudor Ambarus, Pratyush Yadav, Michael Walle, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra
Cc: linux-mtd, linux-kernel, han.xu, Haibo Chen
This reverts commit 44dd635cd632824f412ff2a6b320d9302a277ad0.
Find two batches mt35xu512aba has different SFDP but with same
jedec ID. To make all batches of mt35xu512aba work well and
support OCT DTR mode, back to hardcode the flags.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
mt35xu512aba chip with label 4KA17 RW303:
root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# cat jedec_id
2c5b1a
root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# cat manufacturer
micron
root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# hexdump -Cv sfdp
00000000 53 46 44 50 0a 01 03 ff 00 08 01 17 30 00 00 ff |SFDP........0...|
00000010 84 00 01 02 90 00 00 ff 05 01 01 06 a0 00 00 ff |................|
00000020 0a 00 01 08 b0 00 00 ff ff ff ff ff ff ff ff ff |................|
00000030 e5 20 8a ff ff ff ff 1f 00 00 00 00 00 00 00 00 |. ..............|
00000040 ee ff ff ff ff ff 00 00 ff ff 00 00 0c 20 11 d8 |............. ..|
00000050 0f 52 00 00 39 61 99 00 87 8e 03 d3 ac a1 27 3d |.R..9a........'=|
00000060 7a 75 7a 75 fb bd d5 5c 00 00 70 ff 81 50 f8 a1 |zuzu...\..p..P..|
00000070 2f cb 27 8b 00 00 04 01 00 06 01 00 ff ff ff 8e |/.'.............|
00000080 00 00 00 00 00 00 00 00 00 00 00 00 ff ff ff ff |................|
00000090 43 0e ff ff 21 dc 5c ff ff ff ff ff ff ff ff ff |C...!.\.........|
000000a0 00 0b 80 9e b1 81 b5 85 00 f0 ff 9f 00 0a 00 00 |................|
000000b0 00 0a 1a 88 10 00 00 00 ff ff ff ff ff ff ff ff |................|
000000c0 00 00 06 01 00 00 00 00 14 01 81 03 00 00 00 00 |................|
000000d0
mt35xu512aba chip with label 0DA15 RW303:
root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# ls
jedec_id manufacturer sfdp
root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# cat jedec_id
2c5b1a
root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# cat manufacturer
micron
root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# hexdump -Cv sfdp
00000000 53 46 44 50 06 01 01 ff 00 06 01 10 30 00 00 ff |SFDP........0...|
00000010 84 00 01 02 80 00 00 ff ff ff ff ff ff ff ff ff |................|
00000020 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000030 e5 20 8a ff ff ff ff 1f 00 00 00 00 00 00 00 00 |. ..............|
00000040 ee ff ff ff ff ff 00 00 ff ff 00 00 0c 20 11 d8 |............. ..|
00000050 0f 52 00 00 24 5a 99 00 8b 8e 03 e1 ac 01 27 38 |.R..$Z........'8|
00000060 7a 75 7a 75 fb bd d5 5c 00 00 70 ff 81 b0 38 36 |zuzu...\..p...86|
00000070 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
00000080 43 0e ff ff 21 dc 5c ff |C...!.\.|
00000088
---
drivers/mtd/spi-nor/micron-st.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
index 88033384a71e5d19f5a26ca91f56a49e3017183a..0a67053a60693684080554db5b4688aefc00062e 100644
--- a/drivers/mtd/spi-nor/micron-st.c
+++ b/drivers/mtd/spi-nor/micron-st.c
@@ -192,10 +192,14 @@ static const struct spi_nor_fixups mt35xu01gbba_fixups = {
static const struct flash_info micron_nor_parts[] = {
{
- /* MT35XU512ABA */
.id = SNOR_ID(0x2c, 0x5b, 0x1a),
+ .name = "mt35xu512aba",
+ .sector_size = SZ_128K,
+ .size = SZ_64M,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_OCTAL_READ |
+ SPI_NOR_OCTAL_DTR_READ | SPI_NOR_OCTAL_DTR_PP,
.mfr_flags = USE_FSR,
- .fixup_flags = SPI_NOR_IO_MODE_EN_VOLATILE,
+ .fixup_flags = SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE,
.fixups = &mt35xu512aba_fixups,
}, {
/* MT35XU01GBBA */
---
base-commit: d9771d0dbe18dd643760431870a6abf9b0866bb0
change-id: 20251212-nor-2f37cf12eeca
Best regards,
--
Haibo Chen <haibo.chen@nxp.com>
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of mt35xu512aba"
2025-12-12 8:30 ` Haibo Chen
@ 2025-12-12 8:34 ` Michael Walle
-1 siblings, 0 replies; 10+ messages in thread
From: Michael Walle @ 2025-12-12 8:34 UTC (permalink / raw)
To: Haibo Chen, Tudor Ambarus, Pratyush Yadav, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra
Cc: linux-mtd, linux-kernel, han.xu
[-- Attachment #1.1: Type: text/plain, Size: 3170 bytes --]
Hi,
On Fri Dec 12, 2025 at 9:30 AM CET, Haibo Chen wrote:
> This reverts commit 44dd635cd632824f412ff2a6b320d9302a277ad0.
>
> Find two batches mt35xu512aba has different SFDP but with same
> jedec ID. To make all batches of mt35xu512aba work well and
> support OCT DTR mode, back to hardcode the flags.
What are "batches" in this case? A new revision of the same flash
chip? Why would they use a different ID then.
What's wrong with the parsed flags? Both support SFDP, so if you
really need to fixup any flags, please use a fixup callback to
actually fix them. But first, what will go wrong?
-michael
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> ---
> mt35xu512aba chip with label 4KA17 RW303:
> root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# cat jedec_id
> 2c5b1a
> root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# cat manufacturer
> micron
> root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# hexdump -Cv sfdp
> 00000000 53 46 44 50 0a 01 03 ff 00 08 01 17 30 00 00 ff |SFDP........0...|
> 00000010 84 00 01 02 90 00 00 ff 05 01 01 06 a0 00 00 ff |................|
> 00000020 0a 00 01 08 b0 00 00 ff ff ff ff ff ff ff ff ff |................|
> 00000030 e5 20 8a ff ff ff ff 1f 00 00 00 00 00 00 00 00 |. ..............|
> 00000040 ee ff ff ff ff ff 00 00 ff ff 00 00 0c 20 11 d8 |............. ..|
> 00000050 0f 52 00 00 39 61 99 00 87 8e 03 d3 ac a1 27 3d |.R..9a........'=|
> 00000060 7a 75 7a 75 fb bd d5 5c 00 00 70 ff 81 50 f8 a1 |zuzu...\..p..P..|
> 00000070 2f cb 27 8b 00 00 04 01 00 06 01 00 ff ff ff 8e |/.'.............|
> 00000080 00 00 00 00 00 00 00 00 00 00 00 00 ff ff ff ff |................|
> 00000090 43 0e ff ff 21 dc 5c ff ff ff ff ff ff ff ff ff |C...!.\.........|
> 000000a0 00 0b 80 9e b1 81 b5 85 00 f0 ff 9f 00 0a 00 00 |................|
> 000000b0 00 0a 1a 88 10 00 00 00 ff ff ff ff ff ff ff ff |................|
> 000000c0 00 00 06 01 00 00 00 00 14 01 81 03 00 00 00 00 |................|
> 000000d0
>
> mt35xu512aba chip with label 0DA15 RW303:
> root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# ls
> jedec_id manufacturer sfdp
> root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# cat jedec_id
> 2c5b1a
> root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# cat manufacturer
> micron
> root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# hexdump -Cv sfdp
> 00000000 53 46 44 50 06 01 01 ff 00 06 01 10 30 00 00 ff |SFDP........0...|
> 00000010 84 00 01 02 80 00 00 ff ff ff ff ff ff ff ff ff |................|
> 00000020 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
> 00000030 e5 20 8a ff ff ff ff 1f 00 00 00 00 00 00 00 00 |. ..............|
> 00000040 ee ff ff ff ff ff 00 00 ff ff 00 00 0c 20 11 d8 |............. ..|
> 00000050 0f 52 00 00 24 5a 99 00 8b 8e 03 e1 ac 01 27 38 |.R..$Z........'8|
> 00000060 7a 75 7a 75 fb bd d5 5c 00 00 70 ff 81 b0 38 36 |zuzu...\..p...86|
> 00000070 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
> 00000080 43 0e ff ff 21 dc 5c ff |C...!.\.|
> 00000088
Thanks!
-michael
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 297 bytes --]
[-- Attachment #2: Type: text/plain, Size: 144 bytes --]
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of mt35xu512aba"
@ 2025-12-12 8:34 ` Michael Walle
0 siblings, 0 replies; 10+ messages in thread
From: Michael Walle @ 2025-12-12 8:34 UTC (permalink / raw)
To: Haibo Chen, Tudor Ambarus, Pratyush Yadav, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra
Cc: linux-mtd, linux-kernel, han.xu
[-- Attachment #1: Type: text/plain, Size: 3170 bytes --]
Hi,
On Fri Dec 12, 2025 at 9:30 AM CET, Haibo Chen wrote:
> This reverts commit 44dd635cd632824f412ff2a6b320d9302a277ad0.
>
> Find two batches mt35xu512aba has different SFDP but with same
> jedec ID. To make all batches of mt35xu512aba work well and
> support OCT DTR mode, back to hardcode the flags.
What are "batches" in this case? A new revision of the same flash
chip? Why would they use a different ID then.
What's wrong with the parsed flags? Both support SFDP, so if you
really need to fixup any flags, please use a fixup callback to
actually fix them. But first, what will go wrong?
-michael
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> ---
> mt35xu512aba chip with label 4KA17 RW303:
> root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# cat jedec_id
> 2c5b1a
> root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# cat manufacturer
> micron
> root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# hexdump -Cv sfdp
> 00000000 53 46 44 50 0a 01 03 ff 00 08 01 17 30 00 00 ff |SFDP........0...|
> 00000010 84 00 01 02 90 00 00 ff 05 01 01 06 a0 00 00 ff |................|
> 00000020 0a 00 01 08 b0 00 00 ff ff ff ff ff ff ff ff ff |................|
> 00000030 e5 20 8a ff ff ff ff 1f 00 00 00 00 00 00 00 00 |. ..............|
> 00000040 ee ff ff ff ff ff 00 00 ff ff 00 00 0c 20 11 d8 |............. ..|
> 00000050 0f 52 00 00 39 61 99 00 87 8e 03 d3 ac a1 27 3d |.R..9a........'=|
> 00000060 7a 75 7a 75 fb bd d5 5c 00 00 70 ff 81 50 f8 a1 |zuzu...\..p..P..|
> 00000070 2f cb 27 8b 00 00 04 01 00 06 01 00 ff ff ff 8e |/.'.............|
> 00000080 00 00 00 00 00 00 00 00 00 00 00 00 ff ff ff ff |................|
> 00000090 43 0e ff ff 21 dc 5c ff ff ff ff ff ff ff ff ff |C...!.\.........|
> 000000a0 00 0b 80 9e b1 81 b5 85 00 f0 ff 9f 00 0a 00 00 |................|
> 000000b0 00 0a 1a 88 10 00 00 00 ff ff ff ff ff ff ff ff |................|
> 000000c0 00 00 06 01 00 00 00 00 14 01 81 03 00 00 00 00 |................|
> 000000d0
>
> mt35xu512aba chip with label 0DA15 RW303:
> root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# ls
> jedec_id manufacturer sfdp
> root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# cat jedec_id
> 2c5b1a
> root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# cat manufacturer
> micron
> root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# hexdump -Cv sfdp
> 00000000 53 46 44 50 06 01 01 ff 00 06 01 10 30 00 00 ff |SFDP........0...|
> 00000010 84 00 01 02 80 00 00 ff ff ff ff ff ff ff ff ff |................|
> 00000020 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
> 00000030 e5 20 8a ff ff ff ff 1f 00 00 00 00 00 00 00 00 |. ..............|
> 00000040 ee ff ff ff ff ff 00 00 ff ff 00 00 0c 20 11 d8 |............. ..|
> 00000050 0f 52 00 00 24 5a 99 00 8b 8e 03 e1 ac 01 27 38 |.R..$Z........'8|
> 00000060 7a 75 7a 75 fb bd d5 5c 00 00 70 ff 81 b0 38 36 |zuzu...\..p...86|
> 00000070 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
> 00000080 43 0e ff ff 21 dc 5c ff |C...!.\.|
> 00000088
Thanks!
-michael
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 297 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of mt35xu512aba"
2025-12-12 8:34 ` Michael Walle
@ 2025-12-12 9:03 ` Bough Chen
-1 siblings, 0 replies; 10+ messages in thread
From: Bough Chen @ 2025-12-12 9:03 UTC (permalink / raw)
To: Michael Walle, Tudor Ambarus, Pratyush Yadav, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra
Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
Han Xu, open list:NXP i.MX 7D/6SX/6UL/93 AND VF610 ADC DRIVER
> -----Original Message-----
> From: Michael Walle <mwalle@kernel.org>
> Sent: 2025年12月12日 16:35
> To: Bough Chen <haibo.chen@nxp.com>; Tudor Ambarus
> <tudor.ambarus@linaro.org>; Pratyush Yadav <pratyush@kernel.org>; Miquel
> Raynal <miquel.raynal@bootlin.com>; Richard Weinberger <richard@nod.at>;
> Vignesh Raghavendra <vigneshr@ti.com>
> Cc: linux-mtd@lists.infradead.org; linux-kernel@vger.kernel.org; Han Xu
> <han.xu@nxp.com>
> Subject: Re: [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of
> mt35xu512aba"
>
> Hi,
>
> On Fri Dec 12, 2025 at 9:30 AM CET, Haibo Chen wrote:
> > This reverts commit 44dd635cd632824f412ff2a6b320d9302a277ad0.
> >
> > Find two batches mt35xu512aba has different SFDP but with same jedec
> > ID. To make all batches of mt35xu512aba work well and support OCT DTR
> > mode, back to hardcode the flags.
>
> What are "batches" in this case? A new revision of the same flash chip? Why
> would they use a different ID then.
Hi Michael,
Yes, seems a new revision of the same flash chip. Anyone from Micron can confirm this?
What's the normal way for vendors to update the SFDP? Seems also need to update/change the ID.
> What's wrong with the parsed flags? Both support SFDP, so if you really need to
> fixup any flags, please use a fixup callback to actually fix them. But first, what
> will go wrong?
Yes, sorry to lack this information.
For mt35xu512aba chip with label 0DA15 RW303, the SFDP do not support OCT DTR read/write operation,
but still has one .fixups = &mt35xu512aba_fixups, in this fix up, it config the OCT DTR read operation, so
finally read_proto == SNOR_PROTO_8_8_8_DTR, but nor->write_proto == SNOR_PROTO_1_1_1, then has
no chance to call micron_st_nor_octal_dtr_en(), when there is read operation, use OCT DTR read command
meet issue.
With this revert patch, I test mt35xu512aba chip with label 0DA15 RW303, OCT DTR mode can work well.
Also test mt35xu512aba chip with label 4KA17 RW303, OCT DTR mode work find too.
Regards
Haibo Chen
>
> -michael
>
> > Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> > ---
> > mt35xu512aba chip with label 4KA17 RW303:
> > root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# cat jedec_id
> > 2c5b1a root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# cat
> > manufacturer micron
> > root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# hexdump -Cv sfdp
> > 00000000 53 46 44 50 0a 01 03 ff 00 08 01 17 30 00 00 ff
> > |SFDP........0...|
> > 00000010 84 00 01 02 90 00 00 ff 05 01 01 06 a0 00 00 ff
> > |................|
> > 00000020 0a 00 01 08 b0 00 00 ff ff ff ff ff ff ff ff ff
> > |................|
> > 00000030 e5 20 8a ff ff ff ff 1f 00 00 00 00 00 00 00 00 |.
> > ..............|
> > 00000040 ee ff ff ff ff ff 00 00 ff ff 00 00 0c 20 11 d8
> > |............. ..|
> > 00000050 0f 52 00 00 39 61 99 00 87 8e 03 d3 ac a1 27 3d
> > |.R..9a........'=|
> > 00000060 7a 75 7a 75 fb bd d5 5c 00 00 70 ff 81 50 f8 a1
> > |zuzu...\..p..P..|
> > 00000070 2f cb 27 8b 00 00 04 01 00 06 01 00 ff ff ff 8e
> > |/.'.............|
> > 00000080 00 00 00 00 00 00 00 00 00 00 00 00 ff ff ff ff
> > |................|
> > 00000090 43 0e ff ff 21 dc 5c ff ff ff ff ff ff ff ff ff
> > |C...!.\.........|
> > 000000a0 00 0b 80 9e b1 81 b5 85 00 f0 ff 9f 00 0a 00 00
> > |................|
> > 000000b0 00 0a 1a 88 10 00 00 00 ff ff ff ff ff ff ff ff
> > |................|
> > 000000c0 00 00 06 01 00 00 00 00 14 01 81 03 00 00 00 00
> > |................|
> > 000000d0
> >
> > mt35xu512aba chip with label 0DA15 RW303:
> > root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# ls jedec_id
> > manufacturer sfdp root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor#
> > cat jedec_id 2c5b1a
> > root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# cat manufacturer
> > micron root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# hexdump -Cv
> > sfdp
> > 00000000 53 46 44 50 06 01 01 ff 00 06 01 10 30 00 00 ff
> > |SFDP........0...|
> > 00000010 84 00 01 02 80 00 00 ff ff ff ff ff ff ff ff ff
> > |................|
> > 00000020 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
> > |................|
> > 00000030 e5 20 8a ff ff ff ff 1f 00 00 00 00 00 00 00 00 |.
> > ..............|
> > 00000040 ee ff ff ff ff ff 00 00 ff ff 00 00 0c 20 11 d8
> > |............. ..|
> > 00000050 0f 52 00 00 24 5a 99 00 8b 8e 03 e1 ac 01 27 38
> > |.R..$Z........'8|
> > 00000060 7a 75 7a 75 fb bd d5 5c 00 00 70 ff 81 b0 38 36
> > |zuzu...\..p...86|
> > 00000070 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
> > 00000080 43 0e ff ff 21 dc 5c ff |C...!.\.|
> > 00000088
>
> Thanks!
>
> -michael
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of mt35xu512aba"
@ 2025-12-12 9:03 ` Bough Chen
0 siblings, 0 replies; 10+ messages in thread
From: Bough Chen @ 2025-12-12 9:03 UTC (permalink / raw)
To: Michael Walle, Tudor Ambarus, Pratyush Yadav, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra
Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
Han Xu, open list:NXP i.MX 7D/6SX/6UL/93 AND VF610 ADC DRIVER
> -----Original Message-----
> From: Michael Walle <mwalle@kernel.org>
> Sent: 2025年12月12日 16:35
> To: Bough Chen <haibo.chen@nxp.com>; Tudor Ambarus
> <tudor.ambarus@linaro.org>; Pratyush Yadav <pratyush@kernel.org>; Miquel
> Raynal <miquel.raynal@bootlin.com>; Richard Weinberger <richard@nod.at>;
> Vignesh Raghavendra <vigneshr@ti.com>
> Cc: linux-mtd@lists.infradead.org; linux-kernel@vger.kernel.org; Han Xu
> <han.xu@nxp.com>
> Subject: Re: [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of
> mt35xu512aba"
>
> Hi,
>
> On Fri Dec 12, 2025 at 9:30 AM CET, Haibo Chen wrote:
> > This reverts commit 44dd635cd632824f412ff2a6b320d9302a277ad0.
> >
> > Find two batches mt35xu512aba has different SFDP but with same jedec
> > ID. To make all batches of mt35xu512aba work well and support OCT DTR
> > mode, back to hardcode the flags.
>
> What are "batches" in this case? A new revision of the same flash chip? Why
> would they use a different ID then.
Hi Michael,
Yes, seems a new revision of the same flash chip. Anyone from Micron can confirm this?
What's the normal way for vendors to update the SFDP? Seems also need to update/change the ID.
> What's wrong with the parsed flags? Both support SFDP, so if you really need to
> fixup any flags, please use a fixup callback to actually fix them. But first, what
> will go wrong?
Yes, sorry to lack this information.
For mt35xu512aba chip with label 0DA15 RW303, the SFDP do not support OCT DTR read/write operation,
but still has one .fixups = &mt35xu512aba_fixups, in this fix up, it config the OCT DTR read operation, so
finally read_proto == SNOR_PROTO_8_8_8_DTR, but nor->write_proto == SNOR_PROTO_1_1_1, then has
no chance to call micron_st_nor_octal_dtr_en(), when there is read operation, use OCT DTR read command
meet issue.
With this revert patch, I test mt35xu512aba chip with label 0DA15 RW303, OCT DTR mode can work well.
Also test mt35xu512aba chip with label 4KA17 RW303, OCT DTR mode work find too.
Regards
Haibo Chen
>
> -michael
>
> > Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> > ---
> > mt35xu512aba chip with label 4KA17 RW303:
> > root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# cat jedec_id
> > 2c5b1a root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# cat
> > manufacturer micron
> > root@imx943evk:/sys/bus/spi/devices/spi8.0/spi-nor# hexdump -Cv sfdp
> > 00000000 53 46 44 50 0a 01 03 ff 00 08 01 17 30 00 00 ff
> > |SFDP........0...|
> > 00000010 84 00 01 02 90 00 00 ff 05 01 01 06 a0 00 00 ff
> > |................|
> > 00000020 0a 00 01 08 b0 00 00 ff ff ff ff ff ff ff ff ff
> > |................|
> > 00000030 e5 20 8a ff ff ff ff 1f 00 00 00 00 00 00 00 00 |.
> > ..............|
> > 00000040 ee ff ff ff ff ff 00 00 ff ff 00 00 0c 20 11 d8
> > |............. ..|
> > 00000050 0f 52 00 00 39 61 99 00 87 8e 03 d3 ac a1 27 3d
> > |.R..9a........'=|
> > 00000060 7a 75 7a 75 fb bd d5 5c 00 00 70 ff 81 50 f8 a1
> > |zuzu...\..p..P..|
> > 00000070 2f cb 27 8b 00 00 04 01 00 06 01 00 ff ff ff 8e
> > |/.'.............|
> > 00000080 00 00 00 00 00 00 00 00 00 00 00 00 ff ff ff ff
> > |................|
> > 00000090 43 0e ff ff 21 dc 5c ff ff ff ff ff ff ff ff ff
> > |C...!.\.........|
> > 000000a0 00 0b 80 9e b1 81 b5 85 00 f0 ff 9f 00 0a 00 00
> > |................|
> > 000000b0 00 0a 1a 88 10 00 00 00 ff ff ff ff ff ff ff ff
> > |................|
> > 000000c0 00 00 06 01 00 00 00 00 14 01 81 03 00 00 00 00
> > |................|
> > 000000d0
> >
> > mt35xu512aba chip with label 0DA15 RW303:
> > root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# ls jedec_id
> > manufacturer sfdp root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor#
> > cat jedec_id 2c5b1a
> > root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# cat manufacturer
> > micron root@imx8qmmek:/sys/bus/spi/devices/spi4.0/spi-nor# hexdump -Cv
> > sfdp
> > 00000000 53 46 44 50 06 01 01 ff 00 06 01 10 30 00 00 ff
> > |SFDP........0...|
> > 00000010 84 00 01 02 80 00 00 ff ff ff ff ff ff ff ff ff
> > |................|
> > 00000020 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
> > |................|
> > 00000030 e5 20 8a ff ff ff ff 1f 00 00 00 00 00 00 00 00 |.
> > ..............|
> > 00000040 ee ff ff ff ff ff 00 00 ff ff 00 00 0c 20 11 d8
> > |............. ..|
> > 00000050 0f 52 00 00 24 5a 99 00 8b 8e 03 e1 ac 01 27 38
> > |.R..$Z........'8|
> > 00000060 7a 75 7a 75 fb bd d5 5c 00 00 70 ff 81 b0 38 36
> > |zuzu...\..p...86|
> > 00000070 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
> > 00000080 43 0e ff ff 21 dc 5c ff |C...!.\.|
> > 00000088
>
> Thanks!
>
> -michael
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of mt35xu512aba"
2025-12-12 9:03 ` Bough Chen
@ 2025-12-12 9:25 ` Michael Walle
-1 siblings, 0 replies; 10+ messages in thread
From: Michael Walle @ 2025-12-12 9:25 UTC (permalink / raw)
To: Bough Chen, Tudor Ambarus, Pratyush Yadav, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra
Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
Han Xu, open list:NXP i.MX 7D/6SX/6UL/93 AND VF610 ADC DRIVER
[-- Attachment #1: Type: text/plain, Size: 1710 bytes --]
Hi,
>> > Find two batches mt35xu512aba has different SFDP but with same jedec
>> > ID. To make all batches of mt35xu512aba work well and support OCT DTR
>> > mode, back to hardcode the flags.
>>
>> What are "batches" in this case? A new revision of the same flash chip? Why
>> would they use a different ID then.
>
> Hi Michael,
>
> Yes, seems a new revision of the same flash chip. Anyone from Micron can confirm this?
>
> What's the normal way for vendors to update the SFDP? Seems also need to update/change the ID.
No why would they? It's the same flash, but with new/fixed SFDP.
>> What's wrong with the parsed flags? Both support SFDP, so if you really need to
>> fixup any flags, please use a fixup callback to actually fix them. But first, what
>> will go wrong?
>
> Yes, sorry to lack this information.
>
> For mt35xu512aba chip with label 0DA15 RW303, the SFDP do not support OCT DTR read/write operation,
> but still has one .fixups = &mt35xu512aba_fixups, in this fix up, it config the OCT DTR read operation, so
> finally read_proto == SNOR_PROTO_8_8_8_DTR, but nor->write_proto == SNOR_PROTO_1_1_1, then has
> no chance to call micron_st_nor_octal_dtr_en(), when there is read operation, use OCT DTR read command
> meet issue.
>
> With this revert patch, I test mt35xu512aba chip with label 0DA15 RW303, OCT DTR mode can work well.
> Also test mt35xu512aba chip with label 4KA17 RW303, OCT DTR mode work find too.
So both support actual octal mode. Then please fix
mt35xu512aba_fixups. IIUC, you can just use
spi_nor_set_pp_settings() there, to fixup the supported PP mode. But
please add it with a comment describe *why* we need that fixup.
-michael
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 297 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of mt35xu512aba"
@ 2025-12-12 9:25 ` Michael Walle
0 siblings, 0 replies; 10+ messages in thread
From: Michael Walle @ 2025-12-12 9:25 UTC (permalink / raw)
To: Bough Chen, Tudor Ambarus, Pratyush Yadav, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra
Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
Han Xu, open list:NXP i.MX 7D/6SX/6UL/93 AND VF610 ADC DRIVER
[-- Attachment #1.1: Type: text/plain, Size: 1710 bytes --]
Hi,
>> > Find two batches mt35xu512aba has different SFDP but with same jedec
>> > ID. To make all batches of mt35xu512aba work well and support OCT DTR
>> > mode, back to hardcode the flags.
>>
>> What are "batches" in this case? A new revision of the same flash chip? Why
>> would they use a different ID then.
>
> Hi Michael,
>
> Yes, seems a new revision of the same flash chip. Anyone from Micron can confirm this?
>
> What's the normal way for vendors to update the SFDP? Seems also need to update/change the ID.
No why would they? It's the same flash, but with new/fixed SFDP.
>> What's wrong with the parsed flags? Both support SFDP, so if you really need to
>> fixup any flags, please use a fixup callback to actually fix them. But first, what
>> will go wrong?
>
> Yes, sorry to lack this information.
>
> For mt35xu512aba chip with label 0DA15 RW303, the SFDP do not support OCT DTR read/write operation,
> but still has one .fixups = &mt35xu512aba_fixups, in this fix up, it config the OCT DTR read operation, so
> finally read_proto == SNOR_PROTO_8_8_8_DTR, but nor->write_proto == SNOR_PROTO_1_1_1, then has
> no chance to call micron_st_nor_octal_dtr_en(), when there is read operation, use OCT DTR read command
> meet issue.
>
> With this revert patch, I test mt35xu512aba chip with label 0DA15 RW303, OCT DTR mode can work well.
> Also test mt35xu512aba chip with label 4KA17 RW303, OCT DTR mode work find too.
So both support actual octal mode. Then please fix
mt35xu512aba_fixups. IIUC, you can just use
spi_nor_set_pp_settings() there, to fixup the supported PP mode. But
please add it with a comment describe *why* we need that fixup.
-michael
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 297 bytes --]
[-- Attachment #2: Type: text/plain, Size: 144 bytes --]
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of mt35xu512aba"
2025-12-12 9:25 ` Michael Walle
@ 2025-12-12 10:04 ` Bough Chen
-1 siblings, 0 replies; 10+ messages in thread
From: Bough Chen @ 2025-12-12 10:04 UTC (permalink / raw)
To: Michael Walle, Tudor Ambarus, Pratyush Yadav, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra
Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
Han Xu, open list:NXP i.MX 7D/6SX/6UL/93 AND VF610 ADC DRIVER
> -----Original Message-----
> From: Michael Walle <mwalle@kernel.org>
> Sent: 2025年12月12日 17:26
> To: Bough Chen <haibo.chen@nxp.com>; Tudor Ambarus
> <tudor.ambarus@linaro.org>; Pratyush Yadav <pratyush@kernel.org>; Miquel
> Raynal <miquel.raynal@bootlin.com>; Richard Weinberger <richard@nod.at>;
> Vignesh Raghavendra <vigneshr@ti.com>
> Cc: linux-mtd@lists.infradead.org; linux-kernel@vger.kernel.org; Han Xu
> <han.xu@nxp.com>; open list:NXP i.MX 7D/6SX/6UL/93 AND VF610 ADC
> DRIVER <imx@lists.linux.dev>
> Subject: Re: [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of
> mt35xu512aba"
>
> Hi,
>
> >> > Find two batches mt35xu512aba has different SFDP but with same
> >> > jedec ID. To make all batches of mt35xu512aba work well and support
> >> > OCT DTR mode, back to hardcode the flags.
> >>
> >> What are "batches" in this case? A new revision of the same flash
> >> chip? Why would they use a different ID then.
> >
> > Hi Michael,
> >
> > Yes, seems a new revision of the same flash chip. Anyone from Micron can
> confirm this?
> >
> > What's the normal way for vendors to update the SFDP? Seems also need to
> update/change the ID.
>
> No why would they? It's the same flash, but with new/fixed SFDP.
Oh, I’m stuck in a fixed mindset. For this case, default use new SFDP, and can use fixup for the old SFDP.
(0DA15 RW303 is old one)
>
> >> What's wrong with the parsed flags? Both support SFDP, so if you
> >> really need to fixup any flags, please use a fixup callback to
> >> actually fix them. But first, what will go wrong?
> >
> > Yes, sorry to lack this information.
> >
> > For mt35xu512aba chip with label 0DA15 RW303, the SFDP do not support
> > OCT DTR read/write operation, but still has one .fixups =
> > &mt35xu512aba_fixups, in this fix up, it config the OCT DTR read
> > operation, so finally read_proto == SNOR_PROTO_8_8_8_DTR, but
> > nor->write_proto == SNOR_PROTO_1_1_1, then has no chance to call
> micron_st_nor_octal_dtr_en(), when there is read operation, use OCT DTR read
> command meet issue.
> >
> > With this revert patch, I test mt35xu512aba chip with label 0DA15 RW303,
> OCT DTR mode can work well.
> > Also test mt35xu512aba chip with label 4KA17 RW303, OCT DTR mode work
> find too.
>
> So both support actual octal mode. Then please fix mt35xu512aba_fixups. IIUC,
> you can just use
> spi_nor_set_pp_settings() there, to fixup the supported PP mode. But please
> add it with a comment describe *why* we need that fixup.
Yes, really good suggestion, I will have a try.
Regards
Haibo Chen
>
> -michael
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of mt35xu512aba"
@ 2025-12-12 10:04 ` Bough Chen
0 siblings, 0 replies; 10+ messages in thread
From: Bough Chen @ 2025-12-12 10:04 UTC (permalink / raw)
To: Michael Walle, Tudor Ambarus, Pratyush Yadav, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra
Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
Han Xu, open list:NXP i.MX 7D/6SX/6UL/93 AND VF610 ADC DRIVER
> -----Original Message-----
> From: Michael Walle <mwalle@kernel.org>
> Sent: 2025年12月12日 17:26
> To: Bough Chen <haibo.chen@nxp.com>; Tudor Ambarus
> <tudor.ambarus@linaro.org>; Pratyush Yadav <pratyush@kernel.org>; Miquel
> Raynal <miquel.raynal@bootlin.com>; Richard Weinberger <richard@nod.at>;
> Vignesh Raghavendra <vigneshr@ti.com>
> Cc: linux-mtd@lists.infradead.org; linux-kernel@vger.kernel.org; Han Xu
> <han.xu@nxp.com>; open list:NXP i.MX 7D/6SX/6UL/93 AND VF610 ADC
> DRIVER <imx@lists.linux.dev>
> Subject: Re: [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of
> mt35xu512aba"
>
> Hi,
>
> >> > Find two batches mt35xu512aba has different SFDP but with same
> >> > jedec ID. To make all batches of mt35xu512aba work well and support
> >> > OCT DTR mode, back to hardcode the flags.
> >>
> >> What are "batches" in this case? A new revision of the same flash
> >> chip? Why would they use a different ID then.
> >
> > Hi Michael,
> >
> > Yes, seems a new revision of the same flash chip. Anyone from Micron can
> confirm this?
> >
> > What's the normal way for vendors to update the SFDP? Seems also need to
> update/change the ID.
>
> No why would they? It's the same flash, but with new/fixed SFDP.
Oh, I’m stuck in a fixed mindset. For this case, default use new SFDP, and can use fixup for the old SFDP.
(0DA15 RW303 is old one)
>
> >> What's wrong with the parsed flags? Both support SFDP, so if you
> >> really need to fixup any flags, please use a fixup callback to
> >> actually fix them. But first, what will go wrong?
> >
> > Yes, sorry to lack this information.
> >
> > For mt35xu512aba chip with label 0DA15 RW303, the SFDP do not support
> > OCT DTR read/write operation, but still has one .fixups =
> > &mt35xu512aba_fixups, in this fix up, it config the OCT DTR read
> > operation, so finally read_proto == SNOR_PROTO_8_8_8_DTR, but
> > nor->write_proto == SNOR_PROTO_1_1_1, then has no chance to call
> micron_st_nor_octal_dtr_en(), when there is read operation, use OCT DTR read
> command meet issue.
> >
> > With this revert patch, I test mt35xu512aba chip with label 0DA15 RW303,
> OCT DTR mode can work well.
> > Also test mt35xu512aba chip with label 4KA17 RW303, OCT DTR mode work
> find too.
>
> So both support actual octal mode. Then please fix mt35xu512aba_fixups. IIUC,
> you can just use
> spi_nor_set_pp_settings() there, to fixup the supported PP mode. But please
> add it with a comment describe *why* we need that fixup.
Yes, really good suggestion, I will have a try.
Regards
Haibo Chen
>
> -michael
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2025-12-12 10:04 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-12-12 8:30 [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of mt35xu512aba" Haibo Chen
2025-12-12 8:30 ` Haibo Chen
2025-12-12 8:34 ` Michael Walle
2025-12-12 8:34 ` Michael Walle
2025-12-12 9:03 ` Bough Chen
2025-12-12 9:03 ` Bough Chen
2025-12-12 9:25 ` Michael Walle
2025-12-12 9:25 ` Michael Walle
2025-12-12 10:04 ` Bough Chen
2025-12-12 10:04 ` Bough Chen
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