All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Alexandre Courbot" <acourbot@nvidia.com>
To: "Timur Tabi" <ttabi@nvidia.com>,
	"Danilo Krummrich" <dakr@kernel.org>,
	"Alexandre Courbot" <acourbot@nvidia.com>,
	"Joel Fernandes" <joelagnelf@nvidia.com>,
	"John Hubbard" <jhubbard@nvidia.com>,
	<nouveau@lists.freedesktop.org>, <rust-for-linux@vger.kernel.org>
Subject: Re: [PATCH v4 05/11] gpu: nova-core: add NV_PFALCON_FALCON_DMATRFCMD::with_falcon_mem()
Date: Thu, 18 Dec 2025 20:24:06 +0900	[thread overview]
Message-ID: <DF1AZ2RXM0XC.2Y727UF1GPS8F@nvidia.com> (raw)
In-Reply-To: <20251218032955.979623-6-ttabi@nvidia.com>

On Thu Dec 18, 2025 at 12:29 PM JST, Timur Tabi wrote:
> The with_falcon_mem() method initializes the 'imem' and 'sec' fields of
> the NV_PFALCON_FALCON_DMATRFCMD register based on the value of
> the FalconMem type.
>
> Signed-off-by: Timur Tabi <ttabi@nvidia.com>
> ---
>  drivers/gpu/nova-core/falcon.rs | 16 ++++------------
>  drivers/gpu/nova-core/regs.rs   |  9 +++++++++
>  2 files changed, 13 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs
> index b92152277d00..44a1a531a361 100644
> --- a/drivers/gpu/nova-core/falcon.rs
> +++ b/drivers/gpu/nova-core/falcon.rs
> @@ -454,7 +454,6 @@ fn dma_wr<F: FalconFirmware<Target = E>>(
>          fw: &F,
>          target_mem: FalconMem,
>          load_offsets: FalconLoadTarget,
> -        sec: bool,
>      ) -> Result {
>          const DMA_LEN: u32 = 256;
>  
> @@ -516,8 +515,7 @@ fn dma_wr<F: FalconFirmware<Target = E>>(
>  
>          let cmd = regs::NV_PFALCON_FALCON_DMATRFCMD::default()
>              .set_size(DmaTrfCmdSize::Size256B)
> -            .set_imem(target_mem != FalconMem::Dmem)
> -            .set_sec(if sec { 1 } else { 0 });
> +            .with_falcon_mem(target_mem);
>  
>          for pos in (0..num_transfers).map(|i| i * DMA_LEN) {
>              // Perform a transfer of size `DMA_LEN`.
> @@ -551,21 +549,15 @@ pub(crate) fn dma_load<F: FalconFirmware<Target = E>>(&self, bar: &Bar0, fw: &F)
>                  .set_mem_type(FalconFbifMemType::Physical)
>          });
>  
> -        self.dma_wr(
> -            bar,
> -            fw,
> -            FalconMem::ImemSecure,
> -            fw.imem_sec_load_params(),
> -            true,
> -        )?;
> -        self.dma_wr(bar, fw, FalconMem::Dmem, fw.dmem_load_params(), true)?;
> +        self.dma_wr(bar, fw, FalconMem::ImemSecure, fw.imem_sec_load_params())?;
> +        self.dma_wr(bar, fw, FalconMem::Dmem, fw.dmem_load_params())?;
>  
>          if let Some(nmem) = fw.imem_ns_load_params() {
>              // This code should never actual get executed, because the Non-Secure
>              // section only exists on firmware used by Turing and GA100, and
>              // those platforms do not use DMA.  But we include this code for
>              // consistency.
> -            self.dma_wr(bar, fw, FalconMem::ImemNonSecure, nmem, false)?;
> +            self.dma_wr(bar, fw, FalconMem::ImemNonSecure, nmem)?;
>          }
>  
>          self.hal.program_brom(self, bar, &fw.brom_params())?;
> diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs
> index 82cc6c0790e5..c049f5aaf2f2 100644
> --- a/drivers/gpu/nova-core/regs.rs
> +++ b/drivers/gpu/nova-core/regs.rs
> @@ -16,6 +16,7 @@
>          FalconCoreRevSubversion,
>          FalconFbifMemType,
>          FalconFbifTarget,
> +        FalconMem,
>          FalconModSelAlgo,
>          FalconSecurityModel,
>          PFalcon2Base,
> @@ -325,6 +326,14 @@ pub(crate) fn mem_scrubbing_done(self) -> bool {
>      16:16   set_dmtag as u8;
>  });
>  
> +impl NV_PFALCON_FALCON_DMATRFCMD {
> +    /// Programs the 'imem' and 'sec' fields for the given FalconMem

Nit: should be `imem` and `sec` so rustdoc properly formats them.


  reply	other threads:[~2025-12-18 11:24 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-18  3:29 [PATCH v4 00/11] gpu: nova-core: add Turing support Timur Tabi
2025-12-18  3:29 ` [PATCH v4 01/11] gpu: nova-core: rename Imem to ImemSecure Timur Tabi
2025-12-31 19:29   ` John Hubbard
2025-12-18  3:29 ` [PATCH v4 02/11] gpu: nova-core: add ImemNonSecure section infrastructure Timur Tabi
2025-12-31 19:35   ` John Hubbard
2025-12-18  3:29 ` [PATCH v4 03/11] gpu: nova-core: support header parsing on Turing/GA100 Timur Tabi
2025-12-31 19:58   ` John Hubbard
2025-12-18  3:29 ` [PATCH v4 04/11] gpu: nova-core: add support for Turing/GA100 fwsignature Timur Tabi
2025-12-31 19:28   ` John Hubbard
2025-12-18  3:29 ` [PATCH v4 05/11] gpu: nova-core: add NV_PFALCON_FALCON_DMATRFCMD::with_falcon_mem() Timur Tabi
2025-12-18 11:24   ` Alexandre Courbot [this message]
2025-12-31 21:35   ` John Hubbard
2025-12-18  3:29 ` [PATCH v4 06/11] gpu: nova-core: move some functions into the HAL Timur Tabi
2025-12-18 11:25   ` Alexandre Courbot
2025-12-31 22:07   ` John Hubbard
2025-12-18  3:29 ` [PATCH v4 07/11] gpu: nova-core: Add basic Turing HAL Timur Tabi
2025-12-31 22:54   ` John Hubbard
2025-12-18  3:29 ` [PATCH v4 08/11] gpu: nova-core: add Falcon HAL method supports_dma() Timur Tabi
2025-12-18  7:48   ` Alexandre Courbot
2025-12-19 12:49     ` Alexandre Courbot
2025-12-18  3:29 ` [PATCH v4 09/11] gpu: nova-core: add FalconUCodeDescV2 support Timur Tabi
2025-12-18  8:01   ` Alexandre Courbot
2025-12-18  3:29 ` [PATCH v4 10/11] gpu: nova-core: align LibosMemoryRegionInitArgument size to page size Timur Tabi
2025-12-18 11:54   ` Alexandre Courbot
2025-12-18 22:51     ` Timur Tabi
2025-12-19  3:43       ` Alexandre Courbot
2025-12-19  4:34         ` Timur Tabi
2025-12-19  5:55           ` Alexandre Courbot
2025-12-18  3:29 ` [PATCH v4 11/11] gpu: nova-core: add PIO support for loading firmware images Timur Tabi
2025-12-18 12:59   ` Alexandre Courbot
2025-12-30 22:56     ` Timur Tabi
2025-12-31 23:22       ` Timur Tabi
2025-12-31 21:30     ` Timur Tabi
2025-12-28 17:45 ` [PATCH v4 00/11] gpu: nova-core: add Turing support Ewan Chorynski
2025-12-30 21:42   ` Timur Tabi
2026-01-04 10:21     ` Ewan Chorynski
2026-01-04 15:01       ` Timur Tabi
2025-12-31  2:58 ` John Hubbard
2025-12-31  4:26   ` Timur Tabi
2025-12-31  6:17     ` John Hubbard
2025-12-31 16:33       ` Timur Tabi
2025-12-31 17:29         ` John Hubbard
2025-12-31 19:15           ` John Hubbard
2025-12-31 19:23             ` Timur Tabi
2025-12-31 20:06 ` John Hubbard
2025-12-31 20:11   ` Timur Tabi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=DF1AZ2RXM0XC.2Y727UF1GPS8F@nvidia.com \
    --to=acourbot@nvidia.com \
    --cc=dakr@kernel.org \
    --cc=jhubbard@nvidia.com \
    --cc=joelagnelf@nvidia.com \
    --cc=nouveau@lists.freedesktop.org \
    --cc=rust-for-linux@vger.kernel.org \
    --cc=ttabi@nvidia.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.