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From: "Alexandre Courbot" <acourbot@nvidia.com>
To: "Timur Tabi" <ttabi@nvidia.com>,
	"Danilo Krummrich" <dakr@kernel.org>,
	"Alexandre Courbot" <acourbot@nvidia.com>,
	"Joel Fernandes" <joelagnelf@nvidia.com>,
	"John Hubbard" <jhubbard@nvidia.com>,
	<nouveau@lists.freedesktop.org>, <rust-for-linux@vger.kernel.org>
Subject: Re: [PATCH v4 10/11] gpu: nova-core: align LibosMemoryRegionInitArgument size to page size
Date: Thu, 18 Dec 2025 20:54:09 +0900	[thread overview]
Message-ID: <DF1BM2Z71OY4.246P9YGJC6J4N@nvidia.com> (raw)
In-Reply-To: <20251218032955.979623-11-ttabi@nvidia.com>

On Thu Dec 18, 2025 at 12:29 PM JST, Timur Tabi wrote:
> On Turing and GA100 (i.e. the versions that use Libos v2), GSP-RM insists
> that the 'size' parameter of the LibosMemoryRegionInitArgument struct be
> aligned to 4KB.  The logging buffers are already aligned to that size, so
> only the GSP_ARGUMENTS_CACHED struct needs to be adjusted.  Make that
> adjustment by adding padding to the end of the struct.
>
> Signed-off-by: Timur Tabi <ttabi@nvidia.com>
> ---
>  drivers/gpu/nova-core/gsp/fw.rs | 24 +++++++++++++++++-------
>  1 file changed, 17 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/fw.rs
> index abffd6beec65..ab3ad038889c 100644
> --- a/drivers/gpu/nova-core/gsp/fw.rs
> +++ b/drivers/gpu/nova-core/gsp/fw.rs
> @@ -889,17 +889,27 @@ unsafe impl AsBytes for GspMsgElement {}
>  unsafe impl FromBytes for GspMsgElement {}
>  
>  /// Arguments for GSP startup.
> -#[repr(transparent)]
> -pub(crate) struct GspArgumentsCached(bindings::GSP_ARGUMENTS_CACHED);
> +///
> +/// On Turing and GA100, the entries in the `LibosMemoryRegionInitArgument`
> +/// must all be a multiple of GSP_PAGE_SIZE in size, so add padding to force it
> +/// to that size.
> +#[repr(C)]
> +pub(crate) struct GspArgumentsCached(
> +    bindings::GSP_ARGUMENTS_CACHED,
> +    [u8; GSP_PAGE_SIZE - core::mem::size_of::<bindings::GSP_ARGUMENTS_CACHED>()],
> +);

In gsp.rs we are still initializing the rmarg as follows:

    dma_write!(rmargs[0] = fw::GspArgumentsCached::new(&cmdq))?;

Which passes the `GspArgumentsCached` queue by value to
`CoherentAllocation::field_write`, i.e. 4KB on the stack.

So I think the proper approach is to keep `GspArgumentsCached` as-is,
and use a different type just for allocation:

diff --git a/drivers/gpu/nova-core/gsp.rs b/drivers/gpu/nova-core/gsp.rs
index fb6f74797178..0feaff5784a7 100644
--- a/drivers/gpu/nova-core/gsp.rs
+++ b/drivers/gpu/nova-core/gsp.rs
@@ -25,10 +25,9 @@
 };

 use crate::{
-    gsp::cmdq::Cmdq,
-    gsp::fw::{
-        GspArgumentsCached,
-        LibosMemoryRegionInitArgument, //
+    gsp::{
+        cmdq::Cmdq,
+        fw::LibosMemoryRegionInitArgument, //
     },
     num,
 };
@@ -114,7 +113,7 @@ pub(crate) struct Gsp {
     /// Command queue.
     pub(crate) cmdq: Cmdq,
     /// RM arguments.
-    rmargs: CoherentAllocation<GspArgumentsCached>,
+    rmargs: CoherentAllocation<fw::GspArgumentsAligned>,
 }

 impl Gsp {
@@ -141,12 +140,12 @@ pub(crate) fn new(pdev: &pci::Device<device::Bound>) -> Result<impl PinInit<Self

         let cmdq = Cmdq::new(dev)?;

-        let rmargs = CoherentAllocation::<GspArgumentsCached>::alloc_coherent(
+        let rmargs = CoherentAllocation::<fw::GspArgumentsAligned>::alloc_coherent(
             dev,
             1,
             GFP_KERNEL | __GFP_ZERO,
         )?;
-        dma_write!(rmargs[0] = fw::GspArgumentsCached::new(&cmdq))?;
+        dma_write!(rmargs[0].inner = fw::GspArgumentsCached::new(&cmdq))?;
         dma_write!(libos[3] = LibosMemoryRegionInitArgument::new("RMARGS", &rmargs))?;

         Ok(try_pin_init!(Self {
diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/fw.rs
index abffd6beec65..15ca9c183ae1 100644
--- a/drivers/gpu/nova-core/gsp/fw.rs
+++ b/drivers/gpu/nova-core/gsp/fw.rs
@@ -906,9 +906,21 @@ pub(crate) fn new(cmdq: &Cmdq) -> Self {
 // SAFETY: Padding is explicit and will not contain uninitialized data.
 unsafe impl AsBytes for GspArgumentsCached {}

+/// On Turing and GA100, the entries in the `LibosMemoryRegionInitArgument`
+/// must all be a multiple of GSP_PAGE_SIZE in size, so add padding to force it
+/// to that size.
+#[repr(C)]
+pub(crate) struct GspArgumentsAligned {
+    pub(crate) inner: GspArgumentsCached,
+    _padding: [u8; GSP_PAGE_SIZE - core::mem::size_of::<bindings::GSP_ARGUMENTS_CACHED>()],
+}
+
+// SAFETY: Padding is explicit and will not contain uninitialized data.
+unsafe impl AsBytes for GspArgumentsAligned {}
+
 // SAFETY: This struct only contains integer types for which all bit patterns
 // are valid.
-unsafe impl FromBytes for GspArgumentsCached {}
+unsafe impl FromBytes for GspArgumentsAligned {}

 /// Init arguments for the message queue.
 #[repr(transparent)]

  reply	other threads:[~2025-12-18 11:54 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-18  3:29 [PATCH v4 00/11] gpu: nova-core: add Turing support Timur Tabi
2025-12-18  3:29 ` [PATCH v4 01/11] gpu: nova-core: rename Imem to ImemSecure Timur Tabi
2025-12-31 19:29   ` John Hubbard
2025-12-18  3:29 ` [PATCH v4 02/11] gpu: nova-core: add ImemNonSecure section infrastructure Timur Tabi
2025-12-31 19:35   ` John Hubbard
2025-12-18  3:29 ` [PATCH v4 03/11] gpu: nova-core: support header parsing on Turing/GA100 Timur Tabi
2025-12-31 19:58   ` John Hubbard
2025-12-18  3:29 ` [PATCH v4 04/11] gpu: nova-core: add support for Turing/GA100 fwsignature Timur Tabi
2025-12-31 19:28   ` John Hubbard
2025-12-18  3:29 ` [PATCH v4 05/11] gpu: nova-core: add NV_PFALCON_FALCON_DMATRFCMD::with_falcon_mem() Timur Tabi
2025-12-18 11:24   ` Alexandre Courbot
2025-12-31 21:35   ` John Hubbard
2025-12-18  3:29 ` [PATCH v4 06/11] gpu: nova-core: move some functions into the HAL Timur Tabi
2025-12-18 11:25   ` Alexandre Courbot
2025-12-31 22:07   ` John Hubbard
2025-12-18  3:29 ` [PATCH v4 07/11] gpu: nova-core: Add basic Turing HAL Timur Tabi
2025-12-31 22:54   ` John Hubbard
2025-12-18  3:29 ` [PATCH v4 08/11] gpu: nova-core: add Falcon HAL method supports_dma() Timur Tabi
2025-12-18  7:48   ` Alexandre Courbot
2025-12-19 12:49     ` Alexandre Courbot
2025-12-18  3:29 ` [PATCH v4 09/11] gpu: nova-core: add FalconUCodeDescV2 support Timur Tabi
2025-12-18  8:01   ` Alexandre Courbot
2025-12-18  3:29 ` [PATCH v4 10/11] gpu: nova-core: align LibosMemoryRegionInitArgument size to page size Timur Tabi
2025-12-18 11:54   ` Alexandre Courbot [this message]
2025-12-18 22:51     ` Timur Tabi
2025-12-19  3:43       ` Alexandre Courbot
2025-12-19  4:34         ` Timur Tabi
2025-12-19  5:55           ` Alexandre Courbot
2025-12-18  3:29 ` [PATCH v4 11/11] gpu: nova-core: add PIO support for loading firmware images Timur Tabi
2025-12-18 12:59   ` Alexandre Courbot
2025-12-30 22:56     ` Timur Tabi
2025-12-31 23:22       ` Timur Tabi
2025-12-31 21:30     ` Timur Tabi
2025-12-28 17:45 ` [PATCH v4 00/11] gpu: nova-core: add Turing support Ewan Chorynski
2025-12-30 21:42   ` Timur Tabi
2026-01-04 10:21     ` Ewan Chorynski
2026-01-04 15:01       ` Timur Tabi
2025-12-31  2:58 ` John Hubbard
2025-12-31  4:26   ` Timur Tabi
2025-12-31  6:17     ` John Hubbard
2025-12-31 16:33       ` Timur Tabi
2025-12-31 17:29         ` John Hubbard
2025-12-31 19:15           ` John Hubbard
2025-12-31 19:23             ` Timur Tabi
2025-12-31 20:06 ` John Hubbard
2025-12-31 20:11   ` Timur Tabi

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