From: Alejandro Vallejo <alejandro.garciavallejo@amd.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "Oleksii Kurochko" <oleksii.kurochko@gmail.com>,
"Community Manager" <community.manager@xenproject.org>,
"Andrew Cooper" <andrew.cooper3@citrix.com>,
"Roger Pau Monné" <roger.pau@citrix.com>,
"Anthony PERARD" <anthony.perard@vates.tech>,
"Jason Andryuk" <jason.andryuk@amd.com>,
xen-devel@lists.xenproject.org
Subject: Re: [PATCH v3 0/4] x86: Drop cross-vendor support
Date: Wed, 11 Mar 2026 10:46:40 +0100 [thread overview]
Message-ID: <DGZUVOWBI677.1QXF8LMTNO886@amd.com> (raw)
In-Reply-To: <7973d3d1-8984-421f-88db-ca17ea3cb2ac@suse.com>
On Wed Mar 11, 2026 at 9:54 AM CET, Jan Beulich wrote:
> On 13.02.2026 12:42, Alejandro Vallejo wrote:
>> Alejandro Vallejo (4):
>> x86: Reject CPU policies with vendors other than the host's
>> x86/hvm: Disable cross-vendor handling in #UD handler
>> x86/hvm: Remove cross-vendor checks from MSR handlers.
>> x86/svm: Drop emulation of Intel's SYSENTER behaviour on AMD systems
>
> With this, do we actually want to keep emulation of SYS{ENTER,EXIT,CALL,RET}
> in the insn emulator? Or at least gate that on e.g. VM_EVENT, to still allow
> its use by introspection? Whether to then also permit those with HVM_FEP=y
> (but VM_EVENT=n) would be a follow-on question.
>
> Jan
I can force emulation of anything by writing an instruction to an xAPIC register
followed by RET and then CALL-ing it that address. If we want a hypervisor
capable of running such ridiculous cases the emulator must be complete. If not,
the question is what to do otherwise. Inject #UD? Crash the domain?
Cheers,
Alejandro
next prev parent reply other threads:[~2026-03-11 9:47 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-13 11:42 [PATCH v3 0/4] x86: Drop cross-vendor support Alejandro Vallejo
2026-02-13 11:42 ` [PATCH v3 1/4] x86: Reject CPU policies with vendors other than the host's Alejandro Vallejo
2026-03-11 8:26 ` Jan Beulich
2026-03-11 12:43 ` Alejandro Vallejo
2026-02-13 11:42 ` [PATCH v3 2/4] x86/hvm: Disable cross-vendor handling in #UD handler Alejandro Vallejo
2026-03-11 8:35 ` Jan Beulich
2026-03-11 9:25 ` Alejandro Vallejo
2026-03-11 9:30 ` Jan Beulich
2026-03-11 10:21 ` Alejandro Vallejo
2026-03-11 11:06 ` Jan Beulich
2026-03-11 12:40 ` Alejandro Vallejo
2026-02-13 11:42 ` [PATCH v3 3/4] x86/hvm: Remove cross-vendor checks from MSR handlers Alejandro Vallejo
2026-03-11 8:39 ` Jan Beulich
2026-02-13 11:42 ` [PATCH v3 4/4] x86/svm: Drop emulation of Intel's SYSENTER behaviour on AMD systems Alejandro Vallejo
2026-03-11 8:46 ` Jan Beulich
2026-03-11 9:27 ` Alejandro Vallejo
2026-03-11 8:54 ` [PATCH v3 0/4] x86: Drop cross-vendor support Jan Beulich
2026-03-11 9:46 ` Alejandro Vallejo [this message]
2026-03-11 10:11 ` Jan Beulich
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