From: "Michael Walle" <mwalle@kernel.org>
To: "Weimin Wu" <wuweimin@huaqin.corp-partner.google.com>
Cc: <linux-kernel@vger.kernel.org>, <linux-mtd@lists.infradead.org>,
<pratyush@kernel.org>, <takahiro.kuwano@infineon.com>,
<tudor.ambarus@linaro.org>
Subject: Re: [PATCH] [v4] mtd: spi-nor: gigadevice: Add support for GD25LQ256H
Date: Wed, 27 May 2026 11:43:08 +0200 [thread overview]
Message-ID: <DITD0XS2JNL0.VHZU6IASBYYT@kernel.org> (raw)
In-Reply-To: <20260527032823.771616-1-wuweimin@huaqin.corp-partner.google.com>
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On Wed May 27, 2026 at 5:28 AM CEST, Weimin Wu wrote:
> Add support for the GigaDevice GD25LQ256H (JEDEC ID c8 60 19),
> a 256Mbit (32MB) SPI NOR flash chip which supports SFDP.
>
> Without this patch, The WP status cannot be obtained using flashrom:
> device:/ # flashrom --wp-status
> ...
> linux_mtd_wp_read_cfg:
> ioctl: Operation not supported on transport endpoint
> Failed to get WP status: failed to read the current WP configuration
>
> and with this patch:
> device:/ # flashrom --wp-status
> ...
> Protection range: start=0x00000000 length=0x00000000 (none)
> Protection mode: disabled
> SUCCESS
>
> Link: https://download.gigadevice.com/Datasheet/DS-01085-GD25LQ256H-Rev1.3.pdf
>
> Signed-off-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com>
For reference, this won't fly, as the ID is reused among different
flashes, in particular the GD25LQ255E and the GD25LQ256H, which has
different block protection schemes and one needs SPI_NOR_4BIT_BP
and one doesn't.
-michael
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WARNING: multiple messages have this Message-ID (diff)
From: "Michael Walle" <mwalle@kernel.org>
To: "Weimin Wu" <wuweimin@huaqin.corp-partner.google.com>
Cc: <linux-kernel@vger.kernel.org>, <linux-mtd@lists.infradead.org>,
<pratyush@kernel.org>, <takahiro.kuwano@infineon.com>,
<tudor.ambarus@linaro.org>
Subject: Re: [PATCH] [v4] mtd: spi-nor: gigadevice: Add support for GD25LQ256H
Date: Wed, 27 May 2026 11:43:08 +0200 [thread overview]
Message-ID: <DITD0XS2JNL0.VHZU6IASBYYT@kernel.org> (raw)
In-Reply-To: <20260527032823.771616-1-wuweimin@huaqin.corp-partner.google.com>
[-- Attachment #1: Type: text/plain, Size: 1017 bytes --]
On Wed May 27, 2026 at 5:28 AM CEST, Weimin Wu wrote:
> Add support for the GigaDevice GD25LQ256H (JEDEC ID c8 60 19),
> a 256Mbit (32MB) SPI NOR flash chip which supports SFDP.
>
> Without this patch, The WP status cannot be obtained using flashrom:
> device:/ # flashrom --wp-status
> ...
> linux_mtd_wp_read_cfg:
> ioctl: Operation not supported on transport endpoint
> Failed to get WP status: failed to read the current WP configuration
>
> and with this patch:
> device:/ # flashrom --wp-status
> ...
> Protection range: start=0x00000000 length=0x00000000 (none)
> Protection mode: disabled
> SUCCESS
>
> Link: https://download.gigadevice.com/Datasheet/DS-01085-GD25LQ256H-Rev1.3.pdf
>
> Signed-off-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com>
For reference, this won't fly, as the ID is reused among different
flashes, in particular the GD25LQ255E and the GD25LQ256H, which has
different block protection schemes and one needs SPI_NOR_4BIT_BP
and one doesn't.
-michael
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next prev parent reply other threads:[~2026-05-27 9:43 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-18 8:42 [PATCH] [v3] mtd: spi-nor: gigadevice: Add support for GD25LQ255E Weimin Wu
2026-04-18 8:42 ` Weimin Wu
2026-04-20 7:57 ` Michael Walle
2026-04-20 7:57 ` Michael Walle
2026-04-20 9:42 ` Tudor Ambarus
2026-04-20 9:42 ` Tudor Ambarus
2026-04-20 9:51 ` Takahiro.Kuwano
2026-04-20 9:51 ` Takahiro.Kuwano
2026-04-20 10:44 ` Michael Walle
2026-04-20 10:44 ` Michael Walle
2026-05-26 13:30 ` Weimin Wu
2026-05-26 13:30 ` Weimin Wu
2026-05-27 9:39 ` Michael Walle
2026-05-27 9:39 ` Michael Walle
2026-05-27 3:28 ` [PATCH] [v4] mtd: spi-nor: gigadevice: Add support for GD25LQ256H Weimin Wu
2026-05-27 3:28 ` Weimin Wu
2026-05-27 9:43 ` Michael Walle [this message]
2026-05-27 9:43 ` Michael Walle
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