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From: "Troy Mitchell" <troy.mitchell@linux.dev>
To: "Paul Walmsley" <pjw@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>
Cc: <linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<spacemit@lists.linux.dev>,
	"Anirudh Srinivasan" <asrinivasan@oss.tenstorrent.com>
Subject: Re: [PATCH v2] riscv: mm: fix SWIOTLB initialization for systems with DRAM above 4GB
Date: Mon, 27 Jul 2026 00:12:45 -0700	[thread overview]
Message-ID: <DK9610Z1F0G9.3KQ7JB8NG1HO7@linux.dev> (raw)
In-Reply-To: <57a24fb1-1ca6-3bb5-1c1e-bdcb50ce2b7e@kernel.org>

> > > 2. kmalloc() bounce buffer allocation failure on non-coherent systems:
> > > For non-coherent hardware, a bounce buffer is still mandatory for
> > > cache-line-aligned kmalloc(), even if 32-bit DMA bouncing is skipped.
>
> I'm not sure I'm parsing this correctly.  Shouldn't this read "for
> *non*-cache-aligned kmalloc()" ?  Or am I missing the point?

You are right; this should refer to kmalloc() buffers whose
size is not cache-line-aligned. dma_kmalloc_needs_bounce() requests
bouncing only when dma_kmalloc_size_aligned(size) is false for a
non-coherent device and a direction other than DMA_TO_DEVICE. I will
correct both the commit message and the corresponding code comment in the
next revision.

                                            - Troy

WARNING: multiple messages have this Message-ID (diff)
From: "Troy Mitchell" <troy.mitchell@linux.dev>
To: "Paul Walmsley" <pjw@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>
Cc: <linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<spacemit@lists.linux.dev>,
	"Anirudh Srinivasan" <asrinivasan@oss.tenstorrent.com>
Subject: Re: [PATCH v2] riscv: mm: fix SWIOTLB initialization for systems with DRAM above 4GB
Date: Mon, 27 Jul 2026 00:12:45 -0700	[thread overview]
Message-ID: <DK9610Z1F0G9.3KQ7JB8NG1HO7@linux.dev> (raw)
In-Reply-To: <57a24fb1-1ca6-3bb5-1c1e-bdcb50ce2b7e@kernel.org>

> > > 2. kmalloc() bounce buffer allocation failure on non-coherent systems:
> > > For non-coherent hardware, a bounce buffer is still mandatory for
> > > cache-line-aligned kmalloc(), even if 32-bit DMA bouncing is skipped.
>
> I'm not sure I'm parsing this correctly.  Shouldn't this read "for
> *non*-cache-aligned kmalloc()" ?  Or am I missing the point?

You are right; this should refer to kmalloc() buffers whose
size is not cache-line-aligned. dma_kmalloc_needs_bounce() requests
bouncing only when dma_kmalloc_size_aligned(size) is false for a
non-coherent device and a direction other than DMA_TO_DEVICE. I will
correct both the commit message and the corresponding code comment in the
next revision.

                                            - Troy

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linux-riscv@lists.infradead.org
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  parent reply	other threads:[~2026-07-27  7:12 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-29 11:41 [PATCH v2] riscv: mm: fix SWIOTLB initialization for systems with DRAM above 4GB Troy Mitchell
2026-04-29 11:41 ` Troy Mitchell
2026-06-08  1:22 ` Troy Mitchell
2026-06-08  1:22   ` Troy Mitchell
2026-07-14 15:37 ` Anirudh Srinivasan
2026-07-14 15:37   ` Anirudh Srinivasan
2026-07-20  0:55   ` Paul Walmsley
2026-07-20  0:55     ` Paul Walmsley
2026-07-20 14:54     ` Anirudh Srinivasan
2026-07-20 14:54       ` Anirudh Srinivasan
2026-07-27  7:12     ` Troy Mitchell [this message]
2026-07-27  7:12       ` Troy Mitchell

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