* [PATCH 1/2] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S @ 2026-09-08 23:58 ` Andrey Korshunov 0 siblings, 0 replies; 13+ messages in thread From: Andrey Korshunov @ 2026-09-08 23:58 UTC (permalink / raw) To: Heiko Stuebner Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-rockchip, linux-arm-kernel, devicetree, linux-kernel The NanoPi R28S is a router board from FriendlyElec with the Rockchip RK3528A SoC. Signed-off-by: Andrey Korshunov <razor1702@gmail.com> --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index a799bb843..1d937795a 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -340,6 +340,11 @@ properties: - friendlyarm,nanopi-r2s-plus - const: rockchip,rk3328 + - description: FriendlyElec NanoPi R28S + items: + - const: friendlyarm,nanopi-r28s + - const: rockchip,rk3528 + - description: FriendlyElec NanoPi R3S items: - const: friendlyarm,nanopi-r3s base-commit: df2908090cda368b01ff43709f51890076c56157 -- 2.54.0.windows.1 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 1/2] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S @ 2026-09-08 23:58 ` Andrey Korshunov 0 siblings, 0 replies; 13+ messages in thread From: Andrey Korshunov @ 2026-09-08 23:58 UTC (permalink / raw) To: Heiko Stuebner Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-rockchip, linux-arm-kernel, devicetree, linux-kernel The NanoPi R28S is a router board from FriendlyElec with the Rockchip RK3528A SoC. Signed-off-by: Andrey Korshunov <razor1702@gmail.com> --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index a799bb843..1d937795a 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -340,6 +340,11 @@ properties: - friendlyarm,nanopi-r2s-plus - const: rockchip,rk3328 + - description: FriendlyElec NanoPi R28S + items: + - const: friendlyarm,nanopi-r28s + - const: rockchip,rk3528 + - description: FriendlyElec NanoPi R3S items: - const: friendlyarm,nanopi-r3s base-commit: df2908090cda368b01ff43709f51890076c56157 -- 2.54.0.windows.1 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 2/2] arm64: dts: rockchip: Add FriendlyElec NanoPi R28S 2026-09-08 23:58 ` Andrey Korshunov @ 2026-09-08 23:58 ` Andrey Korshunov -1 siblings, 0 replies; 13+ messages in thread From: Andrey Korshunov @ 2026-09-08 23:58 UTC (permalink / raw) To: Heiko Stuebner Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-rockchip, linux-arm-kernel, devicetree, linux-kernel The NanoPi R28S is a 45x45 mm router board from FriendlyElec with the Rockchip RK3528A SoC. It has the following features: - 1GB LPDDR4 - MicroSD card slot - eMMC module socket - 1x 1GbE RTL8211F Ethernet on gmac1 - 1x 1GbE RTL8111H Ethernet on the PCIe Gen2 x1 controller - AICSemi AIC8800D80 Wi-Fi 6 / Bluetooth module on sdio0 - HYM8563 RTC with battery connector - 1x USB 2.0 Type-C, 5V input and maskrom port - 1x USB Type-C debug console, uart0 behind a USB-UART bridge - 2 buttons (User, Maskrom) - 3 LEDs (SYS, LAN, WAN) The PHY reset is described on the MAC with snps,reset-gpio rather than in the PHY node. This board leaves the PHY in reset unless the bootloader released it, and of_mdio.c reads the PHY ID with get_phy_device() before phy_device_register() picks up a PHY node's reset-gpios, so described that way the PHY is reported missing and the port never comes up. As mii_bus->reset, stmmac runs it before the bus is scanned and defers the probe until the GPIO controller is available. Signed-off-by: Andrey Korshunov <razor1702@gmail.com> --- Tested on the board, booting Armbian images built from this device tree on 7.2.4 and on v7.3-rc2. Both Ethernet ports carry link: stmmac finds the RTL8211F on mdio1, and the RTL8111H enumerates behind the PCIe root port. adc-keys and the HYM8563 RTC probe, and the system runs off the SD card, iozone included. An earlier build on v7.3-rc1 wedged the SD host - dw_mmc timing out on a bare SDMMC_CMD_UPD_CLK, the card then rescanned in a loop, boots taking minutes or hanging before the rootfs appeared. Neither v7.2.4 nor v7.3-rc2 does that with the same device tree file, so it did not come from here. dwc3 is the one node not exercised beyond probing - the board's only USB port is the Type-C jack that takes the 5V input and doubles as the maskrom port, so there is nothing for it to talk to. arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3528-nanopi-r28s.dts | 387 ++++++++++++++++++ 2 files changed, 388 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index e7936a21c..12e117159 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -94,6 +94,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-vicharak-vaaman.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-armsom-sige1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-hinlink-h28k.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-nanopi-r28s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-nanopi-zero2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-radxa-e20c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2a.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts new file mode 100644 index 000000000..a699b72cf --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts @@ -0,0 +1,387 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2026 FriendlyElec Computer Tech. Co., Ltd. + */ + +/dts-v1/; + +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pwm/pwm.h> +#include "rk3528.dtsi" + +/ { + model = "FriendlyElec NanoPi R28S"; + compatible = "friendlyarm,nanopi-r28s", "rockchip,rk3528"; + + aliases { + ethernet0 = &gmac1; + i2c1 = &i2c1; + mmc0 = &sdhci; + mmc1 = &sdmmc; + mmc2 = &sdio0; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:1500000n8"; + }; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + button-maskrom { + label = "MASKROM"; + linux,code = <KEY_SETUP>; + press-threshold-microvolt = <0>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&user_key>; + + button-user { + gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>; + label = "USER"; + linux,code = <BTN_1>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&lan_led_g>, <&sys_led_r>, <&wan_led_g>; + + led-lan { + color = <LED_COLOR_ID_GREEN>; + default-state = "off"; + function = LED_FUNCTION_LAN; + gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "netdev"; + }; + + led-sys { + color = <LED_COLOR_ID_RED>; + default-state = "on"; + function = LED_FUNCTION_HEARTBEAT; + gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + led-wan { + color = <LED_COLOR_ID_GREEN>; + default-state = "off"; + function = LED_FUNCTION_WAN; + gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "netdev"; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + post-power-on-delay-ms = <100>; + power-off-delay-us = <5000000>; + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; + }; + + vdd_0v9: regulator-0v9-vdd { + compatible = "regulator-fixed"; + regulator-name = "vdd_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc_ddr: regulator-1v1-vcc-ddr { + compatible = "regulator-fixed"; + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc_1v8: regulator-1v8-vcc { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc_3v3: regulator-3v3-vcc { + compatible = "regulator-fixed"; + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc3v3_sd: regulator-3v3-vcc-sd { + compatible = "regulator-fixed"; + gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_pwren_l>; + regulator-name = "vcc3v3_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_3v3>; + }; + + vcc5v0_sys: regulator-5v0-vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vccio_sd: regulator-vccio-sd { + compatible = "regulator-gpio"; + gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_vol_ctrl_h>; + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + states = <1800000 0x0>, <3300000 0x1>; + vin-supply = <&vcc5v0_sys>; + }; + + vdd_arm: regulator-vdd-arm { + compatible = "pwm-regulator"; + pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>; + pwm-supply = <&vcc5v0_sys>; + regulator-name = "vdd_arm"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <746000>; + regulator-max-microvolt = <1201000>; + regulator-settling-time-up-us = <250>; + }; + + vdd_logic: regulator-vdd-logic { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>; + pwm-supply = <&vcc5v0_sys>; + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <705000>; + regulator-max-microvolt = <1006000>; + regulator-settling-time-up-us = <250>; + }; +}; + +&combphy { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&cpu1 { + cpu-supply = <&vdd_arm>; +}; + +&cpu2 { + cpu-supply = <&vdd_arm>; +}; + +&cpu3 { + cpu-supply = <&vdd_arm>; +}; + +&gmac1 { + clock_in_out = "output"; + phy-handle = <&rgmii_phy>; + phy-mode = "rgmii-id"; + phy-supply = <&vcc_3v3>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>, + <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>, <&gmac1_rstn_l>; + snps,reset-active-low; + snps,reset-delays-us = <0 20000 100000>; + snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_logic>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1m0_xfer>; + status = "okay"; + + rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + interrupt-parent = <&gpio4>; + interrupts = <RK_PC1 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&rtc_int_l>; + wakeup-source; + }; +}; + +&mdio1 { + rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x1>; + }; +}; + +&pcie { + reset-gpios = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc_3v3>; + status = "okay"; +}; + +&pinctrl { + ethernet { + gmac1_rstn_l: gmac1-rstn-l { + rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + gpio-keys { + user_key: user-key { + rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + lan_led_g: lan-led-g { + rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + sys_led_r: sys-led-r { + rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wan_led_g: wan-led-g { + rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + rtc { + rtc_int_l: rtc-int-l { + rockchip,pins = <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdmmc { + sdmmc_pwren_l: sdmmc-pwren-l { + rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h { + rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm1m0_pins>; + status = "okay"; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm2m0_pins>; + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc_1v8>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + no-sd; + no-sdio; + non-removable; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_1v8>; + status = "okay"; +}; + +/* Guangzhou Shikun SKI.WB800D80S.1 module, an AICSemi AIC8800D80. */ +&sdio0 { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + no-mmc; + no-sd; + non-removable; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_1v8>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0m0_xfer>; + status = "okay"; +}; + +/* + * The only USB port on the board is the Type-C jack silkscreened 5V/OTG: it + * takes the 5 V input and doubles as the maskrom/eMMC flashing port, so the + * controller is device-only. The debug console is not a port of this SoC + * either - it reaches uart0 through a separate USB-UART bridge. + */ +&usb_host0_xhci { + dr_mode = "peripheral"; + extcon = <&usb2phy>; + maximum-speed = "high-speed"; + phys = <&usb2phy_otg>; + phy-names = "usb2-phy"; + status = "okay"; +}; + +&usb2phy { + status = "okay"; +}; + +&usb2phy_otg { + status = "okay"; +}; -- 2.54.0.windows.1 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 2/2] arm64: dts: rockchip: Add FriendlyElec NanoPi R28S @ 2026-09-08 23:58 ` Andrey Korshunov 0 siblings, 0 replies; 13+ messages in thread From: Andrey Korshunov @ 2026-09-08 23:58 UTC (permalink / raw) To: Heiko Stuebner Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-rockchip, linux-arm-kernel, devicetree, linux-kernel The NanoPi R28S is a 45x45 mm router board from FriendlyElec with the Rockchip RK3528A SoC. It has the following features: - 1GB LPDDR4 - MicroSD card slot - eMMC module socket - 1x 1GbE RTL8211F Ethernet on gmac1 - 1x 1GbE RTL8111H Ethernet on the PCIe Gen2 x1 controller - AICSemi AIC8800D80 Wi-Fi 6 / Bluetooth module on sdio0 - HYM8563 RTC with battery connector - 1x USB 2.0 Type-C, 5V input and maskrom port - 1x USB Type-C debug console, uart0 behind a USB-UART bridge - 2 buttons (User, Maskrom) - 3 LEDs (SYS, LAN, WAN) The PHY reset is described on the MAC with snps,reset-gpio rather than in the PHY node. This board leaves the PHY in reset unless the bootloader released it, and of_mdio.c reads the PHY ID with get_phy_device() before phy_device_register() picks up a PHY node's reset-gpios, so described that way the PHY is reported missing and the port never comes up. As mii_bus->reset, stmmac runs it before the bus is scanned and defers the probe until the GPIO controller is available. Signed-off-by: Andrey Korshunov <razor1702@gmail.com> --- Tested on the board, booting Armbian images built from this device tree on 7.2.4 and on v7.3-rc2. Both Ethernet ports carry link: stmmac finds the RTL8211F on mdio1, and the RTL8111H enumerates behind the PCIe root port. adc-keys and the HYM8563 RTC probe, and the system runs off the SD card, iozone included. An earlier build on v7.3-rc1 wedged the SD host - dw_mmc timing out on a bare SDMMC_CMD_UPD_CLK, the card then rescanned in a loop, boots taking minutes or hanging before the rootfs appeared. Neither v7.2.4 nor v7.3-rc2 does that with the same device tree file, so it did not come from here. dwc3 is the one node not exercised beyond probing - the board's only USB port is the Type-C jack that takes the 5V input and doubles as the maskrom port, so there is nothing for it to talk to. arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3528-nanopi-r28s.dts | 387 ++++++++++++++++++ 2 files changed, 388 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index e7936a21c..12e117159 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -94,6 +94,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-vicharak-vaaman.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-armsom-sige1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-hinlink-h28k.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-nanopi-r28s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-nanopi-zero2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-radxa-e20c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2a.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts new file mode 100644 index 000000000..a699b72cf --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts @@ -0,0 +1,387 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2026 FriendlyElec Computer Tech. Co., Ltd. + */ + +/dts-v1/; + +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pwm/pwm.h> +#include "rk3528.dtsi" + +/ { + model = "FriendlyElec NanoPi R28S"; + compatible = "friendlyarm,nanopi-r28s", "rockchip,rk3528"; + + aliases { + ethernet0 = &gmac1; + i2c1 = &i2c1; + mmc0 = &sdhci; + mmc1 = &sdmmc; + mmc2 = &sdio0; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:1500000n8"; + }; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + button-maskrom { + label = "MASKROM"; + linux,code = <KEY_SETUP>; + press-threshold-microvolt = <0>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&user_key>; + + button-user { + gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>; + label = "USER"; + linux,code = <BTN_1>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&lan_led_g>, <&sys_led_r>, <&wan_led_g>; + + led-lan { + color = <LED_COLOR_ID_GREEN>; + default-state = "off"; + function = LED_FUNCTION_LAN; + gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "netdev"; + }; + + led-sys { + color = <LED_COLOR_ID_RED>; + default-state = "on"; + function = LED_FUNCTION_HEARTBEAT; + gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + led-wan { + color = <LED_COLOR_ID_GREEN>; + default-state = "off"; + function = LED_FUNCTION_WAN; + gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "netdev"; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + post-power-on-delay-ms = <100>; + power-off-delay-us = <5000000>; + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; + }; + + vdd_0v9: regulator-0v9-vdd { + compatible = "regulator-fixed"; + regulator-name = "vdd_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc_ddr: regulator-1v1-vcc-ddr { + compatible = "regulator-fixed"; + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc_1v8: regulator-1v8-vcc { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc_3v3: regulator-3v3-vcc { + compatible = "regulator-fixed"; + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc3v3_sd: regulator-3v3-vcc-sd { + compatible = "regulator-fixed"; + gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_pwren_l>; + regulator-name = "vcc3v3_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_3v3>; + }; + + vcc5v0_sys: regulator-5v0-vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vccio_sd: regulator-vccio-sd { + compatible = "regulator-gpio"; + gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_vol_ctrl_h>; + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + states = <1800000 0x0>, <3300000 0x1>; + vin-supply = <&vcc5v0_sys>; + }; + + vdd_arm: regulator-vdd-arm { + compatible = "pwm-regulator"; + pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>; + pwm-supply = <&vcc5v0_sys>; + regulator-name = "vdd_arm"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <746000>; + regulator-max-microvolt = <1201000>; + regulator-settling-time-up-us = <250>; + }; + + vdd_logic: regulator-vdd-logic { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>; + pwm-supply = <&vcc5v0_sys>; + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <705000>; + regulator-max-microvolt = <1006000>; + regulator-settling-time-up-us = <250>; + }; +}; + +&combphy { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&cpu1 { + cpu-supply = <&vdd_arm>; +}; + +&cpu2 { + cpu-supply = <&vdd_arm>; +}; + +&cpu3 { + cpu-supply = <&vdd_arm>; +}; + +&gmac1 { + clock_in_out = "output"; + phy-handle = <&rgmii_phy>; + phy-mode = "rgmii-id"; + phy-supply = <&vcc_3v3>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>, + <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>, <&gmac1_rstn_l>; + snps,reset-active-low; + snps,reset-delays-us = <0 20000 100000>; + snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_logic>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1m0_xfer>; + status = "okay"; + + rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + interrupt-parent = <&gpio4>; + interrupts = <RK_PC1 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&rtc_int_l>; + wakeup-source; + }; +}; + +&mdio1 { + rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x1>; + }; +}; + +&pcie { + reset-gpios = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc_3v3>; + status = "okay"; +}; + +&pinctrl { + ethernet { + gmac1_rstn_l: gmac1-rstn-l { + rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + gpio-keys { + user_key: user-key { + rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + lan_led_g: lan-led-g { + rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + sys_led_r: sys-led-r { + rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wan_led_g: wan-led-g { + rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + rtc { + rtc_int_l: rtc-int-l { + rockchip,pins = <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdmmc { + sdmmc_pwren_l: sdmmc-pwren-l { + rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h { + rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm1m0_pins>; + status = "okay"; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm2m0_pins>; + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc_1v8>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + no-sd; + no-sdio; + non-removable; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_1v8>; + status = "okay"; +}; + +/* Guangzhou Shikun SKI.WB800D80S.1 module, an AICSemi AIC8800D80. */ +&sdio0 { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + no-mmc; + no-sd; + non-removable; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_1v8>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0m0_xfer>; + status = "okay"; +}; + +/* + * The only USB port on the board is the Type-C jack silkscreened 5V/OTG: it + * takes the 5 V input and doubles as the maskrom/eMMC flashing port, so the + * controller is device-only. The debug console is not a port of this SoC + * either - it reaches uart0 through a separate USB-UART bridge. + */ +&usb_host0_xhci { + dr_mode = "peripheral"; + extcon = <&usb2phy>; + maximum-speed = "high-speed"; + phys = <&usb2phy_otg>; + phy-names = "usb2-phy"; + status = "okay"; +}; + +&usb2phy { + status = "okay"; +}; + +&usb2phy_otg { + status = "okay"; +}; -- 2.54.0.windows.1 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 1/2] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S 2026-09-08 23:58 ` Andrey Korshunov @ 2026-09-09 10:29 ` Diederik de Haas -1 siblings, 0 replies; 13+ messages in thread From: Diederik de Haas @ 2026-09-09 10:29 UTC (permalink / raw) To: Andrey Korshunov, Heiko Stuebner Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-rockchip, linux-arm-kernel, devicetree, linux-kernel On Wed Sep 9, 2026 at 1:58 AM CEST, Andrey Korshunov wrote: > The NanoPi R28S is a router board from FriendlyElec with the Rockchip > RK3528A SoC. There's already an attempt in the works to upstream NanoPi R28S support: https://lore.kernel.org/linux-rockchip/20260907-r28s-upstream-v2-0-21ab570fc91c@proton.me/ Cheers, Diederik > > Signed-off-by: Andrey Korshunov <razor1702@gmail.com> > --- > Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml > index a799bb843..1d937795a 100644 > --- a/Documentation/devicetree/bindings/arm/rockchip.yaml > +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml > @@ -340,6 +340,11 @@ properties: > - friendlyarm,nanopi-r2s-plus > - const: rockchip,rk3328 > > + - description: FriendlyElec NanoPi R28S > + items: > + - const: friendlyarm,nanopi-r28s > + - const: rockchip,rk3528 > + > - description: FriendlyElec NanoPi R3S > items: > - const: friendlyarm,nanopi-r3s > > base-commit: df2908090cda368b01ff43709f51890076c56157 ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/2] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S @ 2026-09-09 10:29 ` Diederik de Haas 0 siblings, 0 replies; 13+ messages in thread From: Diederik de Haas @ 2026-09-09 10:29 UTC (permalink / raw) To: Andrey Korshunov, Heiko Stuebner Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-rockchip, linux-arm-kernel, devicetree, linux-kernel On Wed Sep 9, 2026 at 1:58 AM CEST, Andrey Korshunov wrote: > The NanoPi R28S is a router board from FriendlyElec with the Rockchip > RK3528A SoC. There's already an attempt in the works to upstream NanoPi R28S support: https://lore.kernel.org/linux-rockchip/20260907-r28s-upstream-v2-0-21ab570fc91c@proton.me/ Cheers, Diederik > > Signed-off-by: Andrey Korshunov <razor1702@gmail.com> > --- > Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml > index a799bb843..1d937795a 100644 > --- a/Documentation/devicetree/bindings/arm/rockchip.yaml > +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml > @@ -340,6 +340,11 @@ properties: > - friendlyarm,nanopi-r2s-plus > - const: rockchip,rk3328 > > + - description: FriendlyElec NanoPi R28S > + items: > + - const: friendlyarm,nanopi-r28s > + - const: rockchip,rk3528 > + > - description: FriendlyElec NanoPi R3S > items: > - const: friendlyarm,nanopi-r3s > > base-commit: df2908090cda368b01ff43709f51890076c56157 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/2] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S 2026-09-09 10:29 ` Diederik de Haas @ 2026-09-09 13:47 ` Andrey Korshunov -1 siblings, 0 replies; 13+ messages in thread From: Andrey Korshunov @ 2026-09-09 13:47 UTC (permalink / raw) To: diederik Cc: heiko, robh, krzk+dt, conor+dt, linux-rockchip, linux-arm-kernel, devicetree, linux-kernel On Wed Sep 9, 2026 at 12:29 PM CEST, Diederik de Haas wrote: > There's already an attempt in the works to upstream NanoPi R28S support: > https://lore.kernel.org/linux-rockchip/20260907-r28s-upstream-v2-0-21ab570fc91c@proton.me/ Thanks, I had not seen it - I searched lore before sending, evidently not well enough. That series is further along and covers more of the board, so please drop mine. I have the hardware and will review and test that one instead. One finding about the PHY reset has gone to patch 2 of that thread. Andrey ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/2] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S @ 2026-09-09 13:47 ` Andrey Korshunov 0 siblings, 0 replies; 13+ messages in thread From: Andrey Korshunov @ 2026-09-09 13:47 UTC (permalink / raw) To: diederik Cc: heiko, robh, krzk+dt, conor+dt, linux-rockchip, linux-arm-kernel, devicetree, linux-kernel On Wed Sep 9, 2026 at 12:29 PM CEST, Diederik de Haas wrote: > There's already an attempt in the works to upstream NanoPi R28S support: > https://lore.kernel.org/linux-rockchip/20260907-r28s-upstream-v2-0-21ab570fc91c@proton.me/ Thanks, I had not seen it - I searched lore before sending, evidently not well enough. That series is further along and covers more of the board, so please drop mine. I have the hardware and will review and test that one instead. One finding about the PHY reset has gone to patch 2 of that thread. Andrey _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 0/2] arm64: dts: rockchip: Add FriendlyElec NanoPi R28S
@ 2026-09-05 11:17 安容 via B4 Relay
2026-09-05 11:17 ` 安容 via B4 Relay
0 siblings, 1 reply; 13+ messages in thread
From: 安容 via B4 Relay @ 2026-09-05 11:17 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
jensen, 安容
The [NanoPi R28S](https://wiki.friendlyelec.com/wiki/index.php/NanoPi_R28S) is a dual gigabit Ethernet router board based on the
Rockchip RK3528 SoC. It is closely related to the already supported
NanoPi Zero2, sharing most of its power tree and peripheral routing.
Tested on a metal-case unit without the optional onboard eMMC: boots
from microSD, both Ethernet ports link up at 1000 Mbps, the HYM8563 RTC
registers, and all three LEDs are functional. The USB Type-C connector
registers as a DWC3 UDC in peripheral mode; gadget enumeration against
a USB host was not completed, because that connector is also the 5V
input and a PC port cannot power the board.
The patch referred to [fridendlyarm/kernel-rockchip](https://github.com/friendlyarm/kernel-rockchip/commit/ee640c5344b13a0a317436e2357df01af8268ce7) but with many changes make it suitable for kernel mainline.
Two things I didn't do because they are limited by my current hardware:
- The AICSemi AIC8800D80 WiFi chip on sdio0 has no upstream driver, so
only the SDIO controller is described.
- The eMMC is described as HS200 rather than the vendor's HS400 with
enhanced strobe, since the board at hand has an unpopulated eMMC
footprint and the faster modes could not be verified.
---
安容 (2):
dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S
arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R28S
.../devicetree/bindings/arm/rockchip.yaml | 5 +
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts | 404 +++++++++++++++++++++
3 files changed, 410 insertions(+)
---
base-commit: 32e0f64640d558a0f5410ac5cdd8ebf371c5e6a6
change-id: 20260905-r28s-upstream-e212e27d6165
Best regards,
--
安容 <HystericalDragons@proton.me>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 13+ messages in thread* [PATCH 1/2] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S 2026-09-05 11:17 [PATCH 0/2] arm64: dts: " 安容 via B4 Relay 2026-09-05 11:17 ` 安容 via B4 Relay @ 2026-09-05 11:17 ` 安容 via B4 Relay 0 siblings, 0 replies; 13+ messages in thread From: 安容 via B4 Relay @ 2026-09-05 11:17 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel, jensen, 安容 From: 安容 <HystericalDragons@proton.me> The NanoPi R28S is a dual gigabit Ethernet router board based on the Rockchip RK3528 SoC. Signed-off-by: 安容 <HystericalDragons@proton.me> --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 81744fbee9..709e2cc44d 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -347,6 +347,11 @@ properties: - friendlyarm,nanopi-r2s-plus - const: rockchip,rk3328 + - description: FriendlyElec NanoPi R28S + items: + - const: friendlyarm,nanopi-r28s + - const: rockchip,rk3528 + - description: FriendlyElec NanoPi R3S items: - const: friendlyarm,nanopi-r3s -- 2.55.0 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 1/2] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S @ 2026-09-05 11:17 ` 安容 via B4 Relay 0 siblings, 0 replies; 13+ messages in thread From: 安容 @ 2026-09-05 11:17 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel, jensen, 安容 The NanoPi R28S is a dual gigabit Ethernet router board based on the Rockchip RK3528 SoC. Signed-off-by: 安容 <HystericalDragons@proton.me> --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 81744fbee9..709e2cc44d 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -347,6 +347,11 @@ properties: - friendlyarm,nanopi-r2s-plus - const: rockchip,rk3328 + - description: FriendlyElec NanoPi R28S + items: + - const: friendlyarm,nanopi-r28s + - const: rockchip,rk3528 + - description: FriendlyElec NanoPi R3S items: - const: friendlyarm,nanopi-r3s -- 2.55.0 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 1/2] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S @ 2026-09-05 11:17 ` 安容 via B4 Relay 0 siblings, 0 replies; 13+ messages in thread From: 安容 via B4 Relay @ 2026-09-05 11:17 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel, jensen, 安容 From: 安容 <HystericalDragons@proton.me> The NanoPi R28S is a dual gigabit Ethernet router board based on the Rockchip RK3528 SoC. Signed-off-by: 安容 <HystericalDragons@proton.me> --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 81744fbee9..709e2cc44d 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -347,6 +347,11 @@ properties: - friendlyarm,nanopi-r2s-plus - const: rockchip,rk3328 + - description: FriendlyElec NanoPi R28S + items: + - const: friendlyarm,nanopi-r28s + - const: rockchip,rk3528 + - description: FriendlyElec NanoPi R3S items: - const: friendlyarm,nanopi-r3s -- 2.55.0 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 1/2] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S 2026-09-05 11:17 ` 安容 via B4 Relay @ 2026-09-07 17:35 ` Conor Dooley -1 siblings, 0 replies; 13+ messages in thread From: Conor Dooley @ 2026-09-07 17:35 UTC (permalink / raw) To: HystericalDragons Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel, jensen [-- Attachment #1.1: Type: text/plain, Size: 75 bytes --] Acked-by: Conor Dooley <conor.dooley@microchip.com> pw-bot: not-applicable [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 170 bytes --] _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/2] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S @ 2026-09-07 17:35 ` Conor Dooley 0 siblings, 0 replies; 13+ messages in thread From: Conor Dooley @ 2026-09-07 17:35 UTC (permalink / raw) To: HystericalDragons Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel, jensen [-- Attachment #1: Type: text/plain, Size: 75 bytes --] Acked-by: Conor Dooley <conor.dooley@microchip.com> pw-bot: not-applicable [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2026-09-09 13:47 UTC | newest] Thread overview: 13+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-09-08 23:58 [PATCH 1/2] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi R28S Andrey Korshunov 2026-09-08 23:58 ` Andrey Korshunov 2026-09-08 23:58 ` [PATCH 2/2] arm64: dts: " Andrey Korshunov 2026-09-08 23:58 ` Andrey Korshunov 2026-09-09 10:29 ` [PATCH 1/2] dt-bindings: arm: " Diederik de Haas 2026-09-09 10:29 ` Diederik de Haas 2026-09-09 13:47 ` Andrey Korshunov 2026-09-09 13:47 ` Andrey Korshunov -- strict thread matches above, loose matches on Subject: below -- 2026-09-05 11:17 [PATCH 0/2] arm64: dts: " 安容 via B4 Relay 2026-09-05 11:17 ` [PATCH 1/2] dt-bindings: arm: " 安容 via B4 Relay 2026-09-05 11:17 ` 安容 2026-09-05 11:17 ` 安容 via B4 Relay 2026-09-07 17:35 ` Conor Dooley 2026-09-07 17:35 ` Conor Dooley
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