* [PATCH v4 1/7] drm/i915/selftests: Use gt_*/drm_* prints in core selftests
2026-09-24 12:01 [PATCH v4 0/7] drm/i915/selftests: Modernize printing in i915 selftests Krzysztof Karas
@ 2026-09-24 12:01 ` Krzysztof Karas
2026-09-24 12:01 ` [PATCH v4 2/7] drm/i915: Add i915_* printer macros Krzysztof Karas
` (6 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Krzysztof Karas @ 2026-09-24 12:01 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec, Krzysztof Karas
Move away from generic pr prints to GT aware gt_* versions,
which tag each message with device and the tile it came from.
i915_perf.c now uses drm_* prints, as it reports on a device
wide perf stream with no GT to attribute the message to.
Ensure that 80 character line limit is respected wherever
possible.
Assisted-by: GitHub-Copilot:claude-opus-5
Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
---
v4:
- switch i915_gem_gtt.c, i915_request.c and i915_vma.c to gt_*
prints where a GT reference is available (Andi Shyti);
- fix "../i915_drv.h" include to "i915_drv.h" in i915_gem_gtt.c
(Krzysztof Niemiec, Jani Nikula);
- leave intel_fw_table_check() on pr_err() instead of threading
a struct drm_device * through it (Jani Nikula);
.../gpu/drm/i915/selftests/i915_gem_evict.c | 52 +++--
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 164 +++++++++-----
drivers/gpu/drm/i915/selftests/i915_perf.c | 30 ++-
drivers/gpu/drm/i915/selftests/i915_request.c | 206 ++++++++++++------
drivers/gpu/drm/i915/selftests/i915_vma.c | 187 ++++++++++------
drivers/gpu/drm/i915/selftests/intel_uncore.c | 24 +-
6 files changed, 433 insertions(+), 230 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
index 718cddde7e73..b399a1b18906 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
@@ -71,11 +71,13 @@ static int populate_ggtt(struct i915_ggtt *ggtt, struct list_head *objects)
quirk_add(obj, objects);
count++;
} while (1);
- pr_debug("Filled GGTT with %lu pages [%llu total]\n",
- count, ggtt->vm.total / PAGE_SIZE);
+ gt_dbg(ggtt->vm.gt,
+ "Filled GGTT with %lu pages [%llu total]\n", count,
+ ggtt->vm.total / PAGE_SIZE);
if (list_empty(&ggtt->vm.bound_list)) {
- pr_err("No objects on the GGTT inactive list!\n");
+ gt_err(ggtt->vm.gt,
+ "No objects on the GGTT inactive list!\n");
return -EINVAL;
}
@@ -125,8 +127,9 @@ static int igt_evict_something(void *arg)
0);
mutex_unlock(&ggtt->vm.mutex);
if (err != -ENOSPC) {
- pr_err("i915_gem_evict_something failed on a full GGTT with err=%d\n",
- err);
+ gt_err(gt,
+ "i915_gem_evict_something failed on a full GGTT with err=%d\n",
+ err);
goto cleanup;
}
@@ -140,7 +143,8 @@ static int igt_evict_something(void *arg)
0);
mutex_unlock(&ggtt->vm.mutex);
if (err) {
- pr_err("i915_gem_evict_something failed on a full GGTT with err=%d\n",
+ gt_err(gt,
+ "i915_gem_evict_something failed on a full GGTT with err=%d\n",
err);
goto cleanup;
}
@@ -177,7 +181,9 @@ static int igt_overcommit(void *arg)
vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, 0);
if (vma != ERR_PTR(-ENOSPC)) {
- pr_err("Failed to evict+insert, i915_gem_object_ggtt_pin returned err=%d\n", (int)PTR_ERR_OR_ZERO(vma));
+ gt_err(gt,
+ "Failed to evict+insert, i915_gem_object_ggtt_pin returned err=%d\n",
+ (int)PTR_ERR_OR_ZERO(vma));
err = -EINVAL;
goto cleanup;
}
@@ -209,7 +215,8 @@ static int igt_evict_for_vma(void *arg)
err = i915_gem_evict_for_node(&ggtt->vm, NULL, &target, 0);
mutex_unlock(&ggtt->vm.mutex);
if (err != -ENOSPC) {
- pr_err("i915_gem_evict_for_node on a full GGTT returned err=%d\n",
+ gt_err(gt,
+ "i915_gem_evict_for_node on a full GGTT returned err=%d\n",
err);
goto cleanup;
}
@@ -221,8 +228,7 @@ static int igt_evict_for_vma(void *arg)
err = i915_gem_evict_for_node(&ggtt->vm, NULL, &target, 0);
mutex_unlock(&ggtt->vm.mutex);
if (err) {
- pr_err("i915_gem_evict_for_node returned err=%d\n",
- err);
+ gt_err(gt, "i915_gem_evict_for_node returned err=%d\n", err);
goto cleanup;
}
@@ -273,7 +279,7 @@ static int igt_evict_for_cache_color(void *arg)
vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0,
I915_GTT_PAGE_SIZE | flags);
if (IS_ERR(vma)) {
- pr_err("[0]i915_gem_object_ggtt_pin failed\n");
+ gt_err(gt, "[0]i915_gem_object_ggtt_pin failed\n");
err = PTR_ERR(vma);
goto cleanup;
}
@@ -290,7 +296,7 @@ static int igt_evict_for_cache_color(void *arg)
vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0,
(I915_GTT_PAGE_SIZE * 2) | flags);
if (IS_ERR(vma)) {
- pr_err("[1]i915_gem_object_ggtt_pin failed\n");
+ gt_err(gt, "[1]i915_gem_object_ggtt_pin failed\n");
err = PTR_ERR(vma);
goto cleanup;
}
@@ -302,7 +308,8 @@ static int igt_evict_for_cache_color(void *arg)
err = i915_gem_evict_for_node(&ggtt->vm, NULL, &target, 0);
mutex_unlock(&ggtt->vm.mutex);
if (err) {
- pr_err("[0]i915_gem_evict_for_node returned err=%d\n", err);
+ gt_err(gt,
+ "[0]i915_gem_evict_for_node returned err=%d\n", err);
goto cleanup;
}
@@ -315,7 +322,8 @@ static int igt_evict_for_cache_color(void *arg)
err = i915_gem_evict_for_node(&ggtt->vm, NULL, &target, 0);
mutex_unlock(&ggtt->vm.mutex);
if (!err) {
- pr_err("[1]i915_gem_evict_for_node returned err=%d\n", err);
+ gt_err(gt,
+ "[1]i915_gem_evict_for_node returned err=%d\n", err);
err = -EINVAL;
goto cleanup;
}
@@ -348,7 +356,8 @@ static int igt_evict_vm(void *arg)
err = i915_gem_evict_vm(&ggtt->vm, NULL, NULL);
mutex_unlock(&ggtt->vm.mutex);
if (err) {
- pr_err("i915_gem_evict_vm on a full GGTT returned err=%d]\n",
+ gt_err(gt,
+ "i915_gem_evict_vm on a full GGTT returned err=%d]\n",
err);
goto cleanup;
}
@@ -362,7 +371,8 @@ static int igt_evict_vm(void *arg)
}
if (err) {
- pr_err("i915_gem_evict_vm on a full GGTT returned err=%d]\n",
+ gt_err(gt,
+ "i915_gem_evict_vm on a full GGTT returned err=%d]\n",
err);
goto cleanup;
}
@@ -443,7 +453,7 @@ static int igt_evict_contexts(void *arg)
} while (1);
drm_mm_remove_node(&hole);
mutex_unlock(&ggtt->vm.mutex);
- pr_info("Filled GGTT with %lu 1MiB nodes\n", count);
+ gt_info(gt, "Filled GGTT with %lu 1MiB nodes\n", count);
/* Overfill the GGTT with context objects and so try to evict one. */
for_each_engine(engine, gt, id) {
@@ -469,7 +479,8 @@ static int igt_evict_contexts(void *arg)
if (IS_ERR(rq)) {
/* When full, fail_if_busy will trigger EBUSY */
if (PTR_ERR(rq) != -EBUSY) {
- pr_err("Unexpected error from request alloc (on %s): %d\n",
+ gt_err(gt,
+ "Unexpected error from request alloc (on %s): %d\n",
engine->name,
(int)PTR_ERR(rq));
err = PTR_ERR(rq);
@@ -492,7 +503,7 @@ static int igt_evict_contexts(void *arg)
err = 0;
} while(1);
onstack_fence_fini(&fence);
- pr_info("Submitted %lu contexts/requests on %s\n",
+ gt_info(gt, "Submitted %lu contexts/requests on %s\n",
count, engine->name);
if (err)
break;
@@ -500,7 +511,8 @@ static int igt_evict_contexts(void *arg)
if (i915_request_wait(last, 0, HZ) < 0) {
err = -EIO;
i915_request_put(last);
- pr_err("Failed waiting for last request (on %s)",
+ gt_err(gt,
+ "Failed waiting for last request (on %s)\n",
engine->name);
break;
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index e6bd06774816..0505937b78cd 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -32,8 +32,10 @@
#include "gem/selftests/mock_context.h"
#include "gt/intel_context.h"
#include "gt/intel_gpu_commands.h"
+#include "gt/intel_gt_print.h"
#include "gt/intel_gtt.h"
+#include "i915_drv.h"
#include "i915_random.h"
#include "i915_selftest.h"
#include "i915_vma_resource.h"
@@ -268,8 +270,10 @@ static int lowlevel_hole(struct i915_address_space *vm,
hole_size = KMALLOC_MAX_SIZE / sizeof(u32);
count = hole_size >> 1;
if (!count) {
- pr_debug("%s: hole is too small [%llx - %llx] >> %d: %lld\n",
- __func__, hole_start, hole_end, size, hole_size);
+ gt_dbg(vm->gt,
+ "%s: hole is too small [%llx - %llx] >> %d: %lld\n",
+ __func__, hole_start, hole_end, size,
+ hole_size);
break;
}
@@ -472,15 +476,21 @@ static int fill_hole(struct i915_address_space *vm,
err = i915_vma_pin(vma, 0, 0, offset | flags);
if (err) {
- pr_err("%s(%s) pin (forward) failed with err=%d on size=%lu pages (prime=%lu), offset=%llx\n",
- __func__, p->name, err, npages, prime, offset);
+ gt_err(vm->gt,
+ "%s(%s) pin (forward) failed with err=%d on size=%lu pages (prime=%lu), offset=%llx\n",
+ __func__, p->name, err,
+ npages, prime, offset);
goto err;
}
if (!drm_mm_node_allocated(&vma->node) ||
i915_vma_misplaced(vma, 0, 0, offset | flags)) {
- pr_err("%s(%s) (forward) insert failed: vma.node=%llx + %llx [allocated? %d], expected offset %llx\n",
- __func__, p->name, vma->node.start, vma->node.size, drm_mm_node_allocated(&vma->node),
+ gt_err(vm->gt,
+ "%s(%s) (forward) insert failed: vma.node=%llx + %llx [allocated? %d], expected offset %llx\n",
+ __func__, p->name,
+ vma->node.start,
+ vma->node.size,
+ drm_mm_node_allocated(&vma->node),
offset);
err = -EINVAL;
goto err;
@@ -512,18 +522,22 @@ static int fill_hole(struct i915_address_space *vm,
if (!drm_mm_node_allocated(&vma->node) ||
i915_vma_misplaced(vma, 0, 0, offset | flags)) {
- pr_err("%s(%s) (forward) moved vma.node=%llx + %llx, expected offset %llx\n",
- __func__, p->name, vma->node.start, vma->node.size,
- offset);
+ gt_err(vm->gt,
+ "%s(%s) (forward) moved vma.node=%llx + %llx, expected offset %llx\n",
+ __func__, p->name,
+ vma->node.start,
+ vma->node.size, offset);
err = -EINVAL;
goto err;
}
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("%s(%s) (forward) unbind of vma.node=%llx + %llx failed with err=%d\n",
- __func__, p->name, vma->node.start, vma->node.size,
- err);
+ gt_err(vm->gt,
+ "%s(%s) (forward) unbind of vma.node=%llx + %llx failed with err=%d\n",
+ __func__, p->name,
+ vma->node.start,
+ vma->node.size, err);
goto err;
}
@@ -551,15 +565,21 @@ static int fill_hole(struct i915_address_space *vm,
err = i915_vma_pin(vma, 0, 0, offset | flags);
if (err) {
- pr_err("%s(%s) pin (backward) failed with err=%d on size=%lu pages (prime=%lu), offset=%llx\n",
- __func__, p->name, err, npages, prime, offset);
+ gt_err(vm->gt,
+ "%s(%s) pin (backward) failed with err=%d on size=%lu pages (prime=%lu), offset=%llx\n",
+ __func__, p->name, err,
+ npages, prime, offset);
goto err;
}
if (!drm_mm_node_allocated(&vma->node) ||
i915_vma_misplaced(vma, 0, 0, offset | flags)) {
- pr_err("%s(%s) (backward) insert failed: vma.node=%llx + %llx [allocated? %d], expected offset %llx\n",
- __func__, p->name, vma->node.start, vma->node.size, drm_mm_node_allocated(&vma->node),
+ gt_err(vm->gt,
+ "%s(%s) (backward) insert failed: vma.node=%llx + %llx [allocated? %d], expected offset %llx\n",
+ __func__, p->name,
+ vma->node.start,
+ vma->node.size,
+ drm_mm_node_allocated(&vma->node),
offset);
err = -EINVAL;
goto err;
@@ -591,8 +611,12 @@ static int fill_hole(struct i915_address_space *vm,
if (!drm_mm_node_allocated(&vma->node) ||
i915_vma_misplaced(vma, 0, 0, offset | flags)) {
- pr_err("%s(%s) (backward) moved vma.node=%llx + %llx [allocated? %d], expected offset %llx\n",
- __func__, p->name, vma->node.start, vma->node.size, drm_mm_node_allocated(&vma->node),
+ gt_err(vm->gt,
+ "%s(%s) (backward) moved vma.node=%llx + %llx [allocated? %d], expected offset %llx\n",
+ __func__, p->name,
+ vma->node.start,
+ vma->node.size,
+ drm_mm_node_allocated(&vma->node),
offset);
err = -EINVAL;
goto err;
@@ -600,9 +624,11 @@ static int fill_hole(struct i915_address_space *vm,
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("%s(%s) (backward) unbind of vma.node=%llx + %llx failed with err=%d\n",
- __func__, p->name, vma->node.start, vma->node.size,
- err);
+ gt_err(vm->gt,
+ "%s(%s) (backward) unbind of vma.node=%llx + %llx failed with err=%d\n",
+ __func__, p->name,
+ vma->node.start,
+ vma->node.size, err);
goto err;
}
@@ -672,16 +698,18 @@ static int walk_hole(struct i915_address_space *vm,
addr += round_up(obj->base.size, min_alignment)) {
err = i915_vma_pin(vma, 0, 0, addr | flags);
if (err) {
- pr_err("%s bind failed at %llx + %llx [hole %llx- %llx] with err=%d\n",
- __func__, addr, vma->size,
- hole_start, hole_end, err);
+ gt_err(vm->gt,
+ "%s bind failed at %llx + %llx [hole %llx- %llx] with err=%d\n",
+ __func__, addr, vma->size, hole_start,
+ hole_end, err);
goto err_put;
}
i915_vma_unpin(vma);
if (!drm_mm_node_allocated(&vma->node) ||
i915_vma_misplaced(vma, 0, 0, addr | flags)) {
- pr_err("%s incorrect at %llx + %llx\n",
+ gt_err(vm->gt,
+ "%s incorrect at %llx + %llx\n",
__func__, addr, vma->size);
err = -EINVAL;
goto err_put;
@@ -689,7 +717,8 @@ static int walk_hole(struct i915_address_space *vm,
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("%s unbind failed at %llx + %llx with err=%d\n",
+ gt_err(vm->gt,
+ "%s unbind failed at %llx + %llx with err=%d\n",
__func__, addr, vma->size, err);
goto err_put;
}
@@ -754,7 +783,8 @@ static int pot_hole(struct i915_address_space *vm,
addr += step) {
err = i915_vma_pin(vma, 0, 0, addr | flags);
if (err) {
- pr_err("%s failed to pin object at %llx in hole [%llx - %llx], with err=%d\n",
+ gt_err(vm->gt,
+ "%s failed to pin object at %llx in hole [%llx - %llx], with err=%d\n",
__func__,
addr,
hole_start, hole_end,
@@ -764,7 +794,8 @@ static int pot_hole(struct i915_address_space *vm,
if (!drm_mm_node_allocated(&vma->node) ||
i915_vma_misplaced(vma, 0, 0, addr | flags)) {
- pr_err("%s incorrect at %llx + %llx\n",
+ gt_err(vm->gt,
+ "%s incorrect at %llx + %llx\n",
__func__, addr, vma->size);
i915_vma_unpin(vma);
err = i915_vma_unbind_unlocked(vma);
@@ -819,8 +850,10 @@ static int drunk_hole(struct i915_address_space *vm,
hole_size = KMALLOC_MAX_SIZE / sizeof(u32);
count = hole_size >> 1;
if (!count) {
- pr_debug("%s: hole is too small [%llx - %llx] >> %d: %lld\n",
- __func__, hole_start, hole_end, size, hole_size);
+ gt_dbg(vm->gt,
+ "%s: hole is too small [%llx - %llx] >> %d: %lld\n",
+ __func__, hole_start, hole_end, size,
+ hole_size);
break;
}
@@ -859,7 +892,8 @@ static int drunk_hole(struct i915_address_space *vm,
err = i915_vma_pin(vma, 0, 0, addr | flags);
if (err) {
- pr_err("%s failed to pin object at %llx + %llx in hole [%llx - %llx], with err=%d\n",
+ gt_err(vm->gt,
+ "%s failed to pin object at %llx + %llx in hole [%llx - %llx], with err=%d\n",
__func__,
addr, BIT_ULL(size),
hole_start, hole_end,
@@ -869,7 +903,8 @@ static int drunk_hole(struct i915_address_space *vm,
if (!drm_mm_node_allocated(&vma->node) ||
i915_vma_misplaced(vma, 0, 0, addr | flags)) {
- pr_err("%s incorrect at %llx + %llx\n",
+ gt_err(vm->gt,
+ "%s incorrect at %llx + %llx\n",
__func__, addr, BIT_ULL(size));
i915_vma_unpin(vma);
err = i915_vma_unbind_unlocked(vma);
@@ -939,14 +974,16 @@ static int __shrink_hole(struct i915_address_space *vm,
err = i915_vma_pin(vma, 0, 0, addr | flags);
if (err) {
- pr_err("%s failed to pin object at %llx + %llx in hole [%llx - %llx], with err=%d\n",
- __func__, addr, size, hole_start, hole_end, err);
+ gt_err(vm->gt,
+ "%s failed to pin object at %llx + %llx in hole [%llx - %llx], with err=%d\n",
+ __func__, addr, size, hole_start, hole_end,
+ err);
break;
}
if (!drm_mm_node_allocated(&vma->node) ||
i915_vma_misplaced(vma, 0, 0, addr | flags)) {
- pr_err("%s incorrect at %llx + %llx\n",
+ gt_err(vm->gt, "%s incorrect at %llx + %llx\n",
__func__, addr, size);
i915_vma_unpin(vma);
err = i915_vma_unbind_unlocked(vma);
@@ -1419,7 +1456,8 @@ static int igt_ggtt_page(void *arg)
io_mapping_unmap_atomic(vaddr);
if (val != n) {
- pr_err("insert page failed: found %d, expected %d\n",
+ gt_err(ggtt->vm.gt,
+ "insert page failed: found %d, expected %d\n",
val, n);
err = -EINVAL;
break;
@@ -1578,7 +1616,8 @@ static int igt_gtt_reserve(void *arg)
err = reserve_gtt_with_resource(vma, total);
if (err) {
- pr_err("i915_gem_gtt_reserve (pass 1) failed at %llu/%llu with err=%d\n",
+ gt_err(ggtt->vm.gt,
+ "i915_gem_gtt_reserve (pass 1) failed at %llu/%llu with err=%d\n",
total, ggtt->vm.total, err);
goto out;
}
@@ -1587,9 +1626,10 @@ static int igt_gtt_reserve(void *arg)
GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
if (vma->node.start != total ||
vma->node.size != 2*I915_GTT_PAGE_SIZE) {
- pr_err("i915_gem_gtt_reserve (pass 1) placement failed, found (%llx + %llx), expected (%llx + %llx)\n",
- vma->node.start, vma->node.size,
- total, 2*I915_GTT_PAGE_SIZE);
+ gt_err(ggtt->vm.gt,
+ "i915_gem_gtt_reserve (pass 1) placement failed, found (%llx + %llx), expected (%llx + %llx)\n",
+ vma->node.start, vma->node.size, total,
+ 2 * I915_GTT_PAGE_SIZE);
err = -EINVAL;
goto out;
}
@@ -1624,7 +1664,8 @@ static int igt_gtt_reserve(void *arg)
err = reserve_gtt_with_resource(vma, total);
if (err) {
- pr_err("i915_gem_gtt_reserve (pass 2) failed at %llu/%llu with err=%d\n",
+ gt_err(ggtt->vm.gt,
+ "i915_gem_gtt_reserve (pass 2) failed at %llu/%llu with err=%d\n",
total, ggtt->vm.total, err);
goto out;
}
@@ -1633,9 +1674,10 @@ static int igt_gtt_reserve(void *arg)
GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
if (vma->node.start != total ||
vma->node.size != 2*I915_GTT_PAGE_SIZE) {
- pr_err("i915_gem_gtt_reserve (pass 2) placement failed, found (%llx + %llx), expected (%llx + %llx)\n",
- vma->node.start, vma->node.size,
- total, 2*I915_GTT_PAGE_SIZE);
+ gt_err(ggtt->vm.gt,
+ "i915_gem_gtt_reserve (pass 2) placement failed, found (%llx + %llx), expected (%llx + %llx)\n",
+ vma->node.start, vma->node.size, total,
+ 2 * I915_GTT_PAGE_SIZE);
err = -EINVAL;
goto out;
}
@@ -1654,7 +1696,8 @@ static int igt_gtt_reserve(void *arg)
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("i915_vma_unbind failed with err=%d!\n", err);
+ gt_err(ggtt->vm.gt,
+ "i915_vma_unbind failed with err=%d!\n", err);
goto out;
}
@@ -1665,7 +1708,8 @@ static int igt_gtt_reserve(void *arg)
err = reserve_gtt_with_resource(vma, offset);
if (err) {
- pr_err("i915_gem_gtt_reserve (pass 3) failed at %llu/%llu with err=%d\n",
+ gt_err(ggtt->vm.gt,
+ "i915_gem_gtt_reserve (pass 3) failed at %llu/%llu with err=%d\n",
total, ggtt->vm.total, err);
goto out;
}
@@ -1674,9 +1718,10 @@ static int igt_gtt_reserve(void *arg)
GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
if (vma->node.start != offset ||
vma->node.size != 2*I915_GTT_PAGE_SIZE) {
- pr_err("i915_gem_gtt_reserve (pass 3) placement failed, found (%llx + %llx), expected (%llx + %llx)\n",
- vma->node.start, vma->node.size,
- offset, 2*I915_GTT_PAGE_SIZE);
+ gt_err(ggtt->vm.gt,
+ "i915_gem_gtt_reserve (pass 3) placement failed, found (%llx + %llx), expected (%llx + %llx)\n",
+ vma->node.start, vma->node.size, offset,
+ 2 * I915_GTT_PAGE_SIZE);
err = -EINVAL;
goto out;
}
@@ -1766,7 +1811,8 @@ static int igt_gtt_insert(void *arg)
0);
mutex_unlock(&ggtt->vm.mutex);
if (err != -ENOSPC) {
- pr_err("Invalid i915_gem_gtt_insert(.size=%llx, .alignment=%llx, .start=%llx, .end=%llx) succeeded (err=%d)\n",
+ gt_err(ggtt->vm.gt,
+ "Invalid i915_gem_gtt_insert(.size=%llx, .alignment=%llx, .start=%llx, .end=%llx) succeeded (err=%d)\n",
ii->size, ii->alignment, ii->start, ii->end,
err);
return -EINVAL;
@@ -1807,7 +1853,8 @@ static int igt_gtt_insert(void *arg)
break;
}
if (err) {
- pr_err("i915_gem_gtt_insert (pass 1) failed at %llu/%llu with err=%d\n",
+ gt_err(ggtt->vm.gt,
+ "i915_gem_gtt_insert (pass 1) failed at %llu/%llu with err=%d\n",
total, ggtt->vm.total, err);
goto out;
}
@@ -1827,7 +1874,8 @@ static int igt_gtt_insert(void *arg)
}
if (!drm_mm_node_allocated(&vma->node)) {
- pr_err("VMA was unexpectedly evicted!\n");
+ gt_err(ggtt->vm.gt,
+ "VMA was unexpectedly evicted!\n");
err = -EINVAL;
goto out;
}
@@ -1851,13 +1899,15 @@ static int igt_gtt_insert(void *arg)
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("i915_vma_unbind failed with err=%d!\n", err);
+ gt_err(ggtt->vm.gt,
+ "i915_vma_unbind failed with err=%d!\n", err);
goto out;
}
err = insert_gtt_with_resource(vma);
if (err) {
- pr_err("i915_gem_gtt_insert (pass 2) failed at %llu/%llu with err=%d\n",
+ gt_err(ggtt->vm.gt,
+ "i915_gem_gtt_insert (pass 2) failed at %llu/%llu with err=%d\n",
total, ggtt->vm.total, err);
goto out;
}
@@ -1865,7 +1915,8 @@ static int igt_gtt_insert(void *arg)
GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
if (vma->node.start != offset) {
- pr_err("i915_gem_gtt_insert did not return node to its previous location (the only hole), expected address %llx, found %llx\n",
+ gt_err(ggtt->vm.gt,
+ "i915_gem_gtt_insert did not return node to its previous location (the only hole), expected address %llx, found %llx\n",
offset, vma->node.start);
err = -EINVAL;
goto out;
@@ -1901,7 +1952,8 @@ static int igt_gtt_insert(void *arg)
err = insert_gtt_with_resource(vma);
if (err) {
- pr_err("i915_gem_gtt_insert (pass 3) failed at %llu/%llu with err=%d\n",
+ gt_err(ggtt->vm.gt,
+ "i915_gem_gtt_insert (pass 3) failed at %llu/%llu with err=%d\n",
total, ggtt->vm.total, err);
goto out;
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_perf.c b/drivers/gpu/drm/i915/selftests/i915_perf.c
index e9469e27f42a..b4a75d82e6be 100644
--- a/drivers/gpu/drm/i915/selftests/i915_perf.c
+++ b/drivers/gpu/drm/i915/selftests/i915_perf.c
@@ -6,6 +6,8 @@
#include <linux/kref.h>
+#include <drm/drm_print.h>
+
#include "gem/i915_gem_pm.h"
#include "gt/intel_gt.h"
@@ -263,20 +265,22 @@ static int live_noa_delay(void *arg)
t1 = poll_status(rq, 0x102);
preempt_enable();
- pr_info("CPU delay: %lluns, expected %lluns\n",
- ktime_sub(t1, t0), expected);
+ drm_info(&i915->drm,
+ "CPU delay: %lluns, expected %lluns\n", ktime_sub(t1, t0),
+ expected);
delay = intel_read_status_page(stream->engine, 0x102);
delay -= intel_read_status_page(stream->engine, 0x100);
delay = intel_gt_clock_interval_to_ns(stream->engine->gt, delay);
- pr_info("GPU delay: %uns, expected %lluns\n",
- delay, expected);
+ drm_info(&i915->drm,
+ "GPU delay: %uns, expected %lluns\n", delay, expected);
if (4 * delay < 3 * expected || 2 * delay > 3 * expected) {
- pr_err("GPU delay [%uus] outside of expected threshold! [%lluus, %lluus]\n",
- delay / 1000,
- div_u64(3 * expected, 4000),
- div_u64(3 * expected, 2000));
+ drm_err(&i915->drm,
+ "GPU delay [%uus] outside of expected threshold! [%lluus, %lluus]\n",
+ delay / 1000,
+ div_u64(3 * expected, 4000),
+ div_u64(3 * expected, 2000));
err = -EINVAL;
}
@@ -385,7 +389,7 @@ static int live_noa_gpr(void *arg)
i915_request_add(rq);
if (i915_request_wait(rq, I915_WAIT_INTERRUPTIBLE, HZ / 2) < 0) {
- pr_err("noa_wait timed out\n");
+ drm_err(&i915->drm, "noa_wait timed out\n");
intel_gt_set_wedged(stream->engine->gt);
err = -EIO;
goto out_rq;
@@ -396,14 +400,16 @@ static int live_noa_gpr(void *arg)
if (store[i] == STACK_MAGIC)
continue;
- pr_err("GPR[%d] lost, found:%08x, expected:%08x!\n",
- i, store[i], STACK_MAGIC);
+ drm_err(&i915->drm,
+ "GPR[%d] lost, found:%08x, expected:%08x!\n", i,
+ store[i], STACK_MAGIC);
err = -EINVAL;
}
/* Verify that the user's scratch page was not used for GPR storage */
if (memchr_inv(scratch, POISON_FREE, PAGE_SIZE)) {
- pr_err("Scratch page overwritten!\n");
+ drm_err(&i915->drm,
+ "Scratch page overwritten!\n");
igt_hexdump(scratch, 4096);
err = -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests/i915_request.c
index e1a7c454a0a9..fade3e122205 100644
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -26,8 +26,6 @@
#include <linux/prime_numbers.h>
#include <linux/sort.h>
-#include <drm/drm_print.h>
-
#include "gem/i915_gem_internal.h"
#include "gem/i915_gem_pm.h"
#include "gem/selftests/mock_context.h"
@@ -36,6 +34,7 @@
#include "gt/intel_engine_user.h"
#include "gt/intel_gt.h"
#include "gt/intel_gt_clock_utils.h"
+#include "gt/intel_gt_print.h"
#include "gt/intel_gt_requests.h"
#include "gt/selftest_engine_heartbeat.h"
@@ -98,49 +97,54 @@ static int igt_wait_request(void *arg)
i915_request_get(request);
if (i915_request_wait(request, 0, 0) != -ETIME) {
- pr_err("request wait (busy query) succeeded (expected timeout before submit!)\n");
+ gt_err(to_gt(i915),
+ "request wait (busy query) succeeded (expected timeout before submit!)\n");
goto out_request;
}
if (i915_request_wait(request, 0, T) != -ETIME) {
- pr_err("request wait succeeded (expected timeout before submit!)\n");
+ gt_err(to_gt(i915),
+ "request wait succeeded (expected timeout before submit!)\n");
goto out_request;
}
if (i915_request_completed(request)) {
- pr_err("request completed before submit!!\n");
+ gt_err(to_gt(i915), "request completed before submit!!\n");
goto out_request;
}
i915_request_add(request);
if (i915_request_wait(request, 0, 0) != -ETIME) {
- pr_err("request wait (busy query) succeeded (expected timeout after submit!)\n");
+ gt_err(to_gt(i915),
+ "request wait (busy query) succeeded (expected timeout after submit!)\n");
goto out_request;
}
if (i915_request_completed(request)) {
- pr_err("request completed immediately!\n");
+ gt_err(to_gt(i915), "request completed immediately!\n");
goto out_request;
}
if (i915_request_wait(request, 0, T / 2) != -ETIME) {
- pr_err("request wait succeeded (expected timeout!)\n");
+ gt_err(to_gt(i915),
+ "request wait succeeded (expected timeout!)\n");
goto out_request;
}
if (i915_request_wait(request, 0, T) == -ETIME) {
- pr_err("request wait timed out!\n");
+ gt_err(to_gt(i915), "request wait timed out!\n");
goto out_request;
}
if (!i915_request_completed(request)) {
- pr_err("request not complete after waiting!\n");
+ gt_err(to_gt(i915), "request not complete after waiting!\n");
goto out_request;
}
if (i915_request_wait(request, 0, T) == -ETIME) {
- pr_err("request wait timed out when already complete!\n");
+ gt_err(to_gt(i915),
+ "request wait timed out when already complete!\n");
goto out_request;
}
@@ -165,34 +169,38 @@ static int igt_fence_wait(void *arg)
return PTR_ERR(request);
if (dma_fence_wait_timeout(&request->fence, false, T) != -ETIME) {
- pr_err("fence wait success before submit (expected timeout)!\n");
+ gt_err(to_gt(i915),
+ "fence wait success before submit (expected timeout)!\n");
goto out;
}
i915_request_add(request);
if (dma_fence_is_signaled(&request->fence)) {
- pr_err("fence signaled immediately!\n");
+ gt_err(to_gt(i915), "fence signaled immediately!\n");
goto out;
}
if (dma_fence_wait_timeout(&request->fence, false, T / 2) != -ETIME) {
- pr_err("fence wait success after submit (expected timeout)!\n");
+ gt_err(to_gt(i915),
+ "fence wait success after submit (expected timeout)!\n");
goto out;
}
if (dma_fence_wait_timeout(&request->fence, false, T) <= 0) {
- pr_err("fence wait timed out (expected success)!\n");
+ gt_err(to_gt(i915),
+ "fence wait timed out (expected success)!\n");
goto out;
}
if (!dma_fence_is_signaled(&request->fence)) {
- pr_err("fence unsignaled after waiting!\n");
+ gt_err(to_gt(i915), "fence unsignaled after waiting!\n");
goto out;
}
if (dma_fence_wait_timeout(&request->fence, false, T) <= 0) {
- pr_err("fence wait timed out when complete (expected success)!\n");
+ gt_err(to_gt(i915),
+ "fence wait timed out when complete (expected success)!\n");
goto out;
}
@@ -245,7 +253,8 @@ static int igt_request_rewind(void *arg)
/* Simulate preemption by manual reordering */
if (!mock_cancel_request(request)) {
- pr_err("failed to cancel request (already executed)!\n");
+ gt_err(to_gt(i915),
+ "failed to cancel request (already executed)!\n");
i915_request_add(vip);
goto err_context_1;
}
@@ -257,12 +266,13 @@ static int igt_request_rewind(void *arg)
if (i915_request_wait(vip, 0, HZ) == -ETIME) {
- pr_err("timed out waiting for high priority request\n");
+ gt_err(to_gt(i915),
+ "timed out waiting for high priority request\n");
goto err;
}
if (i915_request_completed(request)) {
- pr_err("low priority request already completed\n");
+ gt_err(to_gt(i915), "low priority request already completed\n");
goto err;
}
@@ -313,6 +323,7 @@ static void __igt_breadcrumbs_smoketest(struct kthread_work *work)
struct smoke_thread *thread = container_of(work, typeof(*thread), work);
struct smoketest *t = thread->t;
const unsigned int max_batch = min(t->ncontexts, t->max_batch) - 1;
+ struct intel_gt *gt = t->engine->gt;
const unsigned int total = 4 * t->ncontexts + 1;
unsigned int num_waits = 0, num_fences = 0;
struct i915_request **requests;
@@ -406,7 +417,8 @@ static void __igt_breadcrumbs_smoketest(struct kthread_work *work)
5 * HZ)) {
struct i915_request *rq = requests[count - 1];
- pr_err("waiting for %d/%d fences (last %llx:%lld) on %s timed out!\n",
+ gt_err(gt,
+ "waiting for %d/%d fences (last %llx:%lld) on %s timed out!\n",
atomic_read(&wait->pending), count,
rq->fence.context, rq->fence.seqno,
t->engine->name);
@@ -423,7 +435,8 @@ static void __igt_breadcrumbs_smoketest(struct kthread_work *work)
if (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT,
&rq->fence.flags)) {
- pr_err("%llu:%llu was not signaled!\n",
+ gt_err(gt,
+ "%llu:%llu was not signaled!\n",
rq->fence.context, rq->fence.seqno);
err = -EINVAL;
}
@@ -523,7 +536,8 @@ static int mock_breadcrumbs_smoketest(void *arg)
kthread_destroy_worker(threads[n].worker);
}
- pr_info("Completed %lu waits for %lu fence across %d cpus\n",
+ gt_info(to_gt(i915),
+ "Completed %lu waits for %lu fence across %d cpus\n",
atomic_long_read(&t.num_waits),
atomic_long_read(&t.num_fences),
ncpus);
@@ -632,7 +646,8 @@ static int live_nop_request(void *arg)
if (err)
return err;
- pr_info("Request latencies on %s: 1 = %lluns, %lu = %lluns\n",
+ gt_info(engine->gt,
+ "Request latencies on %s: 1 = %lluns, %lu = %lluns\n",
engine->name,
ktime_to_ns(times[0]),
prime, div64_u64(ktime_to_ns(times[1]), prime));
@@ -663,7 +678,8 @@ static int __cancel_inactive(struct intel_engine_cs *engine)
goto out_ce;
}
- pr_debug("%s: Cancelling inactive request\n", engine->name);
+ gt_dbg(engine->gt, "%s: Cancelling inactive request\n",
+ engine->name);
i915_request_cancel(rq, -EINTR);
i915_request_get(rq);
i915_request_add(rq);
@@ -671,14 +687,16 @@ static int __cancel_inactive(struct intel_engine_cs *engine)
if (i915_request_wait(rq, 0, HZ / 5) < 0) {
struct drm_printer p = drm_info_printer(engine->i915->drm.dev);
- pr_err("%s: Failed to cancel inactive request\n", engine->name);
+ gt_err(engine->gt,
+ "%s: Failed to cancel inactive request\n",
+ engine->name);
intel_engine_dump(engine, &p, "%s\n", engine->name);
err = -ETIME;
goto out_rq;
}
if (rq->fence.error != -EINTR) {
- pr_err("%s: fence not cancelled (%u)\n",
+ gt_err(engine->gt, "%s: fence not cancelled (%u)\n",
engine->name, rq->fence.error);
err = -EINVAL;
}
@@ -690,7 +708,8 @@ static int __cancel_inactive(struct intel_engine_cs *engine)
out_spin:
igt_spinner_fini(&spin);
if (err)
- pr_err("%s: %s error %d\n", __func__, engine->name, err);
+ gt_err(engine->gt, "%s: %s error %d\n", __func__,
+ engine->name, err);
return err;
}
@@ -716,13 +735,15 @@ static int __cancel_active(struct intel_engine_cs *engine)
goto out_ce;
}
- pr_debug("%s: Cancelling active request\n", engine->name);
+ gt_dbg(engine->gt, "%s: Cancelling active request\n",
+ engine->name);
i915_request_get(rq);
i915_request_add(rq);
if (!igt_wait_for_spinner(&spin, rq)) {
struct drm_printer p = drm_info_printer(engine->i915->drm.dev);
- pr_err("Failed to start spinner on %s\n", engine->name);
+ gt_err(engine->gt, "Failed to start spinner on %s\n",
+ engine->name);
intel_engine_dump(engine, &p, "%s\n", engine->name);
err = -ETIME;
goto out_rq;
@@ -732,14 +753,15 @@ static int __cancel_active(struct intel_engine_cs *engine)
if (i915_request_wait(rq, 0, HZ / 5) < 0) {
struct drm_printer p = drm_info_printer(engine->i915->drm.dev);
- pr_err("%s: Failed to cancel active request\n", engine->name);
+ gt_err(engine->gt,
+ "%s: Failed to cancel active request\n", engine->name);
intel_engine_dump(engine, &p, "%s\n", engine->name);
err = -ETIME;
goto out_rq;
}
if (rq->fence.error != -EINTR) {
- pr_err("%s: fence not cancelled (%u)\n",
+ gt_err(engine->gt, "%s: fence not cancelled (%u)\n",
engine->name, rq->fence.error);
err = -EINVAL;
}
@@ -751,7 +773,8 @@ static int __cancel_active(struct intel_engine_cs *engine)
out_spin:
igt_spinner_fini(&spin);
if (err)
- pr_err("%s: %s error %d\n", __func__, engine->name, err);
+ gt_err(engine->gt, "%s: %s error %d\n", __func__,
+ engine->name, err);
return err;
}
@@ -785,10 +808,11 @@ static int __cancel_completed(struct intel_engine_cs *engine)
goto out_rq;
}
- pr_debug("%s: Cancelling completed request\n", engine->name);
+ gt_dbg(engine->gt, "%s: Cancelling completed request\n",
+ engine->name);
i915_request_cancel(rq, -EINTR);
if (rq->fence.error) {
- pr_err("%s: fence not cancelled (%u)\n",
+ gt_err(engine->gt, "%s: fence not cancelled (%u)\n",
engine->name, rq->fence.error);
err = -EINVAL;
}
@@ -800,7 +824,8 @@ static int __cancel_completed(struct intel_engine_cs *engine)
out_spin:
igt_spinner_fini(&spin);
if (err)
- pr_err("%s: %s error %d\n", __func__, engine->name, err);
+ gt_err(engine->gt, "%s: %s error %d\n", __func__,
+ engine->name, err);
return err;
}
@@ -846,14 +871,16 @@ static int __cancel_reset(struct drm_i915_private *i915,
goto out_ce;
}
- pr_debug("%s: Cancelling active non-preemptable request\n",
- engine->name);
+ gt_dbg(engine->gt,
+ "%s: Cancelling active non-preemptable request\n",
+ engine->name);
i915_request_get(rq);
i915_request_add(rq);
if (!igt_wait_for_spinner(&spin, rq)) {
struct drm_printer p = drm_info_printer(engine->i915->drm.dev);
- pr_err("Failed to start spinner on %s\n", engine->name);
+ gt_err(engine->gt, "Failed to start spinner on %s\n",
+ engine->name);
intel_engine_dump(engine, &p, "%s\n", engine->name);
err = -ETIME;
goto out_rq;
@@ -870,14 +897,15 @@ static int __cancel_reset(struct drm_i915_private *i915,
if (i915_request_wait(rq, 0, HZ) < 0) {
struct drm_printer p = drm_info_printer(engine->i915->drm.dev);
- pr_err("%s: Failed to cancel hung request\n", engine->name);
+ gt_err(engine->gt,
+ "%s: Failed to cancel hung request\n", engine->name);
intel_engine_dump(engine, &p, "%s\n", engine->name);
err = -ETIME;
goto out_nop;
}
if (rq->fence.error != -EINTR) {
- pr_err("%s: fence not cancelled (%u)\n",
+ gt_err(engine->gt, "%s: fence not cancelled (%u)\n",
engine->name, rq->fence.error);
err = -EINVAL;
goto out_nop;
@@ -886,14 +914,15 @@ static int __cancel_reset(struct drm_i915_private *i915,
if (i915_request_wait(nop, 0, HZ) < 0) {
struct drm_printer p = drm_info_printer(engine->i915->drm.dev);
- pr_err("%s: Failed to complete nop request\n", engine->name);
+ gt_err(engine->gt,
+ "%s: Failed to complete nop request\n", engine->name);
intel_engine_dump(engine, &p, "%s\n", engine->name);
err = -ETIME;
goto out_nop;
}
if (nop->fence.error != 0) {
- pr_err("%s: Nop request errored (%u)\n",
+ gt_err(engine->gt, "%s: Nop request errored (%u)\n",
engine->name, nop->fence.error);
err = -EINVAL;
}
@@ -909,7 +938,8 @@ static int __cancel_reset(struct drm_i915_private *i915,
out_restore:
engine->props.preempt_timeout_ms = preempt_timeout_ms;
if (err)
- pr_err("%s: %s error %d\n", __func__, engine->name, err);
+ gt_err(engine->gt, "%s: %s error %d\n", __func__,
+ engine->name, err);
return err;
}
@@ -1102,7 +1132,8 @@ static int live_empty_request(void *arg)
if (err)
goto out_batch;
- pr_info("Batch latencies on %s: 1 = %lluns, %lu = %lluns\n",
+ gt_info(engine->gt,
+ "Batch latencies on %s: 1 = %lluns, %lu = %lluns\n",
engine->name,
ktime_to_ns(times[0]),
prime, div64_u64(ktime_to_ns(times[1]), prime));
@@ -1218,7 +1249,8 @@ static int live_all_engines(void *arg)
batch = recursive_batch(engine->gt);
if (IS_ERR(batch)) {
err = PTR_ERR(batch);
- pr_err("%s: Unable to create batch, err=%d\n",
+ gt_err(engine->gt,
+ "%s: Unable to create batch, err=%d\n",
__func__, err);
goto out_free;
}
@@ -1227,7 +1259,8 @@ static int live_all_engines(void *arg)
request[idx] = intel_engine_create_kernel_request(engine);
if (IS_ERR(request[idx])) {
err = PTR_ERR(request[idx]);
- pr_err("%s: Request allocation failed with err=%d\n",
+ gt_err(engine->gt,
+ "%s: Request allocation failed with err=%d\n",
__func__, err);
goto out_unlock;
}
@@ -1252,7 +1285,8 @@ static int live_all_engines(void *arg)
idx = 0;
for_each_uabi_engine(engine, i915) {
if (i915_request_completed(request[idx])) {
- pr_err("%s(%s): request completed too early!\n",
+ gt_err(engine->gt,
+ "%s(%s): request completed too early!\n",
__func__, engine->name);
err = -EINVAL;
goto out_request;
@@ -1264,7 +1298,8 @@ static int live_all_engines(void *arg)
for_each_uabi_engine(engine, i915) {
err = recursive_batch_resolve(request[idx]->batch);
if (err) {
- pr_err("%s: failed to resolve batch, err=%d\n",
+ gt_err(engine->gt,
+ "%s: failed to resolve batch, err=%d\n",
__func__, err);
goto out_request;
}
@@ -1280,7 +1315,8 @@ static int live_all_engines(void *arg)
MAX_SCHEDULE_TIMEOUT);
if (timeout < 0) {
err = timeout;
- pr_err("%s: error waiting for request on %s, err=%d\n",
+ gt_err(engine->gt,
+ "%s: error waiting for request on %s, err=%d\n",
__func__, engine->name, err);
goto out_request;
}
@@ -1348,7 +1384,8 @@ static int live_sequential_engines(void *arg)
batch = recursive_batch(engine->gt);
if (IS_ERR(batch)) {
err = PTR_ERR(batch);
- pr_err("%s: Unable to create batch for %s, err=%d\n",
+ gt_err(engine->gt,
+ "%s: Unable to create batch for %s, err=%d\n",
__func__, engine->name, err);
goto out_free;
}
@@ -1357,7 +1394,8 @@ static int live_sequential_engines(void *arg)
request[idx] = intel_engine_create_kernel_request(engine);
if (IS_ERR(request[idx])) {
err = PTR_ERR(request[idx]);
- pr_err("%s: Request allocation failed for %s with err=%d\n",
+ gt_err(engine->gt,
+ "%s: Request allocation failed for %s with err=%d\n",
__func__, engine->name, err);
goto out_unlock;
}
@@ -1368,7 +1406,8 @@ static int live_sequential_engines(void *arg)
&prev->fence);
if (err) {
i915_request_add(request[idx]);
- pr_err("%s: Request await failed for %s with err=%d\n",
+ gt_err(engine->gt,
+ "%s: Request await failed for %s with err=%d\n",
__func__, engine->name, err);
goto out_unlock;
}
@@ -1398,7 +1437,8 @@ static int live_sequential_engines(void *arg)
long timeout;
if (i915_request_completed(request[idx])) {
- pr_err("%s(%s): request completed too early!\n",
+ gt_err(engine->gt,
+ "%s(%s): request completed too early!\n",
__func__, engine->name);
err = -EINVAL;
goto out_request;
@@ -1406,7 +1446,8 @@ static int live_sequential_engines(void *arg)
err = recursive_batch_resolve(request[idx]->batch);
if (err) {
- pr_err("%s: failed to resolve batch, err=%d\n",
+ gt_err(engine->gt,
+ "%s: failed to resolve batch, err=%d\n",
__func__, err);
goto out_request;
}
@@ -1415,7 +1456,8 @@ static int live_sequential_engines(void *arg)
MAX_SCHEDULE_TIMEOUT);
if (timeout < 0) {
err = timeout;
- pr_err("%s: error waiting for request on %s, err=%d\n",
+ gt_err(engine->gt,
+ "%s: error waiting for request on %s, err=%d\n",
__func__, engine->name, err);
goto out_request;
}
@@ -1496,7 +1538,8 @@ static void __live_parallel_engine1(struct kthread_work *work)
} while (!__igt_timeout(end_time, NULL));
intel_engine_pm_put(engine);
- pr_info("%s: %lu request + sync\n", engine->name, count);
+ gt_info(engine->gt, "%s: %lu request + sync\n", engine->name,
+ count);
thread->result = err;
}
@@ -1525,7 +1568,7 @@ static void __live_parallel_engineN(struct kthread_work *work)
} while (!__igt_timeout(end_time, NULL));
intel_engine_pm_put(engine);
- pr_info("%s: %lu requests\n", engine->name, count);
+ gt_info(engine->gt, "%s: %lu requests\n", engine->name, count);
thread->result = err;
}
@@ -1592,7 +1635,8 @@ static void __live_parallel_spin(struct kthread_work *work)
/* Occupy this engine for the whole test */
err = wait_for_all(engine->i915);
} else {
- pr_err("Failed to start spinner on %s\n", engine->name);
+ gt_err(engine->gt, "Failed to start spinner on %s\n",
+ engine->name);
err = -EINVAL;
}
igt_spinner_end(&spin);
@@ -1798,8 +1842,8 @@ static int live_breadcrumbs_smoketest(void *arg)
}
/* One ring interleaved between requests from all cpus */
smoke[idx].max_batch /= ncpus + 1;
- pr_debug("Limiting batches to %d requests on %s\n",
- smoke[idx].max_batch, engine->name);
+ gt_dbg(engine->gt, "Limiting batches to %d requests on %s\n",
+ smoke[idx].max_batch, engine->name);
for (n = 0; n < ncpus; n++) {
unsigned int i = idx * ncpus + n;
@@ -1849,7 +1893,8 @@ static int live_breadcrumbs_smoketest(void *arg)
num_fences += atomic_long_read(&smoke[idx].num_fences);
idx++;
}
- pr_info("Completed %lu waits for %lu fences across %d engines and %d cpus\n",
+ gt_info(engine->gt,
+ "Completed %lu waits for %lu fences across %d engines and %d cpus\n",
num_waits, num_fences, idx, ncpus);
ret = igt_live_test_end(&live) ?: ret;
@@ -2013,6 +2058,7 @@ static u32 hwsp_offset(const struct intel_context *ce, u32 *dw)
static int measure_semaphore_response(struct intel_context *ce)
{
+ struct intel_gt *gt = ce->engine->gt;
u32 *sema = hwsp_scratch(ce);
const u32 offset = hwsp_offset(ce, sema);
u32 elapsed[TF_COUNT], cycles;
@@ -2075,7 +2121,8 @@ static int measure_semaphore_response(struct intel_context *ce)
}
cycles = trifilter(elapsed);
- pr_info("%s: semaphore response %d cycles, %lluns\n",
+ gt_info(gt,
+ "%s: semaphore response %d cycles, %lluns\n",
ce->engine->name, cycles >> TF_BIAS,
cycles_to_ns(ce->engine, cycles));
@@ -2088,6 +2135,7 @@ static int measure_semaphore_response(struct intel_context *ce)
static int measure_idle_dispatch(struct intel_context *ce)
{
+ struct intel_gt *gt = ce->engine->gt;
u32 *sema = hwsp_scratch(ce);
const u32 offset = hwsp_offset(ce, sema);
u32 elapsed[TF_COUNT], cycles;
@@ -2146,7 +2194,8 @@ static int measure_idle_dispatch(struct intel_context *ce)
elapsed[i] = sema[i] - elapsed[i];
cycles = trifilter(elapsed);
- pr_info("%s: idle dispatch latency %d cycles, %lluns\n",
+ gt_info(gt,
+ "%s: idle dispatch latency %d cycles, %lluns\n",
ce->engine->name, cycles >> TF_BIAS,
cycles_to_ns(ce->engine, cycles));
@@ -2159,6 +2208,7 @@ static int measure_idle_dispatch(struct intel_context *ce)
static int measure_busy_dispatch(struct intel_context *ce)
{
+ struct intel_gt *gt = ce->engine->gt;
u32 *sema = hwsp_scratch(ce);
const u32 offset = hwsp_offset(ce, sema);
u32 elapsed[TF_COUNT + 1], cycles;
@@ -2223,7 +2273,8 @@ static int measure_busy_dispatch(struct intel_context *ce)
}
cycles = trifilter(elapsed);
- pr_info("%s: busy dispatch latency %d cycles, %lluns\n",
+ gt_info(gt,
+ "%s: busy dispatch latency %d cycles, %lluns\n",
ce->engine->name, cycles >> TF_BIAS,
cycles_to_ns(ce->engine, cycles));
@@ -2262,6 +2313,7 @@ static int plug(struct intel_engine_cs *engine, u32 *sema, u32 mode, int value)
static int measure_inter_request(struct intel_context *ce)
{
+ struct intel_gt *gt = ce->engine->gt;
u32 *sema = hwsp_scratch(ce);
const u32 offset = hwsp_offset(ce, sema);
u32 elapsed[TF_COUNT + 1], cycles;
@@ -2336,7 +2388,8 @@ static int measure_inter_request(struct intel_context *ce)
elapsed[i - 1] = sema[i + 1] - sema[i];
cycles = trifilter(elapsed);
- pr_info("%s: inter-request latency %d cycles, %lluns\n",
+ gt_info(gt,
+ "%s: inter-request latency %d cycles, %lluns\n",
ce->engine->name, cycles >> TF_BIAS,
cycles_to_ns(ce->engine, cycles));
@@ -2353,6 +2406,7 @@ static int measure_inter_request(struct intel_context *ce)
static int measure_context_switch(struct intel_context *ce)
{
+ struct intel_gt *gt = ce->engine->gt;
u32 *sema = hwsp_scratch(ce);
const u32 offset = hwsp_offset(ce, sema);
struct i915_request *fence = NULL;
@@ -2431,7 +2485,8 @@ static int measure_context_switch(struct intel_context *ce)
elapsed[i - 1] = sema[2 * i + 2] - sema[2 * i + 1];
cycles = trifilter(elapsed);
- pr_info("%s: context switch latency %d cycles, %lluns\n",
+ gt_info(gt,
+ "%s: context switch latency %d cycles, %lluns\n",
ce->engine->name, cycles >> TF_BIAS,
cycles_to_ns(ce->engine, cycles));
@@ -2447,6 +2502,7 @@ static int measure_context_switch(struct intel_context *ce)
static int measure_preemption(struct intel_context *ce)
{
+ struct intel_gt *gt = ce->engine->gt;
u32 *sema = hwsp_scratch(ce);
const u32 offset = hwsp_offset(ce, sema);
u32 elapsed[TF_COUNT], cycles;
@@ -2534,7 +2590,8 @@ static int measure_preemption(struct intel_context *ce)
elapsed[i - 1] = sema[2 * i + 0] - elapsed[i - 1];
cycles = trifilter(elapsed);
- pr_info("%s: preemption dispatch latency %d cycles, %lluns\n",
+ gt_info(gt,
+ "%s: preemption dispatch latency %d cycles, %lluns\n",
ce->engine->name, cycles >> TF_BIAS,
cycles_to_ns(ce->engine, cycles));
@@ -2542,7 +2599,8 @@ static int measure_preemption(struct intel_context *ce)
elapsed[i - 1] = sema[2 * i + 1] - sema[2 * i + 0];
cycles = trifilter(elapsed);
- pr_info("%s: preemption switch latency %d cycles, %lluns\n",
+ gt_info(gt,
+ "%s: preemption switch latency %d cycles, %lluns\n",
ce->engine->name, cycles >> TF_BIAS,
cycles_to_ns(ce->engine, cycles));
@@ -2567,6 +2625,7 @@ static void signal_cb(struct dma_fence *fence, struct dma_fence_cb *cb)
static int measure_completion(struct intel_context *ce)
{
+ struct intel_gt *gt = ce->engine->gt;
u32 *sema = hwsp_scratch(ce);
const u32 offset = hwsp_offset(ce, sema);
u32 elapsed[TF_COUNT], cycles;
@@ -2636,7 +2695,8 @@ static int measure_completion(struct intel_context *ce)
}
cycles = trifilter(elapsed);
- pr_info("%s: completion latency %d cycles, %lluns\n",
+ gt_info(gt,
+ "%s: completion latency %d cycles, %lluns\n",
ce->engine->name, cycles >> TF_BIAS,
cycles_to_ns(ce->engine, cycles));
@@ -2929,7 +2989,8 @@ static int perf_series_engines(void *arg)
decimal = 0;
}
- pr_info("%s %5s: { seqno:%d, busy:%d.%02d%%, runtime:%lldms, walltime:%lldms }\n",
+ gt_info(engine->gt,
+ "%s %5s: { seqno:%d, busy:%d.%02d%%, runtime:%lldms, walltime:%lldms }\n",
name, p->engine->name, ce->timeline->seqno,
integer, decimal,
div_u64(p->runtime, 1000 * 1000),
@@ -3275,7 +3336,8 @@ static int perf_parallel_engines(void *arg)
}
GEM_BUG_ON(engine != p->engine);
- pr_info("%s %5s: { count:%lu, busy:%d.%02d%%, runtime:%lldms, walltime:%lldms }\n",
+ gt_info(engine->gt,
+ "%s %5s: { count:%lu, busy:%d.%02d%%, runtime:%lldms, walltime:%lldms }\n",
name, engine->name, p->count, integer, decimal,
div_u64(p->runtime, 1000 * 1000),
div_u64(ktime_to_ns(p->time), 1000 * 1000));
diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
index 7c4111e60f2e..4c2744a97c55 100644
--- a/drivers/gpu/drm/i915/selftests/i915_vma.c
+++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
@@ -28,6 +28,8 @@
#include "gem/i915_gem_internal.h"
#include "gem/selftests/mock_context.h"
+#include "gt/intel_gt_print.h"
+
#include "i915_scatterlist.h"
#include "i915_selftest.h"
@@ -38,21 +40,23 @@ static bool assert_vma(struct i915_vma *vma,
struct drm_i915_gem_object *obj,
struct i915_gem_context *ctx)
{
+ struct intel_gt *gt = vma->vm->gt;
bool ok = true;
if (vma->vm != ctx->vm) {
- pr_err("VMA created with wrong VM\n");
+ gt_err(gt, "VMA created with wrong VM\n");
ok = false;
}
if (vma->size != obj->base.size) {
- pr_err("VMA created with wrong size, found %llu, expected %zu\n",
+ gt_err(gt,
+ "VMA created with wrong size, found %llu, expected %zu\n",
vma->size, obj->base.size);
ok = false;
}
if (vma->gtt_view.type != I915_GTT_VIEW_NORMAL) {
- pr_err("VMA created with wrong type [%d]\n",
+ gt_err(gt, "VMA created with wrong type [%d]\n",
vma->gtt_view.type);
ok = false;
}
@@ -74,30 +78,34 @@ checked_vma_instance(struct drm_i915_gem_object *obj,
/* Manual checks, will be reinforced by i915_vma_compare! */
if (vma->vm != vm) {
- pr_err("VMA's vm [%p] does not match request [%p]\n",
- vma->vm, vm);
+ gt_err(vm->gt,
+ "VMA's vm [%p] does not match request [%p]\n", vma->vm,
+ vm);
ok = false;
}
if (i915_is_ggtt(vm) != i915_vma_is_ggtt(vma)) {
- pr_err("VMA ggtt status [%d] does not match parent [%d]\n",
+ gt_err(vm->gt,
+ "VMA ggtt status [%d] does not match parent [%d]\n",
i915_vma_is_ggtt(vma), i915_is_ggtt(vm));
ok = false;
}
if (i915_vma_compare(vma, vm, view)) {
- pr_err("i915_vma_compare failed with create parameters!\n");
+ gt_err(vm->gt,
+ "i915_vma_compare failed with create parameters!\n");
return ERR_PTR(-EINVAL);
}
if (i915_vma_compare(vma, vma->vm,
i915_vma_is_ggtt(vma) ? &vma->gtt_view : NULL)) {
- pr_err("i915_vma_compare failed with itself\n");
+ gt_err(vm->gt, "i915_vma_compare failed with itself\n");
return ERR_PTR(-EINVAL);
}
if (!ok) {
- pr_err("i915_vma_compare failed to detect the difference!\n");
+ gt_err(vm->gt,
+ "i915_vma_compare failed to detect the difference!\n");
return ERR_PTR(-EINVAL);
}
@@ -126,14 +134,16 @@ static int create_vmas(struct drm_i915_private *i915,
return PTR_ERR(vma);
if (!assert_vma(vma, obj, ctx)) {
- pr_err("VMA lookup/create failed\n");
+ gt_err(vm->gt,
+ "VMA lookup/create failed\n");
return -EINVAL;
}
if (!pinned) {
err = i915_vma_pin(vma, 0, 0, PIN_USER);
if (err) {
- pr_err("Failed to pin VMA\n");
+ gt_err(vm->gt,
+ "Failed to pin VMA\n");
return err;
}
} else {
@@ -332,8 +342,11 @@ static int igt_vma_pin1(void *arg)
for (m = modes; m->assert; m++) {
err = i915_vma_pin(vma, m->size, 0, m->flags);
if (!m->assert(vma, m, err)) {
- pr_err("%s to pin single page into GGTT with mode[%d:%s]: size=%llx flags=%llx, err=%d\n",
- m->assert == assert_pin_valid ? "Failed" : "Unexpectedly succeeded",
+ gt_err(ggtt->vm.gt,
+ "%s to pin single page into GGTT with mode[%d:%s]: size=%llx flags=%llx, err=%d\n",
+ m->assert == assert_pin_valid ?
+ "Failed" :
+ "Unexpectedly succeeded",
(int)(m - modes), m->string, m->size, m->flags,
err);
if (!err)
@@ -346,7 +359,9 @@ static int igt_vma_pin1(void *arg)
i915_vma_unpin(vma);
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("Failed to unbind single page from GGTT, err=%d\n", err);
+ gt_err(ggtt->vm.gt,
+ "Failed to unbind single page from GGTT, err=%d\n",
+ err);
goto out;
}
}
@@ -374,6 +389,7 @@ assert_rotated(struct drm_i915_gem_object *obj,
const struct intel_rotation_info *r, unsigned int n,
struct scatterlist *sg)
{
+ struct intel_gt *gt = to_gt(to_i915(obj->base.dev));
unsigned int x, y;
for (x = 0; x < r->plane[n].width; x++) {
@@ -384,7 +400,8 @@ assert_rotated(struct drm_i915_gem_object *obj,
dma_addr_t src;
if (!sg) {
- pr_err("Invalid sg table: too short at plane %d, (%d, %d)!\n",
+ gt_err(gt,
+ "Invalid sg table: too short at plane %d, (%d, %d)!\n",
n, x, y);
return ERR_PTR(-EINVAL);
}
@@ -393,14 +410,16 @@ assert_rotated(struct drm_i915_gem_object *obj,
src = i915_gem_object_get_dma_address(obj, src_idx);
if (sg_dma_len(sg) != PAGE_SIZE) {
- pr_err("Invalid sg.length, found %d, expected %lu for rotated page (%d, %d) [src index %lu]\n",
- sg_dma_len(sg), PAGE_SIZE,
- x, y, src_idx);
+ gt_err(gt,
+ "Invalid sg.length, found %d, expected %lu for rotated page (%d, %d) [src index %lu]\n",
+ sg_dma_len(sg), PAGE_SIZE, x, y,
+ src_idx);
return ERR_PTR(-EINVAL);
}
if (sg_dma_address(sg) != src) {
- pr_err("Invalid address for rotated page (%d, %d) [src index %lu]\n",
+ gt_err(gt,
+ "Invalid address for rotated page (%d, %d) [src index %lu]\n",
x, y, src_idx);
return ERR_PTR(-EINVAL);
}
@@ -414,19 +433,22 @@ assert_rotated(struct drm_i915_gem_object *obj,
continue;
if (!sg) {
- pr_err("Invalid sg table: too short at plane %d, (%d, %d)!\n",
+ gt_err(gt,
+ "Invalid sg table: too short at plane %d, (%d, %d)!\n",
n, x, y);
return ERR_PTR(-EINVAL);
}
if (sg_dma_len(sg) != left) {
- pr_err("Invalid sg.length, found %d, expected %u for rotated page (%d, %d)\n",
+ gt_err(gt,
+ "Invalid sg.length, found %d, expected %u for rotated page (%d, %d)\n",
sg_dma_len(sg), left, x, y);
return ERR_PTR(-EINVAL);
}
if (sg_dma_address(sg) != 0) {
- pr_err("Invalid address, found %pad, expected 0 for remapped page (%d, %d)\n",
+ gt_err(gt,
+ "Invalid address, found %pad, expected 0 for remapped page (%d, %d)\n",
&sg_dma_address(sg), x, y);
return ERR_PTR(-EINVAL);
}
@@ -451,6 +473,7 @@ assert_remapped(struct drm_i915_gem_object *obj,
const struct intel_remapped_info *r, unsigned int n,
struct scatterlist *sg)
{
+ struct intel_gt *gt = to_gt(to_i915(obj->base.dev));
unsigned int x, y;
unsigned int left = 0;
unsigned int offset;
@@ -461,7 +484,8 @@ assert_remapped(struct drm_i915_gem_object *obj,
dma_addr_t src;
if (!sg) {
- pr_err("Invalid sg table: too short at plane %d, (%d, %d)!\n",
+ gt_err(gt,
+ "Invalid sg table: too short at plane %d, (%d, %d)!\n",
n, x, y);
return ERR_PTR(-EINVAL);
}
@@ -474,14 +498,16 @@ assert_remapped(struct drm_i915_gem_object *obj,
src = i915_gem_object_get_dma_address(obj, src_idx);
if (left < PAGE_SIZE || left & (PAGE_SIZE-1)) {
- pr_err("Invalid sg.length, found %d, expected %lu for remapped page (%d, %d) [src index %lu]\n",
- sg_dma_len(sg), PAGE_SIZE,
- x, y, src_idx);
+ gt_err(gt,
+ "Invalid sg.length, found %d, expected %lu for remapped page (%d, %d) [src index %lu]\n",
+ sg_dma_len(sg), PAGE_SIZE, x, y,
+ src_idx);
return ERR_PTR(-EINVAL);
}
if (sg_dma_address(sg) + offset != src) {
- pr_err("Invalid address for remapped page (%d, %d) [src index %lu]\n",
+ gt_err(gt,
+ "Invalid address for remapped page (%d, %d) [src index %lu]\n",
x, y, src_idx);
return ERR_PTR(-EINVAL);
}
@@ -495,7 +521,8 @@ assert_remapped(struct drm_i915_gem_object *obj,
}
if (left) {
- pr_err("Unexpected sg tail with %d size for remapped page (%d, %d)\n",
+ gt_err(gt,
+ "Unexpected sg tail with %d size for remapped page (%d, %d)\n",
left,
x, y);
return ERR_PTR(-EINVAL);
@@ -507,20 +534,23 @@ assert_remapped(struct drm_i915_gem_object *obj,
continue;
if (!sg) {
- pr_err("Invalid sg table: too short at plane %d, (%d, %d)!\n",
+ gt_err(gt,
+ "Invalid sg table: too short at plane %d, (%d, %d)!\n",
n, x, y);
return ERR_PTR(-EINVAL);
}
if (sg_dma_len(sg) != left) {
- pr_err("Invalid sg.length, found %u, expected %u for remapped page (%d, %d)\n",
+ gt_err(gt,
+ "Invalid sg.length, found %u, expected %u for remapped page (%d, %d)\n",
sg_dma_len(sg), left,
x, y);
return ERR_PTR(-EINVAL);
}
if (sg_dma_address(sg) != 0) {
- pr_err("Invalid address, found %pad, expected 0 for remapped page (%d, %d)\n",
+ gt_err(gt,
+ "Invalid address, found %pad, expected 0 for remapped page (%d, %d)\n",
&sg_dma_address(sg),
x, y);
return ERR_PTR(-EINVAL);
@@ -628,7 +658,9 @@ static int igt_vma_rotate_remap(void *arg)
err = i915_vma_pin(vma, 0, 0, PIN_GLOBAL);
if (err) {
- pr_err("Failed to pin VMA, err=%d\n", err);
+ gt_err(vm->gt,
+ "Failed to pin VMA, err=%d\n",
+ err);
goto out_object;
}
@@ -636,36 +668,47 @@ static int igt_vma_rotate_remap(void *arg)
if (view.type == I915_GTT_VIEW_ROTATED &&
vma->size != expected_pages * PAGE_SIZE) {
- pr_err("VMA is wrong size, expected %lu, found %llu\n",
- PAGE_SIZE * expected_pages, vma->size);
+ gt_err(vm->gt,
+ "VMA is wrong size, expected %lu, found %llu\n",
+ PAGE_SIZE *
+ expected_pages,
+ vma->size);
err = -EINVAL;
goto out_object;
}
if (view.type == I915_GTT_VIEW_REMAPPED &&
vma->size > expected_pages * PAGE_SIZE) {
- pr_err("VMA is wrong size, expected %lu, found %llu\n",
- PAGE_SIZE * expected_pages, vma->size);
+ gt_err(vm->gt,
+ "VMA is wrong size, expected %lu, found %llu\n",
+ PAGE_SIZE *
+ expected_pages,
+ vma->size);
err = -EINVAL;
goto out_object;
}
if (vma->pages->nents > expected_pages) {
- pr_err("sg table is wrong sizeo, expected %u, found %u nents\n",
- expected_pages, vma->pages->nents);
+ gt_err(vm->gt,
+ "sg table is wrong sizeo, expected %u, found %u nents\n",
+ expected_pages,
+ vma->pages->nents);
err = -EINVAL;
goto out_object;
}
if (vma->node.size < vma->size) {
- pr_err("VMA binding too small, expected %llu, found %llu\n",
- vma->size, vma->node.size);
+ gt_err(vm->gt,
+ "VMA binding too small, expected %llu, found %llu\n",
+ vma->size,
+ vma->node.size);
err = -EINVAL;
goto out_object;
}
if (vma->pages == obj->mm.pages) {
- pr_err("VMA using unrotated object pages!\n");
+ gt_err(vm->gt,
+ "VMA using unrotated object pages!\n");
err = -EINVAL;
goto out_object;
}
@@ -677,7 +720,8 @@ static int igt_vma_rotate_remap(void *arg)
else
sg = assert_remapped(obj, &view.remapped, n, sg);
if (IS_ERR(sg)) {
- pr_err("Inconsistent %s VMA pages for plane %d: [(%d, %d, %d, %d, %d), (%d, %d, %d, %d, %d)]\n",
+ gt_err(vm->gt,
+ "Inconsistent %s VMA pages for plane %d: [(%d, %d, %d, %d, %d), (%d, %d, %d, %d, %d)]\n",
view.type == I915_GTT_VIEW_ROTATED ?
"rotated" : "remapped", n,
plane_info[0].width,
@@ -698,7 +742,9 @@ static int igt_vma_rotate_remap(void *arg)
i915_vma_unpin(vma);
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("Unbinding returned %i\n", err);
+ gt_err(vm->gt,
+ "Unbinding returned %i\n",
+ err);
goto out_object;
}
cond_resched();
@@ -719,6 +765,7 @@ static bool assert_partial(struct drm_i915_gem_object *obj,
unsigned long offset,
unsigned long size)
{
+ struct intel_gt *gt = vma->vm->gt;
struct sgt_iter sgt;
dma_addr_t dma;
@@ -726,13 +773,15 @@ static bool assert_partial(struct drm_i915_gem_object *obj,
dma_addr_t src;
if (!size) {
- pr_err("Partial scattergather list too long\n");
+ gt_err(gt,
+ "Partial scattergather list too long\n");
return false;
}
src = i915_gem_object_get_dma_address(obj, offset);
if (src != dma) {
- pr_err("DMA mismatch for partial page offset %lu\n",
+ gt_err(gt,
+ "DMA mismatch for partial page offset %lu\n",
offset);
return false;
}
@@ -749,41 +798,47 @@ static bool assert_pin(struct i915_vma *vma,
u64 size,
const char *name)
{
+ struct intel_gt *gt = vma->vm->gt;
bool ok = true;
if (vma->size != size) {
- pr_err("(%s) VMA is wrong size, expected %llu, found %llu\n",
+ gt_err(gt,
+ "(%s) VMA is wrong size, expected %llu, found %llu\n",
name, size, vma->size);
ok = false;
}
if (vma->node.size < vma->size) {
- pr_err("(%s) VMA binding too small, expected %llu, found %llu\n",
+ gt_err(gt,
+ "(%s) VMA binding too small, expected %llu, found %llu\n",
name, vma->size, vma->node.size);
ok = false;
}
if (view && view->type != I915_GTT_VIEW_NORMAL) {
if (memcmp(&vma->gtt_view, view, sizeof(*view))) {
- pr_err("(%s) VMA mismatch upon creation!\n",
- name);
+ gt_err(gt,
+ "(%s) VMA mismatch upon creation!\n", name);
ok = false;
}
if (vma->pages == vma->obj->mm.pages) {
- pr_err("(%s) VMA using original object pages!\n",
+ gt_err(gt,
+ "(%s) VMA using original object pages!\n",
name);
ok = false;
}
} else {
if (vma->gtt_view.type != I915_GTT_VIEW_NORMAL) {
- pr_err("Not the normal ggtt view! Found %d\n",
+ gt_err(gt,
+ "Not the normal ggtt view! Found %d\n",
vma->gtt_view.type);
ok = false;
}
if (vma->pages != vma->obj->mm.pages) {
- pr_err("VMA not using object pages!\n");
+ gt_err(gt,
+ "VMA not using object pages!\n");
ok = false;
}
}
@@ -843,14 +898,16 @@ static int igt_vma_partial(void *arg)
goto out_object;
if (!assert_pin(vma, &view, sz*PAGE_SIZE, p->name)) {
- pr_err("(%s) Inconsistent partial pinning for (offset=%d, size=%d)\n",
+ gt_err(vm->gt,
+ "(%s) Inconsistent partial pinning for (offset=%d, size=%d)\n",
p->name, offset, sz);
err = -EINVAL;
goto out_object;
}
if (!assert_partial(obj, vma, offset, sz)) {
- pr_err("(%s) Inconsistent partial pages for (offset=%d, size=%d)\n",
+ gt_err(vm->gt,
+ "(%s) Inconsistent partial pages for (offset=%d, size=%d)\n",
p->name, offset, sz);
err = -EINVAL;
goto out_object;
@@ -860,7 +917,9 @@ static int igt_vma_partial(void *arg)
nvma++;
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("Unbinding returned %i\n", err);
+ gt_err(vm->gt,
+ "Unbinding returned %i\n",
+ err);
goto out_object;
}
@@ -872,7 +931,8 @@ static int igt_vma_partial(void *arg)
list_for_each_entry(vma, &obj->vma.list, obj_link)
count++;
if (count != nvma) {
- pr_err("(%s) All partial vma were not recorded on the obj->vma_list: found %u, expected %u\n",
+ gt_err(vm->gt,
+ "(%s) All partial vma were not recorded on the obj->vma_list: found %u, expected %u\n",
p->name, count, nvma);
err = -EINVAL;
goto out_object;
@@ -890,7 +950,8 @@ static int igt_vma_partial(void *arg)
goto out_object;
if (!assert_pin(vma, NULL, obj->base.size, p->name)) {
- pr_err("(%s) inconsistent full pin\n", p->name);
+ gt_err(vm->gt, "(%s) inconsistent full pin\n",
+ p->name);
err = -EINVAL;
goto out_object;
}
@@ -899,7 +960,7 @@ static int igt_vma_partial(void *arg)
err = i915_vma_unbind_unlocked(vma);
if (err) {
- pr_err("Unbinding returned %i\n", err);
+ gt_err(vm->gt, "Unbinding returned %i\n", err);
goto out_object;
}
@@ -907,7 +968,9 @@ static int igt_vma_partial(void *arg)
list_for_each_entry(vma, &obj->vma.list, obj_link)
count++;
if (count != nvma) {
- pr_err("(%s) allocated an extra full vma!\n", p->name);
+ gt_err(vm->gt,
+ "(%s) allocated an extra full vma!\n",
+ p->name);
err = -EINVAL;
goto out_object;
}
@@ -1080,8 +1143,10 @@ static int igt_vma_remapped_gtt(void *arg)
val = ioread32(&map[offset / sizeof(*map)]);
if (val != exp) {
- pr_err("%s VMA write test failed, expected 0x%x, found 0x%x\n",
- *t == I915_GTT_VIEW_ROTATED ? "Rotated" : "Remapped",
+ gt_err(to_gt(i915),
+ "%s VMA write test failed, expected 0x%x, found 0x%x\n",
+ *t == I915_GTT_VIEW_ROTATED ?
+ "Rotated" : "Remapped",
exp, val);
i915_vma_unpin_iomap(vma);
err = -EINVAL;
diff --git a/drivers/gpu/drm/i915/selftests/intel_uncore.c b/drivers/gpu/drm/i915/selftests/intel_uncore.c
index 514d2200751b..7e25e98f0fb7 100644
--- a/drivers/gpu/drm/i915/selftests/intel_uncore.c
+++ b/drivers/gpu/drm/i915/selftests/intel_uncore.c
@@ -25,6 +25,7 @@
#include "../i915_selftest.h"
#include "gt/intel_gt.h"
+#include "gt/intel_gt_print.h"
static int intel_fw_table_check(const struct intel_forcewake_range *ranges,
unsigned int num_ranges,
@@ -161,6 +162,7 @@ static int live_forcewake_ops(void *arg)
const struct reg *r;
struct intel_gt *gt = arg;
struct intel_uncore_forcewake_domain *domain;
+ struct drm_i915_private *i915 = gt->i915;
struct intel_uncore *uncore = gt->uncore;
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -171,8 +173,8 @@ static int live_forcewake_ops(void *arg)
GEM_BUG_ON(gt->awake);
/* vlv/chv with their pcu behave differently wrt reads */
- if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) {
- pr_debug("PCU fakes forcewake badly; skipping\n");
+ if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
+ gt_dbg(gt, "PCU fakes forcewake badly; skipping\n");
return 0;
}
@@ -189,11 +191,12 @@ static int live_forcewake_ops(void *arg)
/* We have to pick carefully to get the exact behaviour we need */
for (r = registers; r->name; r++)
- if (IS_GRAPHICS_VER(gt->i915, r->min_graphics_ver, r->max_graphics_ver))
+ if (IS_GRAPHICS_VER(i915, r->min_graphics_ver, r->max_graphics_ver))
break;
if (!r->name) {
- pr_debug("Forcewaked register not known for %s; skipping\n",
- intel_platform_name(INTEL_INFO(gt->i915)->platform));
+ gt_dbg(gt,
+ "Forcewaked register not known for %s; skipping\n",
+ intel_platform_name(INTEL_INFO(i915)->platform));
return 0;
}
@@ -225,7 +228,8 @@ static int live_forcewake_ops(void *arg)
if (!domain->wake_count)
continue;
- pr_err("fw_domain %s still active, aborting test!\n",
+ gt_err(gt,
+ "fw_domain %s still active, aborting test!\n",
intel_uncore_forcewake_domain_to_str(domain->id));
err = -EINVAL;
goto out_rpm;
@@ -245,14 +249,15 @@ static int live_forcewake_ops(void *arg)
err = wait_ack_clear(domain, FORCEWAKE_KERNEL);
preempt_enable();
if (err) {
- pr_err("Failed to clear fw_domain %s\n",
+ gt_err(gt,
+ "Failed to clear fw_domain %s\n",
intel_uncore_forcewake_domain_to_str(domain->id));
goto out_rpm;
}
}
if (!val) {
- pr_err("%s:%s was zero while fw was held!\n",
+ gt_err(gt, "%s:%s was zero while fw was held!\n",
engine->name, r->name);
err = -EINVAL;
goto out_rpm;
@@ -260,7 +265,8 @@ static int live_forcewake_ops(void *arg)
/* We then expect the read to return 0 outside of the fw */
if (wait_for(readl(reg) == 0, 100)) {
- pr_err("%s:%s=%0x, fw_domains 0x%x still up after 100ms!\n",
+ gt_err(gt,
+ "%s:%s=%0x, fw_domains 0x%x still up after 100ms!\n",
engine->name, r->name, readl(reg), fw_domains);
err = -ETIMEDOUT;
goto out_rpm;
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v4 2/7] drm/i915: Add i915_* printer macros
2026-09-24 12:01 [PATCH v4 0/7] drm/i915/selftests: Modernize printing in i915 selftests Krzysztof Karas
2026-09-24 12:01 ` [PATCH v4 1/7] drm/i915/selftests: Use gt_*/drm_* prints in core selftests Krzysztof Karas
@ 2026-09-24 12:01 ` Krzysztof Karas
2026-09-24 13:58 ` Sebastian Brzezinka
2026-09-25 10:47 ` Jani Nikula
2026-09-24 12:01 ` [PATCH v4 3/7] drm/i915/selftests: Use gt_*/i915_* prints in selftest helpers Krzysztof Karas
` (5 subsequent siblings)
7 siblings, 2 replies; 13+ messages in thread
From: Krzysztof Karas @ 2026-09-24 12:01 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec, Krzysztof Karas,
Andi Shyti
Add i915_* family of printer macros, following existing example
of gt_* and xe_* prints.
Suggested-by: Andi Shyti <andi.shyti@kernel.org>
Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
---
drivers/gpu/drm/i915/i915_printk.h | 53 ++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
create mode 100644 drivers/gpu/drm/i915/i915_printk.h
diff --git a/drivers/gpu/drm/i915/i915_printk.h b/drivers/gpu/drm/i915/i915_printk.h
new file mode 100644
index 000000000000..5bbbe604cae8
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_printk.h
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _I915_PRINTK_H_
+#define _I915_PRINTK_H_
+
+#include <drm/drm_print.h>
+
+#define i915_printk(_i915, _level, _fmt, ...) \
+ drm_##_level(&(_i915)->drm, _fmt, ## __VA_ARGS__)
+
+#define i915_err(_i915, _fmt, ...) \
+ i915_printk((_i915), err, _fmt, ##__VA_ARGS__)
+
+#define i915_err_once(_i915, _fmt, ...) \
+ i915_printk((_i915), err_once, _fmt, ##__VA_ARGS__)
+
+#define i915_err_ratelimited(_i915, _fmt, ...) \
+ i915_printk((_i915), err_ratelimited, _fmt, ##__VA_ARGS__)
+
+#define i915_warn(_i915, _fmt, ...) \
+ i915_printk((_i915), warn, _fmt, ##__VA_ARGS__)
+
+#define i915_notice(_i915, _fmt, ...) \
+ i915_printk((_i915), notice, _fmt, ##__VA_ARGS__)
+
+#define i915_info(_i915, _fmt, ...) \
+ i915_printk((_i915), info, _fmt, ##__VA_ARGS__)
+
+#define i915_dbg(_i915, _fmt, ...) \
+ i915_printk((_i915), dbg, _fmt, ##__VA_ARGS__)
+
+#define i915_dbg_ratelimited(_i915, _fmt, ...) \
+ i915_printk((_i915), dbg_ratelimited, _fmt, ##__VA_ARGS__)
+
+#define i915_WARN_type(_i915, _type, _condition, _fmt, ...) \
+ drm_WARN##_type(&(_i915)->drm, _condition, _fmt, ## __VA_ARGS__)
+
+#define i915_WARN(_i915, _condition, _fmt, ...) \
+ i915_WARN_type((_i915), _condition, __I915_PRINTK_FMT((_i915), _fmt, ## __VA_ARGS__))
+
+#define i915_WARN_ONCE(_i915, _condition, _fmt, ...) \
+ i915_WARN_type((_i915), _ONCE, _condition, __I915_PRINTK_FMT((_i915), _fmt, ## __VA_ARGS__))
+
+#define i915_WARN_ON(_i915, _condition) \
+ i915_WARN((_i915), _condition, "%s(%s)", "WARN_ON", __stringify(_condition))
+
+#define i915_WARN_ON_ONCE(_i915, _condition) \
+ i915_WARN_ONCE((_i915), _condition, "%s(%s)", "WARN_ON_ONCE", __stringify(_condition))
+
+#endif
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v4 2/7] drm/i915: Add i915_* printer macros
2026-09-24 12:01 ` [PATCH v4 2/7] drm/i915: Add i915_* printer macros Krzysztof Karas
@ 2026-09-24 13:58 ` Sebastian Brzezinka
2026-09-25 10:47 ` Jani Nikula
1 sibling, 0 replies; 13+ messages in thread
From: Sebastian Brzezinka @ 2026-09-24 13:58 UTC (permalink / raw)
To: Krzysztof Karas, intel-gfx
Cc: dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec, Andi Shyti
Hi,
On Thu Sep 24, 2026 at 2:01 PM CEST, Krzysztof Karas wrote:
> Add i915_* family of printer macros, following existing example
> of gt_* and xe_* prints.
>
> Suggested-by: Andi Shyti <andi.shyti@kernel.org>
> Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
> ---
> drivers/gpu/drm/i915/i915_printk.h | 53 ++++++++++++++++++++++++++++++
> 1 file changed, 53 insertions(+)
> create mode 100644 drivers/gpu/drm/i915/i915_printk.h
>
> diff --git a/drivers/gpu/drm/i915/i915_printk.h b/drivers/gpu/drm/i915/i915_printk.h
> new file mode 100644
> index 000000000000..5bbbe604cae8
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/i915_printk.h
> @@ -0,0 +1,53 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#ifndef _I915_PRINTK_H_
> +#define _I915_PRINTK_H_
> +
> +#include <drm/drm_print.h>
> +
> +#define i915_printk(_i915, _level, _fmt, ...) \
> + drm_##_level(&(_i915)->drm, _fmt, ## __VA_ARGS__)
> +
> +#define i915_err(_i915, _fmt, ...) \
> + i915_printk((_i915), err, _fmt, ##__VA_ARGS__)
> +
> +#define i915_err_once(_i915, _fmt, ...) \
> + i915_printk((_i915), err_once, _fmt, ##__VA_ARGS__)
> +
> +#define i915_err_ratelimited(_i915, _fmt, ...) \
> + i915_printk((_i915), err_ratelimited, _fmt, ##__VA_ARGS__)
> +
> +#define i915_warn(_i915, _fmt, ...) \
> + i915_printk((_i915), warn, _fmt, ##__VA_ARGS__)
> +
> +#define i915_notice(_i915, _fmt, ...) \
> + i915_printk((_i915), notice, _fmt, ##__VA_ARGS__)
> +
> +#define i915_info(_i915, _fmt, ...) \
> + i915_printk((_i915), info, _fmt, ##__VA_ARGS__)
> +
> +#define i915_dbg(_i915, _fmt, ...) \
> + i915_printk((_i915), dbg, _fmt, ##__VA_ARGS__)
> +
> +#define i915_dbg_ratelimited(_i915, _fmt, ...) \
> + i915_printk((_i915), dbg_ratelimited, _fmt, ##__VA_ARGS__)
> +
> +#define i915_WARN_type(_i915, _type, _condition, _fmt, ...) \
> + drm_WARN##_type(&(_i915)->drm, _condition, _fmt, ## __VA_ARGS__)
> +
> +#define i915_WARN(_i915, _condition, _fmt, ...) \
> + i915_WARN_type((_i915), _condition, __I915_PRINTK_FMT((_i915), _fmt, ## __VA_ARGS__))
> +
> +#define i915_WARN_ONCE(_i915, _condition, _fmt, ...) \
> + i915_WARN_type((_i915), _ONCE, _condition, __I915_PRINTK_FMT((_i915), _fmt, ## __VA_ARGS__))
> +
> +#define i915_WARN_ON(_i915, _condition) \
> + i915_WARN((_i915), _condition, "%s(%s)", "WARN_ON", __stringify(_condition))
> +
> +#define i915_WARN_ON_ONCE(_i915, _condition) \
> + i915_WARN_ONCE((_i915), _condition, "%s(%s)", "WARN_ON_ONCE", __stringify(_condition))
There is something wrong with the WARN macros. I noticed that they aren't
used anywhere in the series, so the compiler never expands them. I added
one to a file just to test it.
diff --git a/drivers/gpu/drm/i915/selftests/i915_selftest.c b/drivers/gpu/drm/i915/selftests/i915_selftest.c
index 4e2566189879..7446c265813a 100644
--- a/drivers/gpu/drm/i915/selftests/i915_selftest.c
+++ b/drivers/gpu/drm/i915/selftests/i915_selftest.c
@@ -50,6 +50,7 @@ int i915_mock_sanitycheck(void)
int i915_live_sanitycheck(struct drm_i915_private *i915)
{
i915_info(i915, "%s() - ok!\n", __func__);
+ i915_WARN_ON(i915, false);
return 0;
}
This is what I get when compiled:
vers/gpu/drm/i915/selftests/i915_selftest.c: In function 'i915_live_sanitycheck':
drivers/gpu/drm/i915/selftests/i915_selftest.c:53:33: error: macro "i915_WARN_type" requires 5 arguments, but only 3 given
53 | i915_WARN_ON(i915, false); /* TEMP: reviewer repro, will be reverted */
| ^
In file included from drivers/gpu/drm/i915/selftests/i915_selftest.c:26:
./drivers/gpu/drm/i915/i915_printk.h:38:9: note: macro "i915_WARN_type" defined here
38 | #define i915_WARN_type(_i915, _type, _condition, _fmt, ...) \
| ^~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_printk.h:42:9: error: 'i915_WARN_type' undeclared (first use in this function); did you mean 'i915_map_type'?
42 | i915_WARN_type((_i915), _condition, __I915_PRINTK_FMT((_i915), _fmt, ## __VA_ARGS__))
| ^~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_printk.h:48:9: note: in expansion of macro 'i915_WARN'
48 | i915_WARN((_i915), _condition, "%s(%s)", "WARN_ON", __stringify(_condition))
| ^~~~~~~~~
drivers/gpu/drm/i915/selftests/i915_selftest.c:53:9: note: in expansion of macro 'i915_WARN_ON'
53 | i915_WARN_ON(i915, false); /* TEMP: reviewer repro, will be reverted */
| ^~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_printk.h:42:9: note: each undeclared identifier is reported only once for each function it appears in
42 | i915_WARN_type((_i915), _condition, __I915_PRINTK_FMT((_i915), _fmt, ## __VA_ARGS__))
| ^~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_printk.h:48:9: note: in expansion of macro 'i915_WARN'
48 | i915_WARN((_i915), _condition, "%s(%s)", "WARN_ON", __stringify(_condition))
| ^~~~~~~~~
drivers/gpu/drm/i915/selftests/i915_selftest.c:53:9: note: in expansion of macro 'i915_WARN_ON'
53 | i915_WARN_ON(i915, false); /* TEMP: reviewer repro, will be reverted */
| ^~~~~~~~~~~~
CC [M] drivers/gpu/drm/i915/gvt/cmd_parser.o
make[6]: *** [scripts/Makefile.build:290: drivers/gpu/drm/i915/selftests/i915_selftest.o] Error 1
--
Best regards,
Sebastian
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v4 2/7] drm/i915: Add i915_* printer macros
2026-09-24 12:01 ` [PATCH v4 2/7] drm/i915: Add i915_* printer macros Krzysztof Karas
2026-09-24 13:58 ` Sebastian Brzezinka
@ 2026-09-25 10:47 ` Jani Nikula
2026-09-29 12:00 ` Krzysztof Karas
1 sibling, 1 reply; 13+ messages in thread
From: Jani Nikula @ 2026-09-25 10:47 UTC (permalink / raw)
To: Krzysztof Karas, intel-gfx
Cc: dri-devel, Andi Shyti, Janusz Krzysztofik, Sebastian Brzezinka,
Krzysztof Niemiec, Krzysztof Karas, Andi Shyti
On Thu, 24 Sep 2026, Krzysztof Karas <krzysztof.karas@intel.com> wrote:
> Add i915_* family of printer macros, following existing example
> of gt_* and xe_* prints.
Frankly, I don't want *any* of this.
The drm_* macros are already a bunch of wrappers around dev_*
macros. IMO this is just too much, just to avoid writing &i915->drm.
(And yes, I dislike what's been done in xe too.)
BR,
Jani.
>
> Suggested-by: Andi Shyti <andi.shyti@kernel.org>
> Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
> ---
> drivers/gpu/drm/i915/i915_printk.h | 53 ++++++++++++++++++++++++++++++
> 1 file changed, 53 insertions(+)
> create mode 100644 drivers/gpu/drm/i915/i915_printk.h
>
> diff --git a/drivers/gpu/drm/i915/i915_printk.h b/drivers/gpu/drm/i915/i915_printk.h
> new file mode 100644
> index 000000000000..5bbbe604cae8
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/i915_printk.h
> @@ -0,0 +1,53 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#ifndef _I915_PRINTK_H_
> +#define _I915_PRINTK_H_
> +
> +#include <drm/drm_print.h>
> +
> +#define i915_printk(_i915, _level, _fmt, ...) \
> + drm_##_level(&(_i915)->drm, _fmt, ## __VA_ARGS__)
> +
> +#define i915_err(_i915, _fmt, ...) \
> + i915_printk((_i915), err, _fmt, ##__VA_ARGS__)
> +
> +#define i915_err_once(_i915, _fmt, ...) \
> + i915_printk((_i915), err_once, _fmt, ##__VA_ARGS__)
> +
> +#define i915_err_ratelimited(_i915, _fmt, ...) \
> + i915_printk((_i915), err_ratelimited, _fmt, ##__VA_ARGS__)
> +
> +#define i915_warn(_i915, _fmt, ...) \
> + i915_printk((_i915), warn, _fmt, ##__VA_ARGS__)
> +
> +#define i915_notice(_i915, _fmt, ...) \
> + i915_printk((_i915), notice, _fmt, ##__VA_ARGS__)
> +
> +#define i915_info(_i915, _fmt, ...) \
> + i915_printk((_i915), info, _fmt, ##__VA_ARGS__)
> +
> +#define i915_dbg(_i915, _fmt, ...) \
> + i915_printk((_i915), dbg, _fmt, ##__VA_ARGS__)
> +
> +#define i915_dbg_ratelimited(_i915, _fmt, ...) \
> + i915_printk((_i915), dbg_ratelimited, _fmt, ##__VA_ARGS__)
> +
> +#define i915_WARN_type(_i915, _type, _condition, _fmt, ...) \
> + drm_WARN##_type(&(_i915)->drm, _condition, _fmt, ## __VA_ARGS__)
> +
> +#define i915_WARN(_i915, _condition, _fmt, ...) \
> + i915_WARN_type((_i915), _condition, __I915_PRINTK_FMT((_i915), _fmt, ## __VA_ARGS__))
> +
> +#define i915_WARN_ONCE(_i915, _condition, _fmt, ...) \
> + i915_WARN_type((_i915), _ONCE, _condition, __I915_PRINTK_FMT((_i915), _fmt, ## __VA_ARGS__))
> +
> +#define i915_WARN_ON(_i915, _condition) \
> + i915_WARN((_i915), _condition, "%s(%s)", "WARN_ON", __stringify(_condition))
> +
> +#define i915_WARN_ON_ONCE(_i915, _condition) \
> + i915_WARN_ONCE((_i915), _condition, "%s(%s)", "WARN_ON_ONCE", __stringify(_condition))
> +
> +#endif
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 2/7] drm/i915: Add i915_* printer macros
2026-09-25 10:47 ` Jani Nikula
@ 2026-09-29 12:00 ` Krzysztof Karas
0 siblings, 0 replies; 13+ messages in thread
From: Krzysztof Karas @ 2026-09-29 12:00 UTC (permalink / raw)
To: Jani Nikula
Cc: intel-gfx, dri-devel, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec, Andi Shyti
Hi Jani,
On 2026-09-25 at 13:47:39 +0300, Jani Nikula wrote:
> On Thu, 24 Sep 2026, Krzysztof Karas <krzysztof.karas@intel.com> wrote:
> > Add i915_* family of printer macros, following existing example
> > of gt_* and xe_* prints.
>
> Frankly, I don't want *any* of this.
>
> The drm_* macros are already a bunch of wrappers around dev_*
> macros. IMO this is just too much, just to avoid writing &i915->drm.
>
> (And yes, I dislike what's been done in xe too.)
Then, we'll have to live with two different print families and
that is the end of that. I'll revert this series to its former
version (and include other comments that still apply too).
In any case, thanks for your input.
>
>
> BR,
> Jani.
>
> >
> > Suggested-by: Andi Shyti <andi.shyti@kernel.org>
> > Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_printk.h | 53 ++++++++++++++++++++++++++++++
> > 1 file changed, 53 insertions(+)
> > create mode 100644 drivers/gpu/drm/i915/i915_printk.h
> >
> > diff --git a/drivers/gpu/drm/i915/i915_printk.h b/drivers/gpu/drm/i915/i915_printk.h
> > new file mode 100644
> > index 000000000000..5bbbe604cae8
> > --- /dev/null
> > +++ b/drivers/gpu/drm/i915/i915_printk.h
> > @@ -0,0 +1,53 @@
> > +/* SPDX-License-Identifier: MIT */
> > +/*
> > + * Copyright © 2026 Intel Corporation
> > + */
> > +
> > +#ifndef _I915_PRINTK_H_
> > +#define _I915_PRINTK_H_
> > +
> > +#include <drm/drm_print.h>
> > +
> > +#define i915_printk(_i915, _level, _fmt, ...) \
> > + drm_##_level(&(_i915)->drm, _fmt, ## __VA_ARGS__)
> > +
> > +#define i915_err(_i915, _fmt, ...) \
> > + i915_printk((_i915), err, _fmt, ##__VA_ARGS__)
> > +
> > +#define i915_err_once(_i915, _fmt, ...) \
> > + i915_printk((_i915), err_once, _fmt, ##__VA_ARGS__)
> > +
> > +#define i915_err_ratelimited(_i915, _fmt, ...) \
> > + i915_printk((_i915), err_ratelimited, _fmt, ##__VA_ARGS__)
> > +
> > +#define i915_warn(_i915, _fmt, ...) \
> > + i915_printk((_i915), warn, _fmt, ##__VA_ARGS__)
> > +
> > +#define i915_notice(_i915, _fmt, ...) \
> > + i915_printk((_i915), notice, _fmt, ##__VA_ARGS__)
> > +
> > +#define i915_info(_i915, _fmt, ...) \
> > + i915_printk((_i915), info, _fmt, ##__VA_ARGS__)
> > +
> > +#define i915_dbg(_i915, _fmt, ...) \
> > + i915_printk((_i915), dbg, _fmt, ##__VA_ARGS__)
> > +
> > +#define i915_dbg_ratelimited(_i915, _fmt, ...) \
> > + i915_printk((_i915), dbg_ratelimited, _fmt, ##__VA_ARGS__)
> > +
> > +#define i915_WARN_type(_i915, _type, _condition, _fmt, ...) \
> > + drm_WARN##_type(&(_i915)->drm, _condition, _fmt, ## __VA_ARGS__)
> > +
> > +#define i915_WARN(_i915, _condition, _fmt, ...) \
> > + i915_WARN_type((_i915), _condition, __I915_PRINTK_FMT((_i915), _fmt, ## __VA_ARGS__))
> > +
> > +#define i915_WARN_ONCE(_i915, _condition, _fmt, ...) \
> > + i915_WARN_type((_i915), _ONCE, _condition, __I915_PRINTK_FMT((_i915), _fmt, ## __VA_ARGS__))
> > +
> > +#define i915_WARN_ON(_i915, _condition) \
> > + i915_WARN((_i915), _condition, "%s(%s)", "WARN_ON", __stringify(_condition))
> > +
> > +#define i915_WARN_ON_ONCE(_i915, _condition) \
> > + i915_WARN_ONCE((_i915), _condition, "%s(%s)", "WARN_ON_ONCE", __stringify(_condition))
> > +
> > +#endif
>
> --
> Jani Nikula, Intel
--
Best Regards,
Krzysztof
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v4 3/7] drm/i915/selftests: Use gt_*/i915_* prints in selftest helpers
2026-09-24 12:01 [PATCH v4 0/7] drm/i915/selftests: Modernize printing in i915 selftests Krzysztof Karas
2026-09-24 12:01 ` [PATCH v4 1/7] drm/i915/selftests: Use gt_*/drm_* prints in core selftests Krzysztof Karas
2026-09-24 12:01 ` [PATCH v4 2/7] drm/i915: Add i915_* printer macros Krzysztof Karas
@ 2026-09-24 12:01 ` Krzysztof Karas
2026-09-24 12:01 ` [PATCH v4 4/7] drm/i915/gt/selftests: Use gt_* prints in aggregated gt selftests Krzysztof Karas
` (4 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Krzysztof Karas @ 2026-09-24 12:01 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec, Krzysztof Karas
Move away from generic pr prints to GT aware gt_* versions,
which tag each message with both the device and the tile it
came from.
igt_live_test.c and i915_active.c now use i915_* prints: both are
driven by a bare struct drm_i915_private and have no unambiguous
GT to attribute the message to.
For mocked device in mock_gem_device.c use dev_err() instead.
Assisted-by: GitHub-Copilot:claude-opus-5
Assisted-by: GitHub-Copilot:claude-sonnet-5
Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
---
v4:
- switch i915_active.c and igt_live_test.c to the new i915_*
prints instead of drm_* (Andi Shyti);
- fix include ordering (drm/gt print headers with the rest of
the local includes) (Krzysztof Niemiec, Jani Nikula);
drivers/gpu/drm/i915/selftests/i915_active.c | 13 ++++++++-----
drivers/gpu/drm/i915/selftests/igt_flush_test.c | 4 +++-
drivers/gpu/drm/i915/selftests/igt_live_test.c | 7 ++++---
drivers/gpu/drm/i915/selftests/igt_reset.c | 4 +++-
.../drm/i915/selftests/intel_scheduler_helpers.c | 7 +++++--
drivers/gpu/drm/i915/selftests/mock_gem_device.c | 4 +++-
6 files changed, 26 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_active.c b/drivers/gpu/drm/i915/selftests/i915_active.c
index 9fea2fabeac4..98f606877aa5 100644
--- a/drivers/gpu/drm/i915/selftests/i915_active.c
+++ b/drivers/gpu/drm/i915/selftests/i915_active.c
@@ -12,6 +12,7 @@
#include "gem/i915_gem_pm.h"
#include "gt/intel_gt.h"
+#include "i915_printk.h"
#include "i915_selftest.h"
#include "igt_flush_test.h"
@@ -115,7 +116,7 @@ __live_active_setup(struct drm_i915_private *i915)
err = i915_active_add_request(&active->base, rq);
i915_request_add(rq);
if (err) {
- pr_err("Failed to track active ref!\n");
+ i915_err(i915, "Failed to track active ref!\n");
break;
}
@@ -124,12 +125,13 @@ __live_active_setup(struct drm_i915_private *i915)
i915_active_release(&active->base);
if (READ_ONCE(active->retired) && count) {
- pr_err("i915_active retired before submission!\n");
+ i915_err(i915, "i915_active retired before submission!\n");
err = -EINVAL;
}
if (atomic_read(&active->base.count) != count) {
- pr_err("i915_active not tracking all requests, found %d, expected %d\n",
- atomic_read(&active->base.count), count);
+ i915_err(i915,
+ "i915_active not tracking all requests, found %d, expected %d\n",
+ atomic_read(&active->base.count), count);
err = -EINVAL;
}
@@ -236,7 +238,8 @@ static int live_active_barrier(void *arg)
__i915_active_wait(&active->base, TASK_UNINTERRUPTIBLE);
if (!READ_ONCE(active->retired)) {
- pr_err("i915_active not retired after flushing barriers!\n");
+ i915_err(i915,
+ "i915_active not retired after flushing barriers!\n");
err = -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/selftests/igt_flush_test.c b/drivers/gpu/drm/i915/selftests/igt_flush_test.c
index c383d31d46b0..c59425e7ccae 100644
--- a/drivers/gpu/drm/i915/selftests/igt_flush_test.c
+++ b/drivers/gpu/drm/i915/selftests/igt_flush_test.c
@@ -5,6 +5,7 @@
*/
#include "gt/intel_gt.h"
+#include "gt/intel_gt_print.h"
#include "gt/intel_gt_requests.h"
#include "i915_drv.h"
@@ -35,7 +36,8 @@ int igt_flush_test(struct drm_i915_private *i915)
/* 2x longest preempt timeout, experimentally determined */
if (intel_gt_wait_for_idle(gt, HZ * timeout_ms / 500) == -ETIME) {
- pr_err("%pS timed out, cancelling all further testing.\n",
+ gt_err(gt,
+ "%pS timed out, cancelling all further testing.\n",
__builtin_return_address(0));
GEM_TRACE("%pS timed out.\n",
diff --git a/drivers/gpu/drm/i915/selftests/igt_live_test.c b/drivers/gpu/drm/i915/selftests/igt_live_test.c
index 7d41874a49c5..80351f58b4d1 100644
--- a/drivers/gpu/drm/i915/selftests/igt_live_test.c
+++ b/drivers/gpu/drm/i915/selftests/igt_live_test.c
@@ -8,6 +8,7 @@
#include "gt/intel_gt.h"
#include "gt/intel_gt_print.h"
+#include "i915_printk.h"
#include "../i915_selftest.h"
#include "igt_flush_test.h"
#include "igt_live_test.h"
@@ -59,9 +60,9 @@ int igt_live_test_end(struct igt_live_test *t)
return -EIO;
if (t->reset_global != i915_reset_count(&i915->gpu_error)) {
- pr_err("%s(%s): GPU was reset %d times!\n",
- t->func, t->name,
- i915_reset_count(&i915->gpu_error) - t->reset_global);
+ i915_err(i915, "%s(%s): GPU was reset %d times!\n",
+ t->func, t->name,
+ i915_reset_count(&i915->gpu_error) - t->reset_global);
return -EIO;
}
diff --git a/drivers/gpu/drm/i915/selftests/igt_reset.c b/drivers/gpu/drm/i915/selftests/igt_reset.c
index a2838c65f8a5..6be63451317a 100644
--- a/drivers/gpu/drm/i915/selftests/igt_reset.c
+++ b/drivers/gpu/drm/i915/selftests/igt_reset.c
@@ -8,6 +8,7 @@
#include "gt/intel_engine.h"
#include "gt/intel_gt.h"
+#include "gt/intel_gt_print.h"
#include "../i915_drv.h"
@@ -16,7 +17,8 @@ void igt_global_reset_lock(struct intel_gt *gt)
struct intel_engine_cs *engine;
enum intel_engine_id id;
- pr_debug("%s: current gpu_error=%08lx\n", __func__, gt->reset.flags);
+ gt_dbg(gt, "%s: current gpu_error=%08lx\n", __func__,
+ gt->reset.flags);
while (test_and_set_bit(I915_RESET_BACKOFF, >->reset.flags))
wait_event(gt->reset.queue,
diff --git a/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c b/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
index e14ac0ab1314..2441887e3b28 100644
--- a/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
+++ b/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c
@@ -7,6 +7,7 @@
//#include "gt/intel_engine_user.h"
#include "gt/intel_gt.h"
+#include "gt/intel_gt_print.h"
#include "i915_drv.h"
#include "i915_selftest.h"
@@ -24,7 +25,7 @@ struct intel_engine_cs *intel_selftest_find_any_engine(struct intel_gt *gt)
for_each_engine(engine, gt, id)
return engine;
- pr_err("No valid engine found!\n");
+ gt_err(gt, "No valid engine found!\n");
return NULL;
}
@@ -60,7 +61,9 @@ int intel_selftest_modify_policy(struct intel_engine_cs *engine,
break;
default:
- pr_err("Invalid scheduler policy modification type: %d!\n", modify_type);
+ gt_err(engine->gt,
+ "Invalid scheduler policy modification type: %d!\n",
+ modify_type);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
index 796c9b070e41..c0dadcd961bb 100644
--- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
+++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
@@ -169,7 +169,9 @@ struct drm_i915_private *mock_gem_device(void)
i915 = devm_drm_dev_alloc(&pdev->dev, &mock_driver,
struct drm_i915_private, drm);
if (IS_ERR(i915)) {
- pr_err("Failed to allocate mock GEM device: err=%ld\n", PTR_ERR(i915));
+ dev_err(&pdev->dev,
+ "Failed to allocate mock GEM device: err=%ld\n",
+ PTR_ERR(i915));
devres_release_group(&pdev->dev, NULL);
put_device(&pdev->dev);
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v4 4/7] drm/i915/gt/selftests: Use gt_* prints in aggregated gt selftests
2026-09-24 12:01 [PATCH v4 0/7] drm/i915/selftests: Modernize printing in i915 selftests Krzysztof Karas
` (2 preceding siblings ...)
2026-09-24 12:01 ` [PATCH v4 3/7] drm/i915/selftests: Use gt_*/i915_* prints in selftest helpers Krzysztof Karas
@ 2026-09-24 12:01 ` Krzysztof Karas
2026-09-24 12:01 ` [PATCH v4 5/7] drm/i915/gt/selftests: Use gt_* prints in gt standalone tests Krzysztof Karas
` (3 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Krzysztof Karas @ 2026-09-24 12:01 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec, Krzysztof Karas
Move away from generic pr prints to GT aware gt_* versions,
which tag each message with device and the tile it came from.
Assisted-by: GitHub-Copilot:claude-opus-5
Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
---
v4:
- switch drm_* conversions to gt_*/gt_info() where a GT
reference is reachable (Andi Shyti);
- keep the __func__ reference in the reformatted spinner_kill()
message (Andi Shyti);
- fix include ordering nits (Krzysztof Niemiec, Jani Nikula);
drivers/gpu/drm/i915/gt/selftest_context.c | 20 +-
drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 5 +-
drivers/gpu/drm/i915/gt/selftest_engine_pm.c | 31 ++-
drivers/gpu/drm/i915/gt/selftest_execlists.c | 243 +++++++++++-------
drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 21 +-
drivers/gpu/drm/i915/gt/selftest_migrate.c | 47 ++--
drivers/gpu/drm/i915/gt/selftest_mocs.c | 7 +-
drivers/gpu/drm/i915/gt/selftest_reset.c | 20 +-
drivers/gpu/drm/i915/gt/selftest_slpc.c | 79 ++++--
drivers/gpu/drm/i915/gt/selftest_tlb.c | 24 +-
.../gpu/drm/i915/gt/selftest_workarounds.c | 70 +++--
11 files changed, 371 insertions(+), 196 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_context.c
index ab76703f6e8b..4b40b6679edf 100644
--- a/drivers/gpu/drm/i915/gt/selftest_context.c
+++ b/drivers/gpu/drm/i915/gt/selftest_context.c
@@ -9,6 +9,7 @@
#include "intel_engine_heartbeat.h"
#include "intel_engine_pm.h"
#include "intel_gt.h"
+#include "intel_gt_print.h"
#include "gem/selftests/mock_context.h"
#include "selftests/igt_flush_test.h"
@@ -136,7 +137,9 @@ static int __live_context_size(struct intel_engine_cs *engine)
goto err_unpin;
if (memchr_inv(vaddr, POISON_INUSE, I915_GTT_PAGE_SIZE)) {
- pr_err("%s context overwrote trailing red-zone!", engine->name);
+ gt_err(engine->gt,
+ "%s context overwrote trailing red-zone!",
+ engine->name);
err = -EINVAL;
}
@@ -221,7 +224,7 @@ static int __live_active_context(struct intel_engine_cs *engine)
return 0;
if (intel_engine_pm_is_awake(engine)) {
- pr_err("%s is awake before starting %s!\n",
+ gt_err(engine->gt, "%s is awake before starting %s!\n",
engine->name, __func__);
return -EINVAL;
}
@@ -250,14 +253,16 @@ static int __live_active_context(struct intel_engine_cs *engine)
/* Context will be kept active until after an idle-barrier. */
if (i915_active_is_idle(&ce->active)) {
- pr_err("context is not active; expected idle-barrier (%s pass %d)\n",
+ gt_err(engine->gt,
+ "context is not active; expected idle-barrier (%s pass %d)\n",
engine->name, pass);
err = -EINVAL;
goto out_engine;
}
if (!intel_engine_pm_is_awake(engine)) {
- pr_err("%s is asleep before idle-barrier\n",
+ gt_err(engine->gt,
+ "%s is asleep before idle-barrier\n",
engine->name);
err = -EINVAL;
goto out_engine;
@@ -280,7 +285,7 @@ static int __live_active_context(struct intel_engine_cs *engine)
goto err;
if (!i915_active_is_idle(&ce->active)) {
- pr_err("context is still active!");
+ gt_err(engine->gt, "context is still active!");
err = -EINVAL;
}
@@ -374,7 +379,7 @@ static int __live_remote_context(struct intel_engine_cs *engine)
return 0;
if (intel_engine_pm_is_awake(engine)) {
- pr_err("%s is awake before starting %s!\n",
+ gt_err(engine->gt, "%s is awake before starting %s!\n",
engine->name, __func__);
return -EINVAL;
}
@@ -403,7 +408,8 @@ static int __live_remote_context(struct intel_engine_cs *engine)
break;
if (i915_active_is_idle(&remote->active)) {
- pr_err("remote context is not active; expected idle-barrier (%s pass %d)\n",
+ gt_err(engine->gt,
+ "remote context is not active; expected idle-barrier (%s pass %d)\n",
engine->name, pass);
err = -EINVAL;
break;
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
index 5ffa5e30f419..5304331188a4 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
@@ -7,6 +7,7 @@
#include "intel_gpu_commands.h"
#include "intel_gt_pm.h"
+#include "intel_gt_print.h"
#include "intel_rps.h"
#include "i915_selftest.h"
@@ -207,7 +208,7 @@ static int perf_mi_bb_start(void *arg)
if (err)
break;
- pr_info("%s: MI_BB_START cycles: %u\n",
+ gt_info(gt, "%s: MI_BB_START cycles: %u\n",
engine->name, trifilter(cycles));
}
if (perf_end(gt, wakeref))
@@ -365,7 +366,7 @@ static int perf_mi_noop(void *arg)
if (err)
break;
- pr_info("%s: 16K MI_NOOP cycles: %u\n",
+ gt_info(gt, "%s: 16K MI_NOOP cycles: %u\n",
engine->name, trifilter(cycles));
}
if (perf_end(gt, wakeref))
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_pm.c b/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
index 10e556a7eac4..9f8dfc027b6b 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
@@ -128,8 +128,9 @@ static int __measure_timestamps(struct intel_context *ce,
}
i915_request_put(rq);
- pr_debug("%s CTX_TIMESTAMP: [%x, %x], RING_TIMESTAMP: [%x, %x]\n",
- engine->name, sema[1], sema[3], sema[0], sema[4]);
+ gt_dbg(engine->gt,
+ "%s CTX_TIMESTAMP: [%x, %x], RING_TIMESTAMP: [%x, %x]\n",
+ engine->name, sema[1], sema[3], sema[0], sema[4]);
*d_ctx = sema[3] - sema[1];
*d_ring = sema[4] - sema[0];
@@ -159,14 +160,16 @@ static int __live_engine_timestamps(struct intel_engine_cs *engine)
d_ring = trifilter(s_ring);
d_ctx = trifilter(s_ctx);
- pr_info("%s elapsed:%lldns, CTX_TIMESTAMP:%lldns, RING_TIMESTAMP:%lldns\n",
+ gt_info(engine->gt,
+ "%s elapsed:%lldns, CTX_TIMESTAMP:%lldns, RING_TIMESTAMP:%lldns\n",
engine->name, dt,
intel_gt_clock_interval_to_ns(engine->gt, d_ctx),
intel_gt_clock_interval_to_ns(engine->gt, d_ring));
d_ring = intel_gt_clock_interval_to_ns(engine->gt, d_ring);
if (3 * dt > 4 * d_ring || 4 * dt < 3 * d_ring) {
- pr_err("%s Mismatch between ring timestamp and walltime!\n",
+ gt_err(engine->gt,
+ "%s Mismatch between ring timestamp and walltime!\n",
engine->name);
return -EINVAL;
}
@@ -181,7 +184,8 @@ static int __live_engine_timestamps(struct intel_engine_cs *engine)
d_ring *= engine->gt->clock_frequency;
if (3 * d_ctx > 4 * d_ring || 4 * d_ctx < 3 * d_ring) {
- pr_err("%s Mismatch between ring and context timestamps!\n",
+ gt_err(engine->gt,
+ "%s Mismatch between ring and context timestamps!\n",
engine->name);
return -EINVAL;
}
@@ -232,7 +236,8 @@ static int __spin_until_busier(struct intel_engine_cs *engine, ktime_t busyness)
while (intel_engine_get_busy_time(engine, &unused) == busyness) {
dt = ktime_get() - start;
if (dt > 10000000) {
- pr_err("active wait timed out %lld\n", dt);
+ gt_err(engine->gt,
+ "active wait timed out %lld\n", dt);
ENGINE_TRACE(engine, "active wait time out %lld\n", dt);
return -ETIME;
}
@@ -284,7 +289,8 @@ static int live_engine_busy_stats(void *arg)
preempt_enable();
dt = ktime_sub(t[1], t[0]);
if (de < 0 || de > 10) {
- pr_err("%s: reported %lldns [%d%%] busyness while sleeping [for %lldns]\n",
+ gt_err(gt,
+ "%s: reported %lldns [%d%%] busyness while sleeping [for %lldns]\n",
engine->name,
de, (int)div64_u64(100 * de, dt), dt);
GEM_TRACE_DUMP();
@@ -323,7 +329,8 @@ static int live_engine_busy_stats(void *arg)
preempt_enable();
dt = ktime_sub(t[1], t[0]);
if (100 * de < 95 * dt || 95 * de > 100 * dt) {
- pr_err("%s: reported %lldns [%d%%] busyness while spinning [for %lldns]\n",
+ gt_err(gt,
+ "%s: reported %lldns [%d%%] busyness while spinning [for %lldns]\n",
engine->name,
de, (int)div64_u64(100 * de, dt), dt);
GEM_TRACE_DUMP();
@@ -358,7 +365,7 @@ static int live_engine_pm(void *arg)
* tell us.
*/
if (intel_gt_pm_wait_for_idle(gt)) {
- pr_err("Unable to flush GT pm before test\n");
+ gt_err(gt, "Unable to flush GT pm before test\n");
return -EBUSY;
}
@@ -386,7 +393,8 @@ static int live_engine_pm(void *arg)
p->critical_section_begin();
if (!intel_engine_pm_get_if_awake(engine))
- pr_err("intel_engine_pm_get_if_awake(%s) failed under %s\n",
+ gt_err(gt,
+ "intel_engine_pm_get_if_awake(%s) failed under %s\n",
engine->name, p->name);
else
intel_engine_pm_put_async(engine);
@@ -396,7 +404,8 @@ static int live_engine_pm(void *arg)
intel_engine_pm_flush(engine);
if (intel_engine_pm_is_awake(engine)) {
- pr_err("%s is still awake after flushing pm\n",
+ gt_err(gt,
+ "%s is still awake after flushing pm\n",
engine->name);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_execlists.c b/drivers/gpu/drm/i915/gt/selftest_execlists.c
index 21e5ed9f72a3..b2c67fdc4312 100644
--- a/drivers/gpu/drm/i915/gt/selftest_execlists.c
+++ b/drivers/gpu/drm/i915/gt/selftest_execlists.c
@@ -10,6 +10,7 @@
#include "gem/i915_gem_internal.h"
#include "gem/i915_gem_pm.h"
#include "gt/intel_engine_heartbeat.h"
+#include "gt/intel_gt_print.h"
#include "gt/intel_reset.h"
#include "gt/selftest_engine_heartbeat.h"
@@ -89,7 +90,8 @@ static int wait_for_reset(struct intel_engine_cs *engine,
} while (time_before(jiffies, timeout));
if (rq->fence.error != -EIO) {
- pr_err("%s: hanging request %llx:%lld not reset\n",
+ gt_err(engine->gt,
+ "%s: hanging request %llx:%lld not reset\n",
engine->name,
rq->fence.context,
rq->fence.seqno);
@@ -99,7 +101,8 @@ static int wait_for_reset(struct intel_engine_cs *engine,
/* Give the request a jiffy to complete after flushing the worker */
if (i915_request_wait(rq, 0,
max(0l, (long)(timeout - jiffies)) + 1) < 0) {
- pr_err("%s: hanging request %llx:%lld did not complete\n",
+ gt_err(engine->gt,
+ "%s: hanging request %llx:%lld did not complete\n",
engine->name,
rq->fence.context,
rq->fence.seqno);
@@ -419,12 +422,13 @@ static int live_unlite_ring(void *arg)
n++;
}
intel_engine_flush_submission(engine);
- pr_debug("%s: Filled ring with %d nop tails {size:%x, tail:%x, emit:%x, rq.tail:%x}\n",
- engine->name, n,
- ce[0]->ring->size,
- ce[0]->ring->tail,
- ce[0]->ring->emit,
- rq->tail);
+ gt_dbg(gt,
+ "%s: Filled ring with %d nop tails {size:%x, tail:%x, emit:%x, rq.tail:%x}\n",
+ engine->name, n,
+ ce[0]->ring->size,
+ ce[0]->ring->tail,
+ ce[0]->ring->emit,
+ rq->tail);
GEM_BUG_ON(intel_ring_direction(ce[0]->ring,
rq->tail,
ce[0]->ring->tail) <= 0);
@@ -444,15 +448,17 @@ static int live_unlite_ring(void *arg)
err = wait_for_submit(engine, rq, HZ / 2);
i915_request_put(rq);
if (err) {
- pr_err("%s: preemption request was not submitted\n",
+ gt_err(gt,
+ "%s: preemption request was not submitted\n",
engine->name);
err = -ETIME;
}
- pr_debug("%s: ring[0]:{ tail:%x, emit:%x }, ring[1]:{ tail:%x, emit:%x }\n",
- engine->name,
- ce[0]->ring->tail, ce[0]->ring->emit,
- ce[1]->ring->tail, ce[1]->ring->emit);
+ gt_dbg(gt,
+ "%s: ring[0]:{ tail:%x, emit:%x }, ring[1]:{ tail:%x, emit:%x }\n",
+ engine->name,
+ ce[0]->ring->tail, ce[0]->ring->emit,
+ ce[1]->ring->tail, ce[1]->ring->emit);
err_ce:
intel_engine_flush_submission(engine);
@@ -644,7 +650,8 @@ static int live_hold_reset(void *arg)
/* Check that we do not resubmit the held request */
if (!i915_request_wait(rq, 0, HZ / 5)) {
- pr_err("%s: on hold request completed!\n",
+ gt_err(gt,
+ "%s: on hold request completed!\n",
engine->name);
i915_request_put(rq);
err = -EIO;
@@ -655,7 +662,8 @@ static int live_hold_reset(void *arg)
/* But is resubmitted on release */
execlists_unhold(engine, rq);
if (i915_request_wait(rq, 0, HZ / 5) < 0) {
- pr_err("%s: held request did not complete!\n",
+ gt_err(gt,
+ "%s: held request did not complete!\n",
engine->name);
intel_gt_set_wedged(gt);
err = -ETIME;
@@ -764,7 +772,8 @@ static int live_error_interrupt(void *arg)
err = wait_for_submit(engine, client[0], HZ / 2);
if (err) {
- pr_err("%s: first request did not start within time!\n",
+ gt_err(gt,
+ "%s: first request did not start within time!\n",
engine->name);
err = -ETIME;
goto out;
@@ -772,12 +781,14 @@ static int live_error_interrupt(void *arg)
for (i = 0; i < ARRAY_SIZE(client); i++) {
if (i915_request_wait(client[i], 0, HZ / 5) < 0)
- pr_debug("%s: %s request incomplete!\n",
- engine->name,
- error_repr(p->error[i]));
+ gt_dbg(gt,
+ "%s: %s request incomplete!\n",
+ engine->name,
+ error_repr(p->error[i]));
if (!i915_request_started(client[i])) {
- pr_err("%s: %s request not started!\n",
+ gt_err(gt,
+ "%s: %s request not started!\n",
engine->name,
error_repr(p->error[i]));
err = -ETIME;
@@ -787,10 +798,13 @@ static int live_error_interrupt(void *arg)
/* Kick the tasklet to process the error */
intel_engine_flush_submission(engine);
if (client[i]->fence.error != p->error[i]) {
- pr_err("%s: %s request (%s) with wrong error code: %d\n",
+ gt_err(gt,
+ "%s: %s request (%s) with wrong error code: %d\n",
engine->name,
error_repr(p->error[i]),
- i915_request_completed(client[i]) ? "completed" : "running",
+ i915_request_completed(client[i]) ?
+ "completed" :
+ "running",
client[i]->fence.error);
err = -EINVAL;
goto out;
@@ -802,7 +816,8 @@ static int live_error_interrupt(void *arg)
if (client[i])
i915_request_put(client[i]);
if (err) {
- pr_err("%s: failed at phase[%zd] { %d, %d }\n",
+ gt_err(gt,
+ "%s: failed at phase[%zd] { %d, %d }\n",
engine->name, p - phases,
p->error[0], p->error[1]);
break;
@@ -964,7 +979,8 @@ slice_semaphore_queue(struct intel_engine_cs *outer,
if (i915_request_wait(head, 0,
2 * outer->gt->info.num_engines * (count + 2) * (count + 3)) < 0) {
- pr_err("%s: Failed to slice along semaphore chain of length (%d, %d)!\n",
+ gt_err(outer->gt,
+ "%s: Failed to slice along semaphore chain of length (%d, %d)!\n",
outer->name, count, n);
GEM_TRACE_DUMP();
intel_gt_set_wedged(outer->gt);
@@ -1174,7 +1190,8 @@ static int live_timeslice_rewind(void *arg)
err = wait_for_submit(engine, rq[A2], HZ / 2);
if (err) {
- pr_err("%s: failed to submit first context\n",
+ gt_err(gt,
+ "%s: failed to submit first context\n",
engine->name);
goto err;
}
@@ -1192,7 +1209,8 @@ static int live_timeslice_rewind(void *arg)
err = wait_for_submit(engine, rq[B1], HZ / 2);
if (err) {
- pr_err("%s: failed to submit second context\n",
+ gt_err(gt,
+ "%s: failed to submit second context\n",
engine->name);
goto err;
}
@@ -1222,18 +1240,21 @@ static int live_timeslice_rewind(void *arg)
;
if (!time_before(jiffies, timeout)) {
- pr_err("%s: rq[%d] timed out\n",
+ gt_err(gt,
+ "%s: rq[%d] timed out\n",
engine->name, i - 1);
err = -ETIME;
goto err;
}
- pr_debug("%s: slot[%d]:%x\n", engine->name, i, slot[i]);
+ gt_dbg(gt, "%s: slot[%d]:%x\n",
+ engine->name, i, slot[i]);
}
/* XZY: XZ < XY */
if (slot[Z] - slot[X] >= slot[Y] - slot[X]) {
- pr_err("%s: timeslicing did not run context B [%u] before A [%u]!\n",
+ gt_err(gt,
+ "%s: timeslicing did not run context B [%u] before A [%u]!\n",
engine->name,
slot[Z] - slot[X],
slot[Y] - slot[X]);
@@ -1347,7 +1368,8 @@ static int live_timeslice_queue(void *arg)
engine->sched_engine->schedule(rq, &attr);
err = wait_for_submit(engine, rq, HZ / 2);
if (err) {
- pr_err("%s: Timed out trying to submit semaphores\n",
+ gt_err(gt,
+ "%s: Timed out trying to submit semaphores\n",
engine->name);
goto err_rq;
}
@@ -1361,7 +1383,8 @@ static int live_timeslice_queue(void *arg)
err = wait_for_submit(engine, nop, HZ / 2);
i915_request_put(nop);
if (err) {
- pr_err("%s: Timed out trying to submit nop\n",
+ gt_err(gt,
+ "%s: Timed out trying to submit nop\n",
engine->name);
goto err_rq;
}
@@ -1385,7 +1408,8 @@ static int live_timeslice_queue(void *arg)
struct drm_printer p =
drm_info_printer(gt->i915->drm.dev);
- pr_err("%s: Failed to timeslice into queue\n",
+ gt_err(gt,
+ "%s: Failed to timeslice into queue\n",
engine->name);
intel_engine_dump(engine, &p,
"%s\n", engine->name);
@@ -1501,7 +1525,8 @@ static int live_timeslice_nopreempt(void *arg)
* enough to see if it is timesliced in by mistake.
*/
if (i915_request_wait(rq, 0, slice_timeout(engine)) >= 0) {
- pr_err("%s: I915_PRIORITY_BARRIER request completed, bypassing no-preempt request\n",
+ gt_err(engine->gt,
+ "%s: I915_PRIORITY_BARRIER request completed, bypassing no-preempt request\n",
engine->name);
err = -EINVAL;
}
@@ -1648,7 +1673,8 @@ static int live_busywait_preempt(void *arg)
/* Low priority request should be busywaiting now */
if (i915_request_wait(lo, 0, 1) != -ETIME) {
i915_request_put(lo);
- pr_err("%s: Busywaiting request did not!\n",
+ gt_err(gt,
+ "%s: Busywaiting request did not!\n",
engine->name);
err = -EIO;
goto err_vma;
@@ -1680,7 +1706,8 @@ static int live_busywait_preempt(void *arg)
if (i915_request_wait(lo, 0, HZ / 5) < 0) {
struct drm_printer p = drm_info_printer(gt->i915->drm.dev);
- pr_err("%s: Failed to preempt semaphore busywait!\n",
+ gt_err(gt,
+ "%s: Failed to preempt semaphore busywait!\n",
engine->name);
intel_engine_dump(engine, &p, "%s\n", engine->name);
@@ -1871,7 +1898,8 @@ static int live_late_preempt(void *arg)
i915_request_add(rq);
if (!igt_wait_for_spinner(&spin_lo, rq)) {
- pr_err("First context failed to start\n");
+ gt_err(gt,
+ "First context failed to start\n");
goto err_wedged;
}
@@ -1885,7 +1913,8 @@ static int live_late_preempt(void *arg)
i915_request_add(rq);
if (igt_wait_for_spinner(&spin_hi, rq)) {
- pr_err("Second context overtook first?\n");
+ gt_err(gt,
+ "Second context overtook first?\n");
goto err_wedged;
}
@@ -1893,7 +1922,8 @@ static int live_late_preempt(void *arg)
engine->sched_engine->schedule(rq, &attr);
if (!igt_wait_for_spinner(&spin_hi, rq)) {
- pr_err("High priority context failed to preempt the low priority context\n");
+ gt_err(gt,
+ "High priority context failed to preempt the low priority context\n");
GEM_TRACE_DUMP();
goto err_wedged;
}
@@ -1993,7 +2023,8 @@ static int live_nopreempt(void *arg)
i915_request_add(rq_a);
if (!igt_wait_for_spinner(&a.spin, rq_a)) {
- pr_err("First client failed to start\n");
+ gt_err(gt,
+ "First client failed to start\n");
goto err_wedged;
}
@@ -2012,21 +2043,24 @@ static int live_nopreempt(void *arg)
/* Wait long enough for preemption and timeslicing */
if (igt_wait_for_spinner(&b.spin, rq_b)) {
- pr_err("Second client started too early!\n");
+ gt_err(gt,
+ "Second client started too early!\n");
goto err_wedged;
}
igt_spinner_end(&a.spin);
if (!igt_wait_for_spinner(&b.spin, rq_b)) {
- pr_err("Second client failed to start\n");
+ gt_err(gt,
+ "Second client failed to start\n");
goto err_wedged;
}
igt_spinner_end(&b.spin);
if (engine->execlists.preempt_hang.count) {
- pr_err("Preemption recorded x%d; should have been suppressed!\n",
+ gt_err(gt,
+ "Preemption recorded x%d; should have been suppressed!\n",
engine->execlists.preempt_hang.count);
err = -EINVAL;
goto err_wedged;
@@ -2058,6 +2092,7 @@ struct live_preempt_cancel {
static int __cancel_active0(struct live_preempt_cancel *arg)
{
+ struct intel_gt *gt = arg->engine->gt;
struct i915_request *rq;
struct igt_live_test t;
int err;
@@ -2089,7 +2124,8 @@ static int __cancel_active0(struct live_preempt_cancel *arg)
err = wait_for_reset(arg->engine, rq, HZ / 2);
if (err) {
- pr_err("Cancelled inflight0 request did not reset\n");
+ gt_err(gt,
+ "Cancelled inflight0 request did not reset\n");
goto out;
}
@@ -2102,6 +2138,7 @@ static int __cancel_active0(struct live_preempt_cancel *arg)
static int __cancel_active1(struct live_preempt_cancel *arg)
{
+ struct intel_gt *gt = arg->engine->gt;
struct i915_request *rq[2] = {};
struct igt_live_test t;
int err;
@@ -2152,13 +2189,15 @@ static int __cancel_active1(struct live_preempt_cancel *arg)
goto out;
if (rq[0]->fence.error != 0) {
- pr_err("Normal inflight0 request did not complete\n");
+ gt_err(gt,
+ "Normal inflight0 request did not complete\n");
err = -EINVAL;
goto out;
}
if (rq[1]->fence.error != -EIO) {
- pr_err("Cancelled inflight1 request did not report -EIO\n");
+ gt_err(gt,
+ "Cancelled inflight1 request did not report -EIO\n");
err = -EINVAL;
goto out;
}
@@ -2173,6 +2212,7 @@ static int __cancel_active1(struct live_preempt_cancel *arg)
static int __cancel_queued(struct live_preempt_cancel *arg)
{
+ struct intel_gt *gt = arg->engine->gt;
struct i915_request *rq[3] = {};
struct igt_live_test t;
int err;
@@ -2234,7 +2274,8 @@ static int __cancel_queued(struct live_preempt_cancel *arg)
goto out;
if (rq[0]->fence.error != -EIO) {
- pr_err("Cancelled inflight0 request did not report -EIO\n");
+ gt_err(gt,
+ "Cancelled inflight0 request did not report -EIO\n");
err = -EINVAL;
goto out;
}
@@ -2246,13 +2287,15 @@ static int __cancel_queued(struct live_preempt_cancel *arg)
*/
if (intel_engine_has_semaphores(rq[1]->engine) &&
rq[1]->fence.error != 0) {
- pr_err("Normal inflight1 request did not complete\n");
+ gt_err(gt,
+ "Normal inflight1 request did not complete\n");
err = -EINVAL;
goto out;
}
if (rq[2]->fence.error != -EIO) {
- pr_err("Cancelled queued request did not report -EIO\n");
+ gt_err(gt,
+ "Cancelled queued request did not report -EIO\n");
err = -EINVAL;
goto out;
}
@@ -2268,6 +2311,7 @@ static int __cancel_queued(struct live_preempt_cancel *arg)
static int __cancel_hostile(struct live_preempt_cancel *arg)
{
+ struct intel_gt *gt = arg->engine->gt;
struct i915_request *rq;
int err;
@@ -2300,7 +2344,8 @@ static int __cancel_hostile(struct live_preempt_cancel *arg)
err = wait_for_reset(arg->engine, rq, HZ / 2);
if (err) {
- pr_err("Cancelled inflight0 request did not reset\n");
+ gt_err(gt,
+ "Cancelled inflight0 request did not reset\n");
goto out;
}
@@ -2371,7 +2416,8 @@ static int __cancel_fail(struct live_preempt_cancel *arg)
intel_engine_set_heartbeat(engine,
engine->defaults.heartbeat_interval_ms);
if (err) {
- pr_err("Cancelled inflight0 request did not reset\n");
+ gt_err(engine->gt,
+ "Cancelled inflight0 request did not reset\n");
goto out;
}
@@ -2490,7 +2536,8 @@ static int live_suppress_self_preempt(void *arg)
i915_request_add(rq_a);
if (!igt_wait_for_spinner(&a.spin, rq_a)) {
- pr_err("First client failed to start\n");
+ gt_err(gt,
+ "First client failed to start\n");
st_engine_heartbeat_enable(engine);
goto err_wedged;
}
@@ -2513,7 +2560,8 @@ static int live_suppress_self_preempt(void *arg)
igt_spinner_end(&a.spin);
if (!igt_wait_for_spinner(&b.spin, rq_b)) {
- pr_err("Second client failed to start\n");
+ gt_err(gt,
+ "Second client failed to start\n");
st_engine_heartbeat_enable(engine);
goto err_wedged;
}
@@ -2524,7 +2572,8 @@ static int live_suppress_self_preempt(void *arg)
igt_spinner_end(&a.spin);
if (engine->execlists.preempt_hang.count) {
- pr_err("Preemption on %s recorded x%d, depth %d; should have been suppressed!\n",
+ gt_err(gt,
+ "Preemption on %s recorded x%d, depth %d; should have been suppressed!\n",
engine->name,
engine->execlists.preempt_hang.count,
depth);
@@ -2595,12 +2644,15 @@ static int live_chain_preempt(void *arg)
if (ring_size < 0)
ring_size += rq->ring->size;
ring_size = rq->ring->size / ring_size;
- pr_debug("%s(%s): Using maximum of %d requests\n",
- __func__, engine->name, ring_size);
+ gt_dbg(gt,
+ "%s(%s): Using maximum of %d requests\n",
+ __func__, engine->name, ring_size);
igt_spinner_end(&lo.spin);
if (i915_request_wait(rq, 0, HZ / 2) < 0) {
- pr_err("Timed out waiting to flush %s\n", engine->name);
+ gt_err(gt,
+ "Timed out waiting to flush %s\n",
+ engine->name);
i915_request_put(rq);
goto err_wedged;
}
@@ -2648,7 +2700,8 @@ static int live_chain_preempt(void *arg)
struct drm_printer p =
drm_info_printer(gt->i915->drm.dev);
- pr_err("Failed to preempt over chain of %d\n",
+ gt_err(gt,
+ "Failed to preempt over chain of %d\n",
count);
intel_engine_dump(engine, &p,
"%s\n", engine->name);
@@ -2669,7 +2722,8 @@ static int live_chain_preempt(void *arg)
struct drm_printer p =
drm_info_printer(gt->i915->drm.dev);
- pr_err("Failed to flush low priority chain of %d requests\n",
+ gt_err(gt,
+ "Failed to flush low priority chain of %d requests\n",
count);
intel_engine_dump(engine, &p,
"%s\n", engine->name);
@@ -2867,12 +2921,13 @@ static int __live_preempt_ring(struct intel_engine_cs *engine,
n++;
}
intel_engine_flush_submission(engine);
- pr_debug("%s: Filled %d with %d nop tails {size:%x, tail:%x, emit:%x, rq.tail:%x}\n",
- engine->name, queue_sz, n,
- ce[0]->ring->size,
- ce[0]->ring->tail,
- ce[0]->ring->emit,
- rq->tail);
+ gt_dbg(engine->gt,
+ "%s: Filled %d with %d nop tails {size:%x, tail:%x, emit:%x, rq.tail:%x}\n",
+ engine->name, queue_sz, n,
+ ce[0]->ring->size,
+ ce[0]->ring->tail,
+ ce[0]->ring->emit,
+ rq->tail);
i915_request_put(rq);
/* Create a second request to preempt the first ring */
@@ -2889,15 +2944,17 @@ static int __live_preempt_ring(struct intel_engine_cs *engine,
err = wait_for_submit(engine, rq, HZ / 2);
i915_request_put(rq);
if (err) {
- pr_err("%s: preemption request was not submitted\n",
+ gt_err(engine->gt,
+ "%s: preemption request was not submitted\n",
engine->name);
err = -ETIME;
}
- pr_debug("%s: ring[0]:{ tail:%x, emit:%x }, ring[1]:{ tail:%x, emit:%x }\n",
- engine->name,
- ce[0]->ring->tail, ce[0]->ring->emit,
- ce[1]->ring->tail, ce[1]->ring->emit);
+ gt_dbg(engine->gt,
+ "%s: ring[0]:{ tail:%x, emit:%x }, ring[1]:{ tail:%x, emit:%x }\n",
+ engine->name,
+ ce[0]->ring->tail, ce[0]->ring->emit,
+ ce[1]->ring->tail, ce[1]->ring->emit);
err_ce:
intel_engine_flush_submission(engine);
@@ -2999,8 +3056,9 @@ static int live_preempt_gang(void *arg)
engine->sched_engine->schedule(rq, &attr);
} while (prio <= I915_PRIORITY_MAX &&
!__igt_timeout(end_time, NULL));
- pr_debug("%s: Preempt chain of %d requests\n",
- engine->name, prio);
+ gt_dbg(gt,
+ "%s: Preempt chain of %d requests\n", engine->name,
+ prio);
/*
* Such that the last spinner is the highest priority and
@@ -3024,7 +3082,8 @@ static int live_preempt_gang(void *arg)
struct drm_printer p =
drm_info_printer(engine->i915->drm.dev);
- pr_err("Failed to flush chain of %d requests, at %d\n",
+ gt_err(gt,
+ "Failed to flush chain of %d requests, at %d\n",
prio, rq_prio(rq));
intel_engine_dump(engine, &p,
"%s\n", engine->name);
@@ -3319,7 +3378,8 @@ static int live_preempt_user(void *arg)
}
if (READ_ONCE(result[0]) != NUM_GPR) {
- pr_err("%s: Failed to release semaphore\n",
+ gt_err(gt,
+ "%s: Failed to release semaphore\n",
engine->name);
err = -EIO;
goto end_test;
@@ -3335,9 +3395,10 @@ static int live_preempt_user(void *arg)
for (gpr = 1; gpr < NUM_GPR; gpr++) {
if (result[NUM_GPR * i + gpr] != 1) {
- pr_err("%s: Invalid result, client %d, gpr %d, result: %d\n",
- engine->name,
- i, gpr, result[NUM_GPR * i + gpr]);
+ gt_err(gt,
+ "%s: Invalid result, client %d, gpr %d, result: %d\n",
+ engine->name, i, gpr,
+ result[NUM_GPR * i + gpr]);
err = -EINVAL;
goto end_test;
}
@@ -3601,7 +3662,8 @@ static int smoke_crescendo(struct preempt_smoke *smoke, unsigned int flags)
kthread_destroy_worker(worker[id]);
}
- pr_info("Submitted %lu crescendo:%x requests across %d engines and %d contexts\n",
+ gt_info(smoke->gt,
+ "Submitted %lu crescendo:%x requests across %d engines and %d contexts\n",
count, flags, smoke->gt->info.num_engines, smoke->ncontext);
kfree(arg);
@@ -3630,7 +3692,8 @@ static int smoke_random(struct preempt_smoke *smoke, unsigned int flags)
}
} while (count < smoke->ncontext && !__igt_timeout(end_time, NULL));
- pr_info("Submitted %lu random:%x requests across %d engines and %d contexts\n",
+ gt_info(smoke->gt,
+ "Submitted %lu random:%x requests across %d engines and %d contexts\n",
count, flags, smoke->gt->info.num_engines, smoke->ncontext);
return 0;
}
@@ -3787,7 +3850,8 @@ static int nop_virtual_engine(struct intel_gt *gt,
for (nc = 0; nc < nctx; nc++) {
if (i915_request_wait(request[nc], 0, HZ / 10) < 0) {
- pr_err("%s(%s): wait for %llx:%lld timed out\n",
+ gt_err(gt,
+ "%s(%s): wait for %llx:%lld timed out\n",
__func__, ve[0]->engine->name,
request[nc]->fence.context,
request[nc]->fence.seqno);
@@ -3819,7 +3883,8 @@ static int nop_virtual_engine(struct intel_gt *gt,
if (err)
goto out;
- pr_info("Requestx%d latencies on %s: 1 = %lluns, %lu = %lluns\n",
+ gt_info(gt,
+ "Requestx%d latencies on %s: 1 = %lluns, %lu = %lluns\n",
nctx, ve[0]->engine->name, ktime_to_ns(times[0]),
prime, div64_u64(ktime_to_ns(times[1]), prime));
@@ -3880,7 +3945,8 @@ static int live_virtual_engine(void *arg)
for_each_engine(engine, gt, id) {
err = nop_virtual_engine(gt, &engine, 1, 1, 0);
if (err) {
- pr_err("Failed to wrap engine %s: err=%d\n",
+ gt_err(engine->gt,
+ "Failed to wrap engine %s: err=%d\n",
engine->name, err);
return err;
}
@@ -3954,7 +4020,8 @@ static int mask_virtual_engine(struct intel_gt *gt,
for (n = 0; n < nsibling; n++) {
if (i915_request_wait(request[n], 0, HZ / 10) < 0) {
- pr_err("%s(%s): wait for %llx:%lld timed out\n",
+ gt_err(gt,
+ "%s(%s): wait for %llx:%lld timed out\n",
__func__, ve->engine->name,
request[n]->fence.context,
request[n]->fence.seqno);
@@ -3970,7 +4037,8 @@ static int mask_virtual_engine(struct intel_gt *gt,
}
if (request[n]->engine != siblings[nsibling - n - 1]) {
- pr_err("Executed on wrong sibling '%s', expected '%s'\n",
+ gt_err(gt,
+ "Executed on wrong sibling '%s', expected '%s'\n",
request[n]->engine->name,
siblings[nsibling - n - 1]->name);
err = -EINVAL;
@@ -4272,7 +4340,8 @@ static int preserved_virtual_engine(struct intel_gt *gt,
for (n = 0; n < NUM_GPR_DW; n++) {
if (cs[n] != n) {
- pr_err("Incorrect value[%d] found for GPR[%d]\n",
+ gt_err(gt,
+ "Incorrect value[%d] found for GPR[%d]\n",
cs[n], n);
err = -EINVAL;
break;
@@ -4400,7 +4469,7 @@ static int reset_virtual_engine(struct intel_gt *gt,
/* Check that we do not resubmit the held request */
i915_request_get(rq);
if (!i915_request_wait(rq, 0, HZ / 5)) {
- pr_err("%s: on hold request completed!\n",
+ gt_err(gt, "%s: on hold request completed!\n",
engine->name);
intel_gt_set_wedged(gt);
err = -EIO;
@@ -4411,8 +4480,8 @@ static int reset_virtual_engine(struct intel_gt *gt,
/* But is resubmitted on release */
execlists_unhold(engine, rq);
if (i915_request_wait(rq, 0, HZ / 5) < 0) {
- pr_err("%s: held request did not complete!\n",
- engine->name);
+ gt_err(gt,
+ "%s: held request did not complete!\n", engine->name);
intel_gt_set_wedged(gt);
err = -ETIME;
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c
index 07eaf71955c4..cb1ce386e09f 100644
--- a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c
@@ -7,6 +7,7 @@
#include "intel_engine_regs.h"
#include "intel_gt_clock_utils.h"
+#include "intel_gt_print.h"
#include "selftest_llc.h"
#include "selftest_rc6.h"
@@ -85,7 +86,7 @@ static int live_gt_clocks(void *arg)
int err = 0;
if (!gt->clock_frequency) { /* unknown */
- pr_info("CS_TIMESTAMP frequency unknown\n");
+ gt_info(gt, "CS_TIMESTAMP frequency unknown\n");
return 0;
}
@@ -109,19 +110,22 @@ static int live_gt_clocks(void *arg)
time = intel_gt_clock_interval_to_ns(engine->gt, cycles);
expected = intel_gt_ns_to_clock_interval(engine->gt, dt);
- pr_info("%s: TIMESTAMP %d cycles [%lldns] in %lldns [%d cycles], using CS clock frequency of %uKHz\n",
+ gt_info(gt,
+ "%s: TIMESTAMP %d cycles [%lldns] in %lldns [%d cycles], using CS clock frequency of %uKHz\n",
engine->name, cycles, time, dt, expected,
engine->gt->clock_frequency / 1000);
if (9 * time < 8 * dt || 8 * time > 9 * dt) {
- pr_err("%s: CS ticks did not match walltime!\n",
+ gt_err(gt,
+ "%s: CS ticks did not match walltime!\n",
engine->name);
err = -EINVAL;
break;
}
if (9 * expected < 8 * cycles || 8 * expected > 9 * cycles) {
- pr_err("%s: walltime did not match CS ticks!\n",
+ gt_err(gt,
+ "%s: walltime did not match CS ticks!\n",
engine->name);
err = -EINVAL;
break;
@@ -146,7 +150,8 @@ static int live_gt_resume(void *arg)
intel_gt_suspend_late(gt);
if (gt->rc6.enabled) {
- pr_err("rc6 still enabled after suspend!\n");
+ gt_err(gt,
+ "rc6 still enabled after suspend!\n");
intel_gt_set_wedged_on_init(gt);
err = -EINVAL;
break;
@@ -157,7 +162,8 @@ static int live_gt_resume(void *arg)
break;
if (gt->rc6.supported && !gt->rc6.enabled) {
- pr_err("rc6 not enabled upon resume!\n");
+ gt_err(gt,
+ "rc6 not enabled upon resume!\n");
intel_gt_set_wedged_on_init(gt);
err = -EINVAL;
break;
@@ -165,7 +171,8 @@ static int live_gt_resume(void *arg)
err = st_llc_verify(>->llc);
if (err) {
- pr_err("llc state not restored upon resume!\n");
+ gt_err(gt,
+ "llc state not restored upon resume!\n");
intel_gt_set_wedged_on_init(gt);
break;
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_migrate.c b/drivers/gpu/drm/i915/gt/selftest_migrate.c
index 5b986a7687d9..44cb2b4fb3c1 100644
--- a/drivers/gpu/drm/i915/gt/selftest_migrate.c
+++ b/drivers/gpu/drm/i915/gt/selftest_migrate.c
@@ -11,6 +11,8 @@
#include "selftests/igt_spinner.h"
#include "selftests/i915_random.h"
+#include "intel_gt_print.h"
+
static const unsigned int sizes[] = {
SZ_4K,
SZ_64K,
@@ -42,6 +44,7 @@ static int copy(struct intel_migrate *migrate,
u32 sz, struct rnd_state *prng)
{
struct drm_i915_private *i915 = migrate->context->engine->i915;
+ struct intel_gt *gt = migrate->context->engine->gt;
struct drm_i915_gem_object *src, *dst;
struct i915_request *rq;
struct i915_gem_ww_ctx ww;
@@ -92,7 +95,7 @@ static int copy(struct intel_migrate *migrate,
continue;
if (err != -EDEADLK && err != -EINTR && err != -ERESTARTSYS)
- pr_err("%ps failed, size: %u\n", fn, sz);
+ gt_err(gt, "%ps failed, size: %u\n", fn, sz);
if (rq) {
i915_request_wait(rq, 0, HZ);
i915_request_put(rq);
@@ -106,7 +109,8 @@ static int copy(struct intel_migrate *migrate,
if (rq) {
if (i915_request_wait(rq, 0, HZ) < 0) {
- pr_err("%ps timed out, size: %u\n", fn, sz);
+ gt_err(gt, "%ps timed out, size: %u\n", fn,
+ sz);
err = -ETIME;
}
i915_request_put(rq);
@@ -116,7 +120,8 @@ static int copy(struct intel_migrate *migrate,
int x = i * 1024 + i915_prandom_u32_max_state(1024, prng);
if (vaddr[x] != x) {
- pr_err("%ps failed, size: %u, offset: %zu\n",
+ gt_err(gt,
+ "%ps failed, size: %u, offset: %zu\n",
fn, sz, x * sizeof(u32));
igt_hexdump(vaddr + i * 1024, 4096);
err = -EINVAL;
@@ -261,6 +266,7 @@ static int clear(struct intel_migrate *migrate,
u32 sz, struct rnd_state *prng)
{
struct drm_i915_private *i915 = migrate->context->engine->i915;
+ struct intel_gt *gt = migrate->context->engine->gt;
struct drm_i915_gem_object *obj;
struct i915_request *rq = NULL;
struct i915_gem_ww_ctx ww;
@@ -304,7 +310,8 @@ static int clear(struct intel_migrate *migrate,
true, &rq);
if (rq && !err) {
if (i915_request_wait(rq, 0, HZ) < 0) {
- pr_err("%ps timed out, size: %u\n",
+ gt_err(gt,
+ "%ps timed out, size: %u\n",
fn, sz);
err = -ETIME;
}
@@ -318,7 +325,8 @@ static int clear(struct intel_migrate *migrate,
err = fn(migrate, &ww, obj, val, &rq);
if (rq && !err) {
if (i915_request_wait(rq, 0, HZ) < 0) {
- pr_err("%ps timed out, size: %u\n", fn, sz);
+ gt_err(gt, "%ps timed out, size: %u\n",
+ fn, sz);
err = -ETIME;
}
i915_request_put(rq);
@@ -335,7 +343,8 @@ static int clear(struct intel_migrate *migrate,
i915_prandom_u32_max_state(1024, prng);
if (vaddr[x] != val) {
- pr_err("%ps failed, (%u != %u), offset: %zu\n",
+ gt_err(gt,
+ "%ps failed, (%u != %u), offset: %zu\n",
fn, vaddr[x], val, x * sizeof(u32));
igt_hexdump(vaddr + i * 1024, 4096);
err = -EINVAL;
@@ -355,7 +364,8 @@ static int clear(struct intel_migrate *migrate,
false, &rq);
if (rq && !err) {
if (i915_request_wait(rq, 0, HZ) < 0) {
- pr_err("%ps timed out, size: %u\n",
+ gt_err(gt,
+ "%ps timed out, size: %u\n",
fn, sz);
err = -ETIME;
}
@@ -377,8 +387,11 @@ static int clear(struct intel_migrate *migrate,
ccs_bytes_left), prng);
if (vaddr[offset + x]) {
- pr_err("%ps ccs clearing failed, offset: %ld/%d\n",
- fn, i * PAGE_SIZE + x * sizeof(u32), ccs_bytes);
+ gt_err(gt,
+ "%ps ccs clearing failed, offset: %ld/%d\n",
+ fn,
+ i * PAGE_SIZE + x * sizeof(u32),
+ ccs_bytes);
igt_hexdump(vaddr + offset,
min_t(int, 4096,
ccs_bytes_left * sizeof(u32)));
@@ -394,7 +407,7 @@ static int clear(struct intel_migrate *migrate,
if (err) {
if (err != -EDEADLK && err != -EINTR && err != -ERESTARTSYS)
- pr_err("%ps failed, size: %u\n", fn, sz);
+ gt_err(gt, "%ps failed, size: %u\n", fn, sz);
if (rq && err != -EINVAL) {
i915_request_wait(rq, 0, HZ);
i915_request_put(rq);
@@ -540,7 +553,7 @@ static void spinner_kill(struct timer_list *timer)
struct spinner_timer *st = timer_container_of(st, timer, timer);
igt_spinner_end(&st->spin);
- pr_info("%s\n", __func__);
+ gt_info(st->spin.gt, "%s: killing spinner\n", __func__);
}
static int live_emit_pte_full_ring(void *arg)
@@ -633,7 +646,8 @@ static int live_emit_pte_full_ring(void *arg)
cs += sz;
intel_ring_advance(rq, cs);
- pr_info("%s emit=%u sz=%d\n", __func__, rq->ring->emit, sz);
+ gt_info(gt, "%s emit=%u sz=%d\n", __func__,
+ rq->ring->emit, sz);
prev = rq;
} while (rq->ring->space > (rq->reserved_space +
@@ -646,7 +660,8 @@ static int live_emit_pte_full_ring(void *arg)
* This should wait for the spinner to be killed, otherwise we should go
* down in flames when doing i915_request_add().
*/
- pr_info("%s emite_pte ring space=%u\n", __func__, rq->ring->space);
+ gt_info(gt, "%s emite_pte ring space=%u\n", __func__,
+ rq->ring->space);
it = sg_sgt(obj->mm.pages->sgl);
len = emit_pte(rq, &it, obj->pat_index, false, 0, CHUNK_SZ);
if (!len) {
@@ -853,6 +868,7 @@ static int __perf_clear_blt(struct intel_context *ce,
bool is_lmem,
size_t sz)
{
+ struct intel_gt *gt = ce->engine->gt;
ktime_t t[5];
int pass;
int err = 0;
@@ -880,7 +896,7 @@ static int __perf_clear_blt(struct intel_context *ce,
return err;
sort(t, ARRAY_SIZE(t), sizeof(*t), wrap_ktime_compare, NULL);
- pr_info("%s: %zd KiB fill: %lld MiB/s\n",
+ gt_info(gt, "%s: %zd KiB fill: %lld MiB/s\n",
ce->engine->name, sz >> 10,
div64_u64(mul_u32_u32(4 * sz,
1000 * 1000 * 1000),
@@ -932,6 +948,7 @@ static int __perf_copy_blt(struct intel_context *ce,
bool dst_is_lmem,
size_t sz)
{
+ struct intel_gt *gt = ce->engine->gt;
ktime_t t[5];
int pass;
int err = 0;
@@ -963,7 +980,7 @@ static int __perf_copy_blt(struct intel_context *ce,
return err;
sort(t, ARRAY_SIZE(t), sizeof(*t), wrap_ktime_compare, NULL);
- pr_info("%s: %zd KiB copy: %lld MiB/s\n",
+ gt_info(gt, "%s: %zd KiB copy: %lld MiB/s\n",
ce->engine->name, sz >> 10,
div64_u64(mul_u32_u32(4 * sz,
1000 * 1000 * 1000),
diff --git a/drivers/gpu/drm/i915/gt/selftest_mocs.c b/drivers/gpu/drm/i915/gt/selftest_mocs.c
index d73e438fb85f..97a6bcdf273d 100644
--- a/drivers/gpu/drm/i915/gt/selftest_mocs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_mocs.c
@@ -5,6 +5,7 @@
#include "gt/intel_engine_pm.h"
#include "gt/intel_gpu_commands.h"
+#include "gt/intel_gt_print.h"
#include "i915_selftest.h"
#include "gem/selftests/igt_gem_utils.h"
@@ -169,7 +170,8 @@ static int check_mocs_table(struct intel_engine_cs *engine,
for_each_mocs(expect, table, i) {
if (**vaddr != expect) {
- pr_err("%s: Invalid MOCS[%d] entry, found %08x, expected %08x\n",
+ gt_err(engine->gt,
+ "%s: Invalid MOCS[%d] entry, found %08x, expected %08x\n",
engine->name, i, **vaddr, expect);
return -EINVAL;
}
@@ -203,7 +205,8 @@ static int check_l3cc_table(struct intel_engine_cs *engine,
for_each_l3cc(expect, table, i) {
if (!mcr_range(engine->i915, reg) && **vaddr != expect) {
- pr_err("%s: Invalid L3CC[%d] entry, found %08x, expected %08x\n",
+ gt_err(engine->gt,
+ "%s: Invalid L3CC[%d] entry, found %08x, expected %08x\n",
engine->name, i, **vaddr, expect);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c
index 2cfc23c58e90..bf8b316f0b92 100644
--- a/drivers/gpu/drm/i915/gt/selftest_reset.c
+++ b/drivers/gpu/drm/i915/gt/selftest_reset.c
@@ -10,6 +10,7 @@
#include "i915_memcpy.h"
#include "i915_selftest.h"
#include "intel_gpu_commands.h"
+#include "intel_gt_print.h"
#include "selftests/igt_reset.h"
#include "selftests/igt_atomic.h"
#include "selftests/igt_spinner.h"
@@ -147,8 +148,9 @@ __igt_reset_stolen(struct intel_gt *gt,
!__drm_mm_interval_first(>->i915->mm.stolen,
page << PAGE_SHIFT,
((page + 1) << PAGE_SHIFT) - 1)) {
- pr_debug("unused stolen page %pa modified by GPU reset\n",
- &page);
+ gt_dbg(gt,
+ "unused stolen page %pa modified by GPU reset\n",
+ &page);
if (count++ == 0)
igt_hexdump(in, PAGE_SIZE);
max = page;
@@ -160,11 +162,13 @@ __igt_reset_stolen(struct intel_gt *gt,
ggtt->vm.clear_range(&ggtt->vm, ggtt->error_capture.start, PAGE_SIZE);
if (count > 0) {
- pr_info("%s reset clobbered %ld pages of stolen, last clobber at page %ld\n",
+ gt_info(gt,
+ "%s reset clobbered %ld pages of stolen, last clobber at page %ld\n",
msg, count, max);
}
if (max >= I915_GEM_STOLEN_BIAS >> PAGE_SHIFT) {
- pr_err("%s reset clobbered unreserved area [above %x] of stolen; may cause severe faults\n",
+ gt_err(gt,
+ "%s reset clobbered unreserved area [above %x] of stolen; may cause severe faults\n",
msg, I915_GEM_STOLEN_BIAS);
err = -EINVAL;
}
@@ -223,7 +227,7 @@ static int igt_global_reset(void *arg)
intel_gt_reset(gt, ALL_ENGINES, NULL);
if (i915_reset_count(>->i915->gpu_error) == reset_count) {
- pr_err("No GPU reset recorded!\n");
+ gt_err(gt, "No GPU reset recorded!\n");
err = -EINVAL;
}
@@ -287,7 +291,8 @@ static int igt_atomic_reset(void *arg)
reset_finish(gt, awake);
if (err) {
- pr_err("__intel_gt_reset failed under %s\n", p->name);
+ gt_err(gt,
+ "__intel_gt_reset failed under %s\n", p->name);
break;
}
}
@@ -347,7 +352,8 @@ static int igt_atomic_engine_reset(void *arg)
local_bh_enable();
if (err) {
- pr_err("intel_engine_reset(%s) failed under %s\n",
+ gt_err(engine->gt,
+ "intel_engine_reset(%s) failed under %s\n",
engine->name, p->name);
break;
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c b/drivers/gpu/drm/i915/gt/selftest_slpc.c
index c3c918248989..d65f06826930 100644
--- a/drivers/gpu/drm/i915/gt/selftest_slpc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_slpc.c
@@ -3,6 +3,9 @@
* Copyright © 2021 Intel Corporation
*/
+#include "intel_gt_print.h"
+#include "uc/intel_guc.h"
+
#define NUM_STEPS 5
#define H2G_DELAY 50000
#define delay_for_h2g() usleep_range(H2G_DELAY, H2G_DELAY + 10000)
@@ -23,13 +26,22 @@ struct slpc_thread {
int result;
};
+static struct intel_gt *selftest_slpc_to_gt(struct intel_guc_slpc *slpc)
+{
+ struct intel_guc *guc = container_of(slpc, struct intel_guc, slpc);
+
+ return guc_to_gt(guc);
+}
+
static int slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 freq)
{
+ struct intel_gt *gt = selftest_slpc_to_gt(slpc);
int ret;
ret = intel_guc_slpc_set_min_freq(slpc, freq);
if (ret)
- pr_err("Could not set min frequency to [%u]\n", freq);
+ gt_err(gt, "Could not set min frequency to [%u]\n",
+ freq);
else /* Delay to ensure h2g completes */
delay_for_h2g();
@@ -38,11 +50,13 @@ static int slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 freq)
static int slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 freq)
{
+ struct intel_gt *gt = selftest_slpc_to_gt(slpc);
int ret;
ret = intel_guc_slpc_set_max_freq(slpc, freq);
if (ret)
- pr_err("Could not set maximum frequency [%u]\n",
+ gt_err(gt,
+ "Could not set maximum frequency [%u]\n",
freq);
else /* Delay to ensure h2g completes */
delay_for_h2g();
@@ -57,13 +71,13 @@ static int slpc_set_freq(struct intel_gt *gt, u32 freq)
err = slpc_set_max_freq(slpc, freq);
if (err) {
- pr_err("Unable to update max freq");
+ gt_err(gt, "Unable to update max freq");
return err;
}
err = slpc_set_min_freq(slpc, freq);
if (err) {
- pr_err("Unable to update min freq");
+ gt_err(gt, "Unable to update min freq");
return err;
}
@@ -72,23 +86,24 @@ static int slpc_set_freq(struct intel_gt *gt, u32 freq)
static int slpc_restore_freq(struct intel_guc_slpc *slpc, u32 min, u32 max)
{
+ struct intel_gt *gt = selftest_slpc_to_gt(slpc);
int err;
err = slpc_set_max_freq(slpc, max);
if (err) {
- pr_err("Unable to restore max freq");
+ gt_err(gt, "Unable to restore max freq");
return err;
}
err = slpc_set_min_freq(slpc, min);
if (err) {
- pr_err("Unable to restore min freq");
+ gt_err(gt, "Unable to restore min freq");
return err;
}
err = intel_guc_slpc_set_ignore_eff_freq(slpc, false);
if (err) {
- pr_err("Unable to restore efficient freq");
+ gt_err(gt, "Unable to restore efficient freq");
return err;
}
@@ -143,7 +158,8 @@ static int vary_max_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
/* GuC requests freq in multiples of 50/3 MHz */
if (req_freq > (max_freq + FREQUENCY_REQ_UNIT)) {
- pr_err("SWReq is %d, should be at most %d\n", req_freq,
+ gt_err(rps_to_gt(rps),
+ "SWReq is %d, should be at most %d\n", req_freq,
max_freq + FREQUENCY_REQ_UNIT);
err = -EINVAL;
}
@@ -179,8 +195,9 @@ static int vary_min_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
/* GuC requests freq in multiples of 50/3 MHz */
if (req_freq < (min_freq - FREQUENCY_REQ_UNIT)) {
- pr_err("SWReq is %d, should be at least %d\n", req_freq,
- min_freq - FREQUENCY_REQ_UNIT);
+ gt_err(rps_to_gt(rps),
+ "SWReq is %d, should be at least %d\n",
+ req_freq, min_freq - FREQUENCY_REQ_UNIT);
err = -EINVAL;
}
@@ -224,18 +241,21 @@ static int slpc_power(struct intel_gt *gt, struct intel_engine_cs *engine)
if (err)
return err;
- pr_info("%s: min:%llumW @ %uMHz, max:%llumW @ %uMHz\n",
+ gt_info(gt,
+ "%s: min:%llumW @ %uMHz, max:%llumW @ %uMHz\n",
engine->name,
min.power, min.freq,
max.power, max.freq);
if (10 * min.freq >= 9 * max.freq) {
- pr_notice("Could not control frequency, ran at [%uMHz, %uMhz]\n",
+ gt_notice(gt,
+ "Could not control frequency, ran at [%uMHz, %uMhz]\n",
min.freq, max.freq);
}
if (11 * min.power > 10 * max.power) {
- pr_err("%s: did not conserve power when setting lower frequency!\n",
+ gt_err(gt,
+ "%s: did not conserve power when setting lower frequency!\n",
engine->name);
err = -EINVAL;
}
@@ -265,10 +285,13 @@ static int max_granted_freq(struct intel_guc_slpc *slpc, struct intel_rps *rps,
/* If not, this is an error */
if (!(perf_limit_reasons & GT0_PERF_LIMIT_REASONS_MASK)) {
- pr_err("Pcode did not grant max freq\n");
+ gt_err(gt,
+ "Pcode did not grant max freq\n");
err = -EINVAL;
} else {
- pr_info("Pcode throttled frequency 0x%x\n", perf_limit_reasons);
+ gt_info(gt,
+ "Pcode throttled frequency 0x%x\n",
+ perf_limit_reasons);
}
}
@@ -290,7 +313,8 @@ static int run_test(struct intel_gt *gt, int test_type)
return 0;
if (slpc->min_freq == slpc->rp0_freq) {
- pr_err("Min/Max are fused to the same value\n");
+ gt_err(gt,
+ "Min/Max are fused to the same value\n");
return -EINVAL;
}
@@ -298,12 +322,12 @@ static int run_test(struct intel_gt *gt, int test_type)
return -ENOMEM;
if (intel_guc_slpc_get_max_freq(slpc, &slpc_max_freq)) {
- pr_err("Could not get SLPC max freq\n");
+ gt_err(gt, "Could not get SLPC max freq\n");
return -EIO;
}
if (intel_guc_slpc_get_min_freq(slpc, &slpc_min_freq)) {
- pr_err("Could not get SLPC min freq\n");
+ gt_err(gt, "Could not get SLPC min freq\n");
return -EIO;
}
@@ -313,7 +337,7 @@ static int run_test(struct intel_gt *gt, int test_type)
*/
err = slpc_set_min_freq(slpc, slpc->min_freq);
if (err) {
- pr_err("Unable to update min freq!");
+ gt_err(gt, "Unable to update min freq!");
return err;
}
@@ -322,7 +346,7 @@ static int run_test(struct intel_gt *gt, int test_type)
*/
err = intel_guc_slpc_set_ignore_eff_freq(slpc, true);
if (err) {
- pr_err("Unable to turn off efficient freq!");
+ gt_err(gt, "Unable to turn off efficient freq!");
return err;
}
@@ -349,8 +373,8 @@ static int run_test(struct intel_gt *gt, int test_type)
i915_request_add(rq);
if (!igt_wait_for_spinner(&spin, rq)) {
- pr_err("%s: Spinner did not start\n",
- engine->name);
+ gt_err(gt,
+ "%s: Spinner did not start\n", engine->name);
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
intel_gt_set_wedged(engine->gt);
@@ -387,13 +411,16 @@ static int run_test(struct intel_gt *gt, int test_type)
}
if (test_type != SLPC_POWER) {
- pr_info("Max actual frequency for %s was %d\n",
+ gt_info(gt,
+ "%s: Max actual frequency was %d\n",
engine->name, max_act_freq);
/* Actual frequency should rise above min */
if (max_act_freq <= slpc->min_freq) {
- pr_err("Actual freq did not rise above min\n");
- pr_err("Perf Limit Reasons: 0x%x\n",
+ gt_err(gt,
+ "Actual freq did not rise above min\n");
+ gt_err(gt,
+ "Perf Limit Reasons: 0x%x\n",
intel_uncore_read(gt->uncore,
intel_gt_perf_limit_reasons_reg(gt)));
err = -EINVAL;
@@ -525,7 +552,7 @@ static int live_slpc_tile_interaction(void *arg)
kthread_flush_work(&threads[i].work);
status = READ_ONCE(threads[i].result);
if (status && !ret) {
- pr_err("%s GT %d failed ", __func__, gt->info.id);
+ gt_err(gt, "failed in %s\n", __func__);
ret = status;
}
kthread_destroy_worker(threads[i].worker);
diff --git a/drivers/gpu/drm/i915/gt/selftest_tlb.c b/drivers/gpu/drm/i915/gt/selftest_tlb.c
index a5184f09d1de..fa43fa99281f 100644
--- a/drivers/gpu/drm/i915/gt/selftest_tlb.c
+++ b/drivers/gpu/drm/i915/gt/selftest_tlb.c
@@ -15,6 +15,7 @@
#include "intel_engine_regs.h"
#include "intel_gpu_commands.h"
#include "intel_gt.h"
+#include "intel_gt_print.h"
#include "intel_ring.h"
#include "selftests/igt_flush_test.h"
@@ -40,6 +41,7 @@ pte_tlbinv(struct intel_context *ce,
const unsigned int pat_index =
i915_gem_get_pat_index(ce->vm->i915, I915_CACHE_NONE);
struct drm_i915_gem_object *batch;
+ struct intel_gt *gt = ce->engine->gt;
struct drm_mm_node vb_node;
struct i915_request *rq;
struct i915_vma *vma;
@@ -68,7 +70,8 @@ pte_tlbinv(struct intel_context *ce,
va->size, align);
err = i915_vma_pin(va, 0, 0, addr | PIN_OFFSET_FIXED | PIN_USER);
if (err) {
- pr_err("Cannot pin at %llx+%llx\n", addr, va->size);
+ gt_err(gt, "Cannot pin at %llx+%llx\n",
+ addr, va->size);
goto out;
}
GEM_BUG_ON(i915_vma_offset(va) != addr);
@@ -91,7 +94,8 @@ pte_tlbinv(struct intel_context *ce,
addr = igt_random_offset(prng, addr, addr + align, 8, 8);
if (va != vb)
- pr_info("%s(%s): Sampling %llx, with alignment %llx, using PTE size %x (phys %x, sg %x), invalidate:%llx+%llx\n",
+ gt_info(gt,
+ "%s(%s): Sampling %llx, with alignment %llx, using PTE size %x (phys %x, sg %x), invalidate:%llx+%llx\n",
ce->engine->name, va->obj->mm.region->name ?: "smem",
addr, align, va->resource->page_sizes_gtt,
va->page_sizes.phys, va->page_sizes.sg,
@@ -147,9 +151,11 @@ pte_tlbinv(struct intel_context *ce,
if (va == vb) {
if (!i915_request_completed(rq)) {
- pr_err("%s(%s): Semaphore sanitycheck failed %llx, with alignment %llx, using PTE size %x (phys %x, sg %x)\n",
- ce->engine->name, va->obj->mm.region->name ?: "smem",
- addr, align, va->resource->page_sizes_gtt,
+ gt_err(gt,
+ "%s(%s): Semaphore sanitycheck failed %llx, with alignment %llx, using PTE size %x (phys %x, sg %x)\n",
+ ce->engine->name,
+ va->obj->mm.region->name ?: "smem", addr, align,
+ va->resource->page_sizes_gtt,
va->page_sizes.phys, va->page_sizes.sg);
err = -EIO;
}
@@ -171,12 +177,13 @@ pte_tlbinv(struct intel_context *ce,
tlbinv(ce->vm, addr & -length, length);
if (wait_for(i915_request_completed(rq), HZ / 2)) {
- pr_err("%s: Request did not complete; the COND_BBE did not read the updated PTE\n",
+ gt_err(gt,
+ "%s: Request did not complete; the COND_BBE did not read the updated PTE\n",
ce->engine->name);
err = -EINVAL;
}
} else {
- pr_err("Spinner ended unexpectedly\n");
+ gt_err(gt, "Spinner ended unexpectedly\n");
err = -EIO;
}
i915_request_put(rq);
@@ -271,7 +278,8 @@ mem_tlbinv(struct intel_gt *gt,
GEM_BUG_ON(A->base.size != B->base.size);
if ((A->mm.page_sizes.phys | B->mm.page_sizes.phys) & (A->base.size - 1))
- pr_warn("Failed to allocate contiguous pages for size %zx\n",
+ gt_warn(gt,
+ "Failed to allocate contiguous pages for size %zx\n",
A->base.size);
ppgtt = i915_ppgtt_create(gt, 0);
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index 4e4c420ae67f..0b37334294a4 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -7,6 +7,7 @@
#include "gem/i915_gem_pm.h"
#include "gt/intel_engine_user.h"
#include "gt/intel_gt.h"
+#include "gt/intel_gt_print.h"
#include "i915_selftest.h"
#include "intel_reset.h"
@@ -193,7 +194,8 @@ print_results(const struct intel_engine_cs *engine, const u32 *results)
u32 expected = get_whitelist_reg(engine, i);
u32 actual = results[i];
- pr_info("RING_NONPRIV[%d]: expected 0x%08x, found 0x%08x\n",
+ gt_info(engine->gt,
+ "RING_NONPRIV[%d]: expected 0x%08x, found 0x%08x\n",
i, expected, actual);
}
}
@@ -233,7 +235,8 @@ static int check_whitelist(struct intel_context *ce)
if (expected != actual) {
print_results(engine, vaddr);
- pr_err("Invalid RING_NONPRIV[%d], expected 0x%08x, found 0x%08x\n",
+ gt_err(engine->gt,
+ "Invalid RING_NONPRIV[%d], expected 0x%08x, found 0x%08x\n",
i, expected, actual);
err = -EINVAL;
@@ -304,7 +307,8 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
intel_wakeref_t wakeref;
int err;
- pr_info("Checking %d whitelisted registers on %s (RING_NONPRIV) [%s]\n",
+ gt_info(engine->gt,
+ "Checking %d whitelisted registers on %s (RING_NONPRIV) [%s]\n",
engine->whitelist.count, engine->name, name);
ce = intel_context_create(engine);
@@ -317,7 +321,8 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
err = check_whitelist(ce);
if (err) {
- pr_err("Invalid whitelist *before* %s reset!\n", name);
+ gt_err(engine->gt,
+ "Invalid whitelist *before* %s reset!\n", name);
goto out_spin;
}
@@ -327,7 +332,8 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
/* Ensure the spinner hasn't aborted */
if (i915_request_completed(rq)) {
- pr_err("%s spinner failed to start\n", name);
+ gt_err(engine->gt, "%s spinner failed to start\n",
+ name);
err = -ETIMEDOUT;
goto out_spin;
}
@@ -342,13 +348,14 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
igt_spinner_end(&spin);
if (err) {
- pr_err("%s reset failed\n", name);
+ gt_err(engine->gt, "%s reset failed\n", name);
goto out_spin;
}
err = check_whitelist(ce);
if (err) {
- pr_err("Whitelist not preserved in context across %s reset!\n",
+ gt_err(engine->gt,
+ "Whitelist not preserved in context across %s reset!\n",
name);
goto out_spin;
}
@@ -363,7 +370,8 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
err = check_whitelist(ce);
if (err) {
- pr_err("Invalid whitelist *after* %s reset in fresh context!\n",
+ gt_err(engine->gt,
+ "Invalid whitelist *after* %s reset in fresh context!\n",
name);
goto out_spin;
}
@@ -565,8 +573,8 @@ static int check_dirty_whitelist(struct intel_context *ce)
if (GRAPHICS_VER(engine->i915) >= 8)
lrm++, srm++;
- pr_debug("%s: Writing garbage to %x\n",
- engine->name, reg);
+ gt_dbg(engine->gt, "%s: Writing garbage to %x\n",
+ engine->name, reg);
/* SRM original */
*cs++ = srm;
@@ -646,7 +654,8 @@ static int check_dirty_whitelist(struct intel_context *ce)
err_request:
err = request_add_sync(rq, err);
if (err) {
- pr_err("%s: Futzing %x timedout; cancelling test\n",
+ gt_err(engine->gt,
+ "%s: Futzing %x timedout; cancelling test\n",
engine->name, reg);
intel_gt_set_wedged(engine->gt);
goto out_unmap_scratch;
@@ -657,7 +666,8 @@ static int check_dirty_whitelist(struct intel_context *ce)
/* detect write masking */
rsvd = results[ARRAY_SIZE(values)];
if (!rsvd) {
- pr_err("%s: Unable to write to whitelisted register %x\n",
+ gt_err(engine->gt,
+ "%s: Unable to write to whitelisted register %x\n",
engine->name, reg);
err = -EINVAL;
goto out_unmap_scratch;
@@ -689,14 +699,17 @@ static int check_dirty_whitelist(struct intel_context *ce)
idx++;
}
if (err) {
- pr_err("%s: %d mismatch between values written to whitelisted register [%x], and values read back!\n",
+ gt_err(engine->gt,
+ "%s: %d mismatch between values written to whitelisted register [%x], and values read back!\n",
engine->name, err, reg);
if (ro_reg)
- pr_info("%s: Whitelisted read-only register: %x, original value %08x\n",
+ gt_info(engine->gt,
+ "%s: Whitelisted read-only register: %x, original value %08x\n",
engine->name, reg, results[0]);
else
- pr_info("%s: Whitelisted register: %x, original value %08x, rsvd %08x\n",
+ gt_info(engine->gt,
+ "%s: Whitelisted register: %x, original value %08x, rsvd %08x\n",
engine->name, reg, results[0], rsvd);
expect = results[0];
@@ -708,7 +721,8 @@ static int check_dirty_whitelist(struct intel_context *ce)
expect = results[0];
else
expect = reg_write(expect, w, rsvd);
- pr_info("Wrote %08x, read %08x, expect %08x\n",
+ gt_info(engine->gt,
+ "Wrote %08x, read %08x, expect %08x\n",
w, results[idx], expect);
idx++;
}
@@ -719,7 +733,8 @@ static int check_dirty_whitelist(struct intel_context *ce)
expect = results[0];
else
expect = reg_write(expect, w, rsvd);
- pr_info("Wrote %08x, read %08x, expect %08x\n",
+ gt_info(engine->gt,
+ "Wrote %08x, read %08x, expect %08x\n",
w, results[idx], expect);
idx++;
}
@@ -985,7 +1000,8 @@ static bool result_eq(struct intel_engine_cs *engine,
u32 a, u32 b, i915_reg_t reg)
{
if (a != b && !pardon_reg(engine->i915, reg)) {
- pr_err("Whitelisted register 0x%4x not context saved: A=%08x, B=%08x\n",
+ gt_err(engine->gt,
+ "Whitelisted register 0x%4x not context saved: A=%08x, B=%08x\n",
i915_mmio_reg_offset(reg), a, b);
return false;
}
@@ -1007,7 +1023,8 @@ static bool result_neq(struct intel_engine_cs *engine,
u32 a, u32 b, i915_reg_t reg)
{
if (a == b && !writeonly_reg(engine->i915, reg)) {
- pr_err("Whitelist register 0x%4x:%08x was unwritable\n",
+ gt_err(engine->gt,
+ "Whitelist register 0x%4x:%08x was unwritable\n",
i915_mmio_reg_offset(reg), a);
return false;
}
@@ -1211,7 +1228,7 @@ live_gpu_reset_workarounds(void *arg)
if (!lists)
return -ENOMEM;
- pr_info("Verifying after GPU reset...\n");
+ gt_info(gt, "Verifying after GPU reset...\n");
igt_global_reset_lock(gt);
wakeref = intel_runtime_pm_get(gt->uncore->rpm);
@@ -1266,7 +1283,8 @@ live_engine_reset_workarounds(void *arg)
bool ok;
int ret2;
- pr_info("Verifying after %s reset...\n", engine->name);
+ gt_info(gt, "Verifying after %s reset...\n",
+ engine->name);
ret = intel_selftest_modify_policy(engine, &saved,
SELFTEST_SCHEDULER_MODIFY_FAST_RESET);
if (ret)
@@ -1287,7 +1305,9 @@ live_engine_reset_workarounds(void *arg)
ret = intel_engine_reset(engine, "live_workarounds:idle");
if (ret) {
- pr_err("%s: Reset failed while idle\n", engine->name);
+ gt_err(gt,
+ "%s: Reset failed while idle\n",
+ engine->name);
goto err;
}
@@ -1311,7 +1331,8 @@ live_engine_reset_workarounds(void *arg)
ret = request_add_spin(rq, &spin);
if (ret) {
- pr_err("%s: Spinner failed to start\n", engine->name);
+ gt_err(gt,
+ "%s: Spinner failed to start\n", engine->name);
igt_spinner_fini(&spin);
goto err;
}
@@ -1325,7 +1346,8 @@ live_engine_reset_workarounds(void *arg)
if (!using_guc) {
ret = intel_engine_reset(engine, "live_workarounds:active");
if (ret) {
- pr_err("%s: Reset failed on an active spinner\n",
+ gt_err(gt,
+ "%s: Reset failed on an active spinner\n",
engine->name);
igt_spinner_fini(&spin);
goto err;
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v4 5/7] drm/i915/gt/selftests: Use gt_* prints in gt standalone tests
2026-09-24 12:01 [PATCH v4 0/7] drm/i915/selftests: Modernize printing in i915 selftests Krzysztof Karas
` (3 preceding siblings ...)
2026-09-24 12:01 ` [PATCH v4 4/7] drm/i915/gt/selftests: Use gt_* prints in aggregated gt selftests Krzysztof Karas
@ 2026-09-24 12:01 ` Krzysztof Karas
2026-09-24 12:01 ` [PATCH v4 6/7] drm/i915/gt/selftests: Use gt_* prints in gt selftest helpers Krzysztof Karas
` (2 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Krzysztof Karas @ 2026-09-24 12:01 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec, Krzysztof Karas
Move away from generic pr prints to GT aware gt_* versions,
which tag each message with device and the tile it came from.
Assisted-by: GitHub-Copilot:claude-opus-5
Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
---
v4:
- switch drm_* to gt_* throughout both files (Andi Shyti);
- restore the RC0 power/freq message that had been
inadvertently downgraded from _err to _dbg level (Andi Shyti);
drivers/gpu/drm/i915/gt/selftest_rc6.c | 32 ++++---
drivers/gpu/drm/i915/gt/selftest_rps.c | 126 ++++++++++++++++---------
2 files changed, 103 insertions(+), 55 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.c b/drivers/gpu/drm/i915/gt/selftest_rc6.c
index 68fb1830d411..a88b39733364 100644
--- a/drivers/gpu/drm/i915/gt/selftest_rc6.c
+++ b/drivers/gpu/drm/i915/gt/selftest_rc6.c
@@ -6,6 +6,7 @@
#include "intel_context.h"
#include "intel_engine_pm.h"
#include "intel_gpu_commands.h"
+#include "intel_gt_print.h"
#include "intel_gt_requests.h"
#include "intel_ring.h"
#include "intel_rps.h"
@@ -80,7 +81,8 @@ int live_rc6_manual(void *arg)
res[1] = rc6_residency(rc6);
rc0_freq = intel_rps_read_actual_frequency_fw(rps);
if ((res[1] - res[0]) >> 10) {
- pr_err("RC6 residency increased by %lldus while disabled for 1000ms!\n",
+ gt_err(gt,
+ "RC6 residency increased by %lldus while disabled for 1000ms!\n",
(res[1] - res[0]) >> 10);
err = -EINVAL;
goto out_unlock;
@@ -92,10 +94,12 @@ int live_rc6_manual(void *arg)
if (!rc0_power) {
if (rc0_freq)
- pr_err("No power measured while in RC0! GPU Freq: %uMHz in RC0\n",
+ gt_err(gt,
+ "No power measured while in RC0! GPU Freq: %uMHz in RC0\n",
rc0_freq);
else
- pr_err("No power and freq measured while in RC0\n");
+ gt_err(gt,
+ "No power and freq measured while in RC0\n");
err = -EINVAL;
goto out_unlock;
}
@@ -114,7 +118,8 @@ int live_rc6_manual(void *arg)
dt = ktime_sub(ktime_get(), dt);
res[1] = rc6_residency(rc6);
if (res[1] == res[0]) {
- pr_err("Did not enter RC6! RC6_STATE=%08x, RC6_CONTROL=%08x, residency=%lld\n",
+ gt_err(gt,
+ "Did not enter RC6! RC6_STATE=%08x, RC6_CONTROL=%08x, residency=%lld\n",
intel_uncore_read_fw(gt->uncore, GEN6_RC_STATE),
intel_uncore_read_fw(gt->uncore, GEN6_RC_CONTROL),
res[0]);
@@ -124,21 +129,25 @@ int live_rc6_manual(void *arg)
if (has_power) {
rc6_power = div64_u64(NSEC_PER_SEC * rc6_sample_energy[1],
ktime_to_ns(dt));
- pr_info("GPU consumed %lluuW in RC0 and %lluuW in RC6\n",
+ gt_info(gt,
+ "GPU consumed %lluuW in RC0 and %lluuW in RC6\n",
rc0_power, rc6_power);
if (2 * rc6_power > rc0_power) {
- pr_err("GPU leaked energy while in RC6!\n"
+ gt_err(gt,
+ "GPU leaked energy while in RC6!\n"
"GPU Freq: %uMHz in RC6 and %uMHz in RC0\n"
"RC0 energy before & after sleep respectively: %lluuJ %lluuJ\n"
"RC6 energy before & after sleep respectively: %lluuJ %lluuJ\n",
- rc6_freq, rc0_freq, rc0_sample_energy[0], rc0_sample_energy[1],
+ rc6_freq, rc0_freq,
+ rc0_sample_energy[0], rc0_sample_energy[1],
rc6_sample_energy[0], rc6_sample_energy[1]);
diff = res[1] - res[0];
threshold = (9 * NSEC_PER_MSEC * sleep_time) / 10;
if (diff < threshold)
- pr_err("Did not enter RC6 properly, RC6 start residency=%lluns, RC6 end residency=%lluns\n",
+ gt_err(gt,
+ "Did not enter RC6 properly, RC6 start residency=%lluns, RC6 end residency=%lluns\n",
res[0], res[1]);
err = -EINVAL;
goto out_unlock;
@@ -265,12 +274,13 @@ int live_rc6_ctx_wa(void *arg)
}
intel_gt_pm_wait_for_idle(gt);
- pr_debug("%s: CTX_INFO=%0x\n",
- engine->name, READ_ONCE(*res));
+ gt_dbg(gt, "%s: CTX_INFO=%0x\n",
+ engine->name, READ_ONCE(*res));
if (resets !=
i915_reset_engine_count(error, engine)) {
- pr_err("%s: GPU reset required\n",
+ gt_err(gt,
+ "%s: GPU reset required\n",
engine->name);
add_taint_for_CI(gt->i915, TAINT_WARN);
err = -EIO;
diff --git a/drivers/gpu/drm/i915/gt/selftest_rps.c b/drivers/gpu/drm/i915/gt/selftest_rps.c
index be77fba2ec49..0c5bccfddd3a 100644
--- a/drivers/gpu/drm/i915/gt/selftest_rps.c
+++ b/drivers/gpu/drm/i915/gt/selftest_rps.c
@@ -15,6 +15,7 @@
#include "intel_gpu_commands.h"
#include "intel_gt_clock_utils.h"
#include "intel_gt_pm.h"
+#include "intel_gt_print.h"
#include "intel_rc6.h"
#include "selftest_engine_heartbeat.h"
#include "selftest_rps.h"
@@ -204,12 +205,12 @@ static void show_pstate_limits(struct intel_rps *rps)
struct drm_i915_private *i915 = rps_to_i915(rps);
if (IS_BROXTON(i915)) {
- pr_info("P_STATE_CAP[%x]: 0x%08x\n",
+ gt_info(rps_to_gt(rps), "P_STATE_CAP[%x]: 0x%08x\n",
i915_mmio_reg_offset(BXT_RP_STATE_CAP),
intel_uncore_read(rps_to_uncore(rps),
BXT_RP_STATE_CAP));
} else if (GRAPHICS_VER(i915) == 9) {
- pr_info("P_STATE_LIMITS[%x]: 0x%08x\n",
+ gt_info(rps_to_gt(rps), "P_STATE_LIMITS[%x]: 0x%08x\n",
i915_mmio_reg_offset(GEN9_RP_STATE_LIMITS),
intel_uncore_read(rps_to_uncore(rps),
GEN9_RP_STATE_LIMITS));
@@ -264,7 +265,8 @@ int live_rps_clock_interval(void *arg)
i915_request_add(rq);
if (!igt_wait_for_spinner(&spin, rq)) {
- pr_err("%s: RPS spinner did not start\n",
+ gt_err(gt,
+ "%s: RPS spinner did not start\n",
engine->name);
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
@@ -290,7 +292,8 @@ int live_rps_clock_interval(void *arg)
GEN6_RP_CUR_UP_EI),
10)) {
/* Just skip the test; assume lack of HW support */
- pr_notice("%s: rps evaluation interval not ticking\n",
+ gt_notice(gt,
+ "%s: rps evaluation interval not ticking\n",
engine->name);
err = -ENODEV;
} else {
@@ -330,20 +333,23 @@ int live_rps_clock_interval(void *arg)
u32 expected =
intel_gt_ns_to_pm_interval(gt, dt);
- pr_info("%s: rps counted %d C0 cycles [%lldns] in %lldns [%d cycles], using GT clock frequency of %uKHz\n",
+ gt_info(gt,
+ "%s: rps counted %d C0 cycles [%lldns] in %lldns [%d cycles], using GT clock frequency of %uKHz\n",
engine->name, cycles, time, dt, expected,
gt->clock_frequency / 1000);
if (10 * time < 8 * dt ||
8 * time > 10 * dt) {
- pr_err("%s: rps clock time does not match walltime!\n",
+ gt_err(gt,
+ "%s: rps clock time does not match walltime!\n",
engine->name);
err = -EINVAL;
}
if (10 * expected < 8 * cycles ||
8 * expected > 10 * cycles) {
- pr_err("%s: walltime does not match rps clock ticks!\n",
+ gt_err(gt,
+ "%s: walltime does not match rps clock ticks!\n",
engine->name);
err = -EINVAL;
}
@@ -424,7 +430,8 @@ int live_rps_control(void *arg)
i915_request_add(rq);
if (!igt_wait_for_spinner(&spin, rq)) {
- pr_err("%s: RPS spinner did not start\n",
+ gt_err(gt,
+ "%s: RPS spinner did not start\n",
engine->name);
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
@@ -434,7 +441,8 @@ int live_rps_control(void *arg)
}
if (rps_set_check(rps, rps->min_freq) != rps->min_freq) {
- pr_err("%s: could not set minimum frequency [%x], only %x!\n",
+ gt_err(gt,
+ "%s: could not set minimum frequency [%x], only %x!\n",
engine->name, rps->min_freq, read_cagf(rps));
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
@@ -451,7 +459,8 @@ int live_rps_control(void *arg)
limit = rps_set_check(rps, f);
if (rps_set_check(rps, rps->min_freq) != rps->min_freq) {
- pr_err("%s: could not restore minimum frequency [%x], only %x!\n",
+ gt_err(gt,
+ "%s: could not restore minimum frequency [%x], only %x!\n",
engine->name, rps->min_freq, read_cagf(rps));
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
@@ -474,7 +483,8 @@ int live_rps_control(void *arg)
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
- pr_info("%s: range:[%x:%uMHz, %x:%uMHz] limit:[%x:%uMHz], %x:%x response %lluns:%lluns\n",
+ gt_info(gt,
+ "%s: range:[%x:%uMHz, %x:%uMHz] limit:[%x:%uMHz], %x:%x response %lluns:%lluns\n",
engine->name,
rps->min_freq, intel_gpu_freq(rps, rps->min_freq),
rps->max_freq, intel_gpu_freq(rps, rps->max_freq),
@@ -483,7 +493,8 @@ int live_rps_control(void *arg)
if (limit != rps->max_freq) {
if (throttle)
- pr_warn("%s: GPU throttled with reasons 0x%08x\n",
+ gt_warn(gt,
+ "%s: GPU throttled with reasons 0x%08x\n",
engine->name, throttle);
show_pstate_limits(rps);
}
@@ -523,14 +534,14 @@ static void show_pcu_config(struct intel_rps *rps)
wakeref = intel_runtime_pm_get(rps_to_uncore(rps)->rpm);
- pr_info("%5s %5s %5s\n", "GPU", "eCPU", "eRing");
+ gt_info(rps_to_gt(rps), "%5s %5s %5s\n", "GPU", "eCPU", "eRing");
for (gpu_freq = min_gpu_freq; gpu_freq <= max_gpu_freq; gpu_freq++) {
int ia_freq = gpu_freq;
snb_pcode_read(rps_to_gt(rps)->uncore, GEN6_PCODE_READ_MIN_FREQ_TABLE,
&ia_freq, NULL);
- pr_info("%5d %5d %5d\n",
+ gt_info(rps_to_gt(rps), "%5d %5d %5d\n",
gpu_freq * 50,
((ia_freq >> 0) & 0xff) * 100,
((ia_freq >> 8) & 0xff) * 100);
@@ -669,7 +680,8 @@ int live_rps_frequency_cs(void *arg)
if (wait_for(intel_uncore_read(engine->uncore, CS_GPR(0)),
10)) {
- pr_err("%s: timed loop did not start\n",
+ gt_err(gt,
+ "%s: timed loop did not start\n",
engine->name);
goto err_vma;
}
@@ -680,7 +692,8 @@ int live_rps_frequency_cs(void *arg)
max.freq = rps->max_freq;
max.count = measure_cs_frequency_at(rps, engine, &max.freq);
- pr_info("%s: min:%lluKHz @ %uMHz, max:%lluKHz @ %uMHz [%d%%]\n",
+ gt_info(gt,
+ "%s: min:%lluKHz @ %uMHz, max:%lluKHz @ %uMHz [%d%%]\n",
engine->name,
min.count, intel_gpu_freq(rps, min.freq),
max.count, intel_gpu_freq(rps, max.freq),
@@ -692,7 +705,8 @@ int live_rps_frequency_cs(void *arg)
2, 3)) {
int f;
- pr_err("%s: CS did not scale with frequency! scaled min:%llu, max:%llu\n",
+ gt_err(gt,
+ "%s: CS did not scale with frequency! scaled min:%llu, max:%llu\n",
engine->name,
max.freq * min.count,
min.freq * max.count);
@@ -706,7 +720,8 @@ int live_rps_frequency_cs(void *arg)
if (act < f)
break;
- pr_info("%s: %x:%uMHz: %lluKHz [%d%%]\n",
+ gt_info(gt,
+ "%s: %x:%uMHz: %lluKHz [%d%%]\n",
engine->name,
act, intel_gpu_freq(rps, act), count,
(int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * count,
@@ -807,7 +822,8 @@ int live_rps_frequency_srm(void *arg)
goto err_vma;
if (wait_for(READ_ONCE(*cntr), 10)) {
- pr_err("%s: timed loop did not start\n",
+ gt_err(gt,
+ "%s: timed loop did not start\n",
engine->name);
goto err_vma;
}
@@ -818,7 +834,8 @@ int live_rps_frequency_srm(void *arg)
max.freq = rps->max_freq;
max.count = measure_frequency_at(rps, cntr, &max.freq);
- pr_info("%s: min:%lluKHz @ %uMHz, max:%lluKHz @ %uMHz [%d%%]\n",
+ gt_info(gt,
+ "%s: min:%lluKHz @ %uMHz, max:%lluKHz @ %uMHz [%d%%]\n",
engine->name,
min.count, intel_gpu_freq(rps, min.freq),
max.count, intel_gpu_freq(rps, max.freq),
@@ -830,7 +847,8 @@ int live_rps_frequency_srm(void *arg)
1, 2)) {
int f;
- pr_err("%s: CS did not scale with frequency! scaled min:%llu, max:%llu\n",
+ gt_err(gt,
+ "%s: CS did not scale with frequency! scaled min:%llu, max:%llu\n",
engine->name,
max.freq * min.count,
min.freq * max.count);
@@ -844,7 +862,8 @@ int live_rps_frequency_srm(void *arg)
if (act < f)
break;
- pr_info("%s: %x:%uMHz: %lluKHz [%d%%]\n",
+ gt_info(gt,
+ "%s: %x:%uMHz: %lluKHz [%d%%]\n",
engine->name,
act, intel_gpu_freq(rps, act), count,
(int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * count,
@@ -915,7 +934,7 @@ static int __rps_up_interrupt(struct intel_rps *rps,
i915_request_add(rq);
if (!igt_wait_for_spinner(spin, rq)) {
- pr_err("%s: RPS spinner did not start\n",
+ gt_err(engine->gt, "%s: RPS spinner did not start\n",
engine->name);
i915_request_put(rq);
intel_gt_set_wedged(engine->gt);
@@ -923,7 +942,8 @@ static int __rps_up_interrupt(struct intel_rps *rps,
}
if (!intel_rps_is_active(rps)) {
- pr_err("%s: RPS not enabled on starting spinner\n",
+ gt_err(engine->gt,
+ "%s: RPS not enabled on starting spinner\n",
engine->name);
igt_spinner_end(spin);
i915_request_put(rq);
@@ -931,14 +951,16 @@ static int __rps_up_interrupt(struct intel_rps *rps,
}
if (!(rps->pm_events & GEN6_PM_RP_UP_THRESHOLD)) {
- pr_err("%s: RPS did not register UP interrupt\n",
+ gt_err(engine->gt,
+ "%s: RPS did not register UP interrupt\n",
engine->name);
i915_request_put(rq);
return -EINVAL;
}
if (rps->last_freq != rps->min_freq) {
- pr_err("%s: RPS did not program min frequency\n",
+ gt_err(engine->gt,
+ "%s: RPS did not program min frequency\n",
engine->name);
i915_request_put(rq);
return -EINVAL;
@@ -955,13 +977,15 @@ static int __rps_up_interrupt(struct intel_rps *rps,
i915_request_put(rq);
if (rps->cur_freq != rps->min_freq) {
- pr_err("%s: Frequency unexpectedly changed [up], now %d!\n",
+ gt_err(engine->gt,
+ "%s: Frequency unexpectedly changed [up], now %d!\n",
engine->name, intel_rps_read_actual_frequency(rps));
return -EINVAL;
}
if (!(rps->pm_iir & GEN6_PM_RP_UP_THRESHOLD)) {
- pr_err("%s: UP interrupt not recorded for spinner, pm_iir:%x, prev_up:%x, up_threshold:%x, up_ei:%x\n",
+ gt_err(engine->gt,
+ "%s: UP interrupt not recorded for spinner, pm_iir:%x, prev_up:%x, up_threshold:%x, up_ei:%x\n",
engine->name, rps->pm_iir,
intel_uncore_read(uncore, GEN6_RP_PREV_UP),
intel_uncore_read(uncore, GEN6_RP_UP_THRESHOLD),
@@ -981,13 +1005,15 @@ static int __rps_down_interrupt(struct intel_rps *rps,
rps_set_check(rps, rps->max_freq);
if (!(rps->pm_events & GEN6_PM_RP_DOWN_THRESHOLD)) {
- pr_err("%s: RPS did not register DOWN interrupt\n",
+ gt_err(engine->gt,
+ "%s: RPS did not register DOWN interrupt\n",
engine->name);
return -EINVAL;
}
if (rps->last_freq != rps->max_freq) {
- pr_err("%s: RPS did not program max frequency\n",
+ gt_err(engine->gt,
+ "%s: RPS did not program max frequency\n",
engine->name);
return -EINVAL;
}
@@ -999,14 +1025,16 @@ static int __rps_down_interrupt(struct intel_rps *rps,
sleep_for_ei(rps, timeout);
if (rps->cur_freq != rps->max_freq) {
- pr_err("%s: Frequency unexpectedly changed [down], now %d!\n",
+ gt_err(engine->gt,
+ "%s: Frequency unexpectedly changed [down], now %d!\n",
engine->name,
intel_rps_read_actual_frequency(rps));
return -EINVAL;
}
if (!(rps->pm_iir & (GEN6_PM_RP_DOWN_THRESHOLD | GEN6_PM_RP_DOWN_TIMEOUT))) {
- pr_err("%s: DOWN interrupt not recorded for idle, pm_iir:%x, prev_down:%x, down_threshold:%x, down_ei:%x [prev_up:%x, up_threshold:%x, up_ei:%x]\n",
+ gt_err(engine->gt,
+ "%s: DOWN interrupt not recorded for idle, pm_iir:%x, prev_down:%x, down_threshold:%x, down_ei:%x [prev_up:%x, up_threshold:%x, up_ei:%x]\n",
engine->name, rps->pm_iir,
intel_uncore_read(uncore, GEN6_RP_PREV_DOWN),
intel_uncore_read(uncore, GEN6_RP_DOWN_THRESHOLD),
@@ -1043,7 +1071,8 @@ int live_rps_interrupt(void *arg)
with_intel_gt_pm(gt, wakeref)
pm_events = rps->pm_events;
if (!pm_events) {
- pr_err("No RPS PM events registered, but RPS is enabled?\n");
+ gt_err(gt,
+ "No RPS PM events registered, but RPS is enabled?\n");
return -ENODEV;
}
@@ -1186,7 +1215,8 @@ int live_rps_power(void *arg)
i915_request_add(rq);
if (!igt_wait_for_spinner(&spin, rq)) {
- pr_err("%s: RPS spinner did not start\n",
+ gt_err(gt,
+ "%s: RPS spinner did not start\n",
engine->name);
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
@@ -1207,28 +1237,33 @@ int live_rps_power(void *arg)
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
- pr_info("%s: min:%llumW @ %uMHz, max:%llumW @ %uMHz\n",
+ gt_info(gt,
+ "%s: min:%llumW @ %uMHz, max:%llumW @ %uMHz\n",
engine->name,
min.power, intel_gpu_freq(rps, min.freq),
max.power, intel_gpu_freq(rps, max.freq));
if (10 * min.freq >= 9 * max.freq) {
- pr_notice("Could not control frequency, ran at [%d:%uMHz, %d:%uMhz]\n",
+ gt_notice(gt,
+ "Could not control frequency, ran at [%d:%uMHz, %d:%uMhz]\n",
min.freq, intel_gpu_freq(rps, min.freq),
max.freq, intel_gpu_freq(rps, max.freq));
if (throttle)
- pr_warn("%s: GPU throttled with reasons 0x%08x\n",
+ gt_warn(gt,
+ "%s: GPU throttled with reasons 0x%08x\n",
engine->name, throttle);
continue;
}
if (11 * min.power > 10 * max.power) {
- pr_err("%s: did not conserve power when setting lower frequency!\n",
+ gt_err(gt,
+ "%s: did not conserve power when setting lower frequency!\n",
engine->name);
if (throttle)
- pr_warn("%s: GPU throttled with reasons 0x%08x\n",
+ gt_warn(gt,
+ "%s: GPU throttled with reasons 0x%08x\n",
engine->name, throttle);
err = -EINVAL;
@@ -1273,9 +1308,9 @@ int live_rps_dynamic(void *arg)
return -ENOMEM;
if (intel_rps_has_interrupts(rps))
- pr_info("RPS has interrupt support\n");
+ gt_info(gt, "RPS has interrupt support\n");
if (intel_rps_uses_timer(rps))
- pr_info("RPS has timer support\n");
+ gt_info(gt, "RPS has timer support\n");
for_each_engine(engine, gt, id) {
struct i915_request *rq;
@@ -1318,18 +1353,21 @@ int live_rps_dynamic(void *arg)
min.freq = wait_for_freq(rps, rps->min_freq, 2000);
min.dt = ktime_sub(ktime_get(), min.dt);
- pr_info("%s: dynamically reclocked to %u:%uMHz while busy in %lluns, and %u:%uMHz while idle in %lluns\n",
+ gt_info(gt,
+ "%s: dynamically reclocked to %u:%uMHz while busy in %lluns, and %u:%uMHz while idle in %lluns\n",
engine->name,
max.freq, intel_gpu_freq(rps, max.freq),
ktime_to_ns(max.dt),
min.freq, intel_gpu_freq(rps, min.freq),
ktime_to_ns(min.dt));
if (min.freq >= max.freq) {
- pr_err("%s: dynamic reclocking of spinner failed\n!",
+ gt_err(gt,
+ "%s: dynamic reclocking of spinner failed\n!",
engine->name);
if (throttle)
- pr_warn("%s: GPU throttled with reasons 0x%08x\n",
+ gt_warn(gt,
+ "%s: GPU throttled with reasons 0x%08x\n",
engine->name, throttle);
err = -EINVAL;
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v4 6/7] drm/i915/gt/selftests: Use gt_* prints in gt selftest helpers
2026-09-24 12:01 [PATCH v4 0/7] drm/i915/selftests: Modernize printing in i915 selftests Krzysztof Karas
` (4 preceding siblings ...)
2026-09-24 12:01 ` [PATCH v4 5/7] drm/i915/gt/selftests: Use gt_* prints in gt standalone tests Krzysztof Karas
@ 2026-09-24 12:01 ` Krzysztof Karas
2026-09-24 12:01 ` [PATCH v4 7/7] drm/i915/selftests: Use i915_* prints in i915_selftest.c Krzysztof Karas
2026-09-24 12:53 ` ✗ i915.CI.BAT: failure for drm/i915/selftests: Modernize printing in i915 selftests (rev5) Patchwork
7 siblings, 0 replies; 13+ messages in thread
From: Krzysztof Karas @ 2026-09-24 12:01 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec, Krzysztof Karas
Move away from generic pr prints to GT aware gt_* versions,
which tag each message with device and the tile it came from.
Assisted-by: GitHub-Copilot:claude-opus-5
Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
---
v4:
- drop a stray blank line in selftest_llc.c (Andi Shyti);
- fix include ordering nit (Krzysztof Niemiec);
.../drm/i915/gt/selftest_engine_heartbeat.c | 7 +++---
drivers/gpu/drm/i915/gt/selftest_llc.c | 25 ++++++++++++-------
2 files changed, 20 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
index b893a8fde895..1164dd4aea11 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
@@ -7,6 +7,7 @@
#include "i915_drv.h"
+#include "intel_gt_print.h"
#include "intel_gt_requests.h"
#include "i915_selftest.h"
#include "selftest_engine_heartbeat.h"
@@ -202,7 +203,7 @@ static int __live_heartbeat_off(struct intel_engine_cs *engine)
engine->serial++;
flush_delayed_work(&engine->heartbeat.work);
if (!delayed_work_pending(&engine->heartbeat.work)) {
- pr_err("%s: heartbeat not running\n",
+ gt_err(engine->gt, "%s: heartbeat not running\n",
engine->name);
err = -EINVAL;
goto err_pm;
@@ -215,14 +216,14 @@ static int __live_heartbeat_off(struct intel_engine_cs *engine)
engine->serial++;
flush_delayed_work(&engine->heartbeat.work);
if (delayed_work_pending(&engine->heartbeat.work)) {
- pr_err("%s: heartbeat still running\n",
+ gt_err(engine->gt, "%s: heartbeat still running\n",
engine->name);
err = -EINVAL;
goto err_beat;
}
if (READ_ONCE(engine->heartbeat.systole)) {
- pr_err("%s: heartbeat still allocated\n",
+ gt_err(engine->gt, "%s: heartbeat still allocated\n",
engine->name);
err = -EINVAL;
goto err_beat;
diff --git a/drivers/gpu/drm/i915/gt/selftest_llc.c b/drivers/gpu/drm/i915/gt/selftest_llc.c
index 779fadcec7c4..71ea688be154 100644
--- a/drivers/gpu/drm/i915/gt/selftest_llc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_llc.c
@@ -3,6 +3,7 @@
* Copyright © 2019 Intel Corporation
*/
+#include "intel_gt_print.h"
#include "selftest_llc.h"
#include "intel_rps.h"
@@ -22,8 +23,8 @@ static int gen6_verify_ring_freq(struct intel_llc *llc)
for (gpu_freq = consts.min_gpu_freq;
gpu_freq <= consts.max_gpu_freq;
gpu_freq++) {
+ u32 scaler = GRAPHICS_VER(i915) >= 9 ? GEN9_FREQ_SCALER : 1;
struct intel_rps *rps = &llc_to_gt(llc)->rps;
-
unsigned int ia_freq, ring_freq, found;
u32 val;
@@ -32,17 +33,21 @@ static int gen6_verify_ring_freq(struct intel_llc *llc)
val = gpu_freq;
if (snb_pcode_read(llc_to_gt(llc)->uncore, GEN6_PCODE_READ_MIN_FREQ_TABLE,
&val, NULL)) {
- pr_err("Failed to read freq table[%d], range [%d, %d]\n",
- gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq);
+ gt_err(llc_to_gt(llc),
+ "Failed to read freq table[%d], range [%d, %d]\n",
+ gpu_freq, consts.min_gpu_freq,
+ consts.max_gpu_freq);
err = -ENXIO;
break;
}
found = (val >> 0) & 0xff;
if (found != ia_freq) {
- pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected CPU freq, found %d, expected %d\n",
- gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq,
- intel_gpu_freq(rps, gpu_freq * (GRAPHICS_VER(i915) >= 9 ? GEN9_FREQ_SCALER : 1)),
+ gt_err(llc_to_gt(llc),
+ "Min freq table(%d/[%d, %d]):%dMHz did not match expected CPU freq, found %d, expected %d\n",
+ gpu_freq, consts.min_gpu_freq,
+ consts.max_gpu_freq,
+ intel_gpu_freq(rps, gpu_freq * scaler),
found, ia_freq);
err = -EINVAL;
break;
@@ -50,9 +55,11 @@ static int gen6_verify_ring_freq(struct intel_llc *llc)
found = (val >> 8) & 0xff;
if (found != ring_freq) {
- pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected ring freq, found %d, expected %d\n",
- gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq,
- intel_gpu_freq(rps, gpu_freq * (GRAPHICS_VER(i915) >= 9 ? GEN9_FREQ_SCALER : 1)),
+ gt_err(llc_to_gt(llc),
+ "Min freq table(%d/[%d, %d]):%dMHz did not match expected ring freq, found %d, expected %d\n",
+ gpu_freq, consts.min_gpu_freq,
+ consts.max_gpu_freq,
+ intel_gpu_freq(rps, gpu_freq * scaler),
found, ring_freq);
err = -EINVAL;
break;
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v4 7/7] drm/i915/selftests: Use i915_* prints in i915_selftest.c
2026-09-24 12:01 [PATCH v4 0/7] drm/i915/selftests: Modernize printing in i915 selftests Krzysztof Karas
` (5 preceding siblings ...)
2026-09-24 12:01 ` [PATCH v4 6/7] drm/i915/gt/selftests: Use gt_* prints in gt selftest helpers Krzysztof Karas
@ 2026-09-24 12:01 ` Krzysztof Karas
2026-09-25 10:51 ` Jani Nikula
2026-09-24 12:53 ` ✗ i915.CI.BAT: failure for drm/i915/selftests: Modernize printing in i915 selftests (rev5) Patchwork
7 siblings, 1 reply; 13+ messages in thread
From: Krzysztof Karas @ 2026-09-24 12:01 UTC (permalink / raw)
To: intel-gfx
Cc: dri-devel, Jani Nikula, Andi Shyti, Janusz Krzysztofik,
Sebastian Brzezinka, Krzysztof Niemiec, Krzysztof Karas
Move away from generic pr prints to drm device context aware
i915_* versions.
Assisted-by: GitHub-Copilot:claude-opus-5
Assisted-by: GitHub-Copilot:claude-sonnet-5
Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
---
v4:
- renamed from "Use drm_* prints in selftest headers" (the title
did not match the change) and switched to the new i915_*
prints instead of drm_*;
drivers/gpu/drm/i915/selftests/i915_selftest.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/i915_selftest.c b/drivers/gpu/drm/i915/selftests/i915_selftest.c
index 3adcfdab75ae..4e2566189879 100644
--- a/drivers/gpu/drm/i915/selftests/i915_selftest.c
+++ b/drivers/gpu/drm/i915/selftests/i915_selftest.c
@@ -23,6 +23,8 @@
#include <linux/random.h>
+#include "i915_printk.h"
+
#include "gt/intel_gt.h"
#include "gt/intel_gt_pm.h"
#include "gt/intel_gt_regs.h"
@@ -47,7 +49,7 @@ int i915_mock_sanitycheck(void)
int i915_live_sanitycheck(struct drm_i915_private *i915)
{
- pr_info("%s: %s() - ok!\n", i915->drm.driver->name, __func__);
+ i915_info(i915, "%s() - ok!\n", __func__);
return 0;
}
@@ -154,7 +156,7 @@ __wait_gsc_proxy_completed(struct drm_i915_private *i915)
if (need_to_wait && wait_for(!__gsc_proxy_init_progressing(&i915->media_gt->uc.gsc),
timeout_ms))
- pr_warn(DRIVER_NAME "Timed out waiting for gsc_proxy_completion!\n");
+ i915_warn(i915, "Timed out waiting for gsc_proxy_completion!\n");
}
static void
@@ -178,7 +180,7 @@ __wait_gsc_huc_load_completed(struct drm_i915_private *i915)
if (need_to_wait &&
wait_for(i915_sw_fence_done(&huc->delayed_load.fence), timeout_ms))
- pr_warn(DRIVER_NAME "Timed out waiting for huc load via GSC!\n");
+ i915_warn(i915, "Timed out waiting for huc load via GSC!\n");
}
static struct mm_struct *get_selftest_mm(int u_pid_nr)
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v4 7/7] drm/i915/selftests: Use i915_* prints in i915_selftest.c
2026-09-24 12:01 ` [PATCH v4 7/7] drm/i915/selftests: Use i915_* prints in i915_selftest.c Krzysztof Karas
@ 2026-09-25 10:51 ` Jani Nikula
0 siblings, 0 replies; 13+ messages in thread
From: Jani Nikula @ 2026-09-25 10:51 UTC (permalink / raw)
To: Krzysztof Karas, intel-gfx
Cc: dri-devel, Andi Shyti, Janusz Krzysztofik, Sebastian Brzezinka,
Krzysztof Niemiec, Krzysztof Karas
On Thu, 24 Sep 2026, Krzysztof Karas <krzysztof.karas@intel.com> wrote:
> Move away from generic pr prints to drm device context aware
> i915_* versions.
So I think moving away from pr_* to drm_* logging is fine, and there's a
limited amount of that.
But the i915_* macros just open the door to an insane amount of churn
converting drm_* to i915_* everywhere in a driver that's essentially in
maintenance mode now, for no real benefit to anyone.
BR,
Jani.
>
> Assisted-by: GitHub-Copilot:claude-opus-5
> Assisted-by: GitHub-Copilot:claude-sonnet-5
> Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
> ---
> v4:
> - renamed from "Use drm_* prints in selftest headers" (the title
> did not match the change) and switched to the new i915_*
> prints instead of drm_*;
>
> drivers/gpu/drm/i915/selftests/i915_selftest.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_selftest.c b/drivers/gpu/drm/i915/selftests/i915_selftest.c
> index 3adcfdab75ae..4e2566189879 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_selftest.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_selftest.c
> @@ -23,6 +23,8 @@
>
> #include <linux/random.h>
>
> +#include "i915_printk.h"
> +
> #include "gt/intel_gt.h"
> #include "gt/intel_gt_pm.h"
> #include "gt/intel_gt_regs.h"
> @@ -47,7 +49,7 @@ int i915_mock_sanitycheck(void)
>
> int i915_live_sanitycheck(struct drm_i915_private *i915)
> {
> - pr_info("%s: %s() - ok!\n", i915->drm.driver->name, __func__);
> + i915_info(i915, "%s() - ok!\n", __func__);
> return 0;
> }
>
> @@ -154,7 +156,7 @@ __wait_gsc_proxy_completed(struct drm_i915_private *i915)
>
> if (need_to_wait && wait_for(!__gsc_proxy_init_progressing(&i915->media_gt->uc.gsc),
> timeout_ms))
> - pr_warn(DRIVER_NAME "Timed out waiting for gsc_proxy_completion!\n");
> + i915_warn(i915, "Timed out waiting for gsc_proxy_completion!\n");
> }
>
> static void
> @@ -178,7 +180,7 @@ __wait_gsc_huc_load_completed(struct drm_i915_private *i915)
>
> if (need_to_wait &&
> wait_for(i915_sw_fence_done(&huc->delayed_load.fence), timeout_ms))
> - pr_warn(DRIVER_NAME "Timed out waiting for huc load via GSC!\n");
> + i915_warn(i915, "Timed out waiting for huc load via GSC!\n");
> }
>
> static struct mm_struct *get_selftest_mm(int u_pid_nr)
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✗ i915.CI.BAT: failure for drm/i915/selftests: Modernize printing in i915 selftests (rev5)
2026-09-24 12:01 [PATCH v4 0/7] drm/i915/selftests: Modernize printing in i915 selftests Krzysztof Karas
` (6 preceding siblings ...)
2026-09-24 12:01 ` [PATCH v4 7/7] drm/i915/selftests: Use i915_* prints in i915_selftest.c Krzysztof Karas
@ 2026-09-24 12:53 ` Patchwork
7 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-09-24 12:53 UTC (permalink / raw)
To: Krzysztof Karas; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 20460 bytes --]
== Series Details ==
Series: drm/i915/selftests: Modernize printing in i915 selftests (rev5)
URL : https://patchwork.freedesktop.org/series/171991/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_19214 -> Patchwork_171991v5
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_171991v5 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_171991v5, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/index.html
Participating hosts (38 -> 37)
------------------------------
Additional (1): bat-adls-6
Missing (2): bat-dg2-13 fi-glk-j4005
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_171991v5:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live:
- fi-kbl-x1275: [PASS][1] -> [ABORT][2] +1 other test abort
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-kbl-x1275/igt@i915_selftest@live.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-kbl-x1275/igt@i915_selftest@live.html
- bat-adlp-11: [PASS][3] -> [ABORT][4] +1 other test abort
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-adlp-11/igt@i915_selftest@live.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adlp-11/igt@i915_selftest@live.html
- fi-hsw-4770: [PASS][5] -> [ABORT][6] +1 other test abort
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-hsw-4770/igt@i915_selftest@live.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-hsw-4770/igt@i915_selftest@live.html
- fi-cfl-8109u: [PASS][7] -> [ABORT][8] +1 other test abort
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-cfl-8109u/igt@i915_selftest@live.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-cfl-8109u/igt@i915_selftest@live.html
- fi-kbl-8809g: [PASS][9] -> [ABORT][10] +1 other test abort
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-kbl-8809g/igt@i915_selftest@live.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-kbl-8809g/igt@i915_selftest@live.html
- fi-ivb-3770: [PASS][11] -> [ABORT][12] +1 other test abort
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-ivb-3770/igt@i915_selftest@live.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-ivb-3770/igt@i915_selftest@live.html
- bat-mtlp-8: [PASS][13] -> [ABORT][14] +1 other test abort
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-mtlp-8/igt@i915_selftest@live.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-mtlp-8/igt@i915_selftest@live.html
- bat-dg1-6: [PASS][15] -> [ABORT][16] +1 other test abort
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-dg1-6/igt@i915_selftest@live.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-dg1-6/igt@i915_selftest@live.html
- fi-elk-e7500: [PASS][17] -> [ABORT][18] +1 other test abort
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-elk-e7500/igt@i915_selftest@live.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-elk-e7500/igt@i915_selftest@live.html
- bat-adls-6: NOTRUN -> [ABORT][19] +1 other test abort
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adls-6/igt@i915_selftest@live.html
- fi-ilk-650: [PASS][20] -> [ABORT][21] +1 other test abort
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-ilk-650/igt@i915_selftest@live.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-ilk-650/igt@i915_selftest@live.html
- fi-tgl-1115g4: [PASS][22] -> [ABORT][23] +1 other test abort
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-tgl-1115g4/igt@i915_selftest@live.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-tgl-1115g4/igt@i915_selftest@live.html
- fi-bsw-n3050: [PASS][24] -> [ABORT][25] +1 other test abort
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-bsw-n3050/igt@i915_selftest@live.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-bsw-n3050/igt@i915_selftest@live.html
- bat-adlp-6: [PASS][26] -> [ABORT][27] +1 other test abort
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-adlp-6/igt@i915_selftest@live.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adlp-6/igt@i915_selftest@live.html
- fi-skl-6600u: [PASS][28] -> [ABORT][29] +1 other test abort
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-skl-6600u/igt@i915_selftest@live.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-skl-6600u/igt@i915_selftest@live.html
- bat-arlh-3: [PASS][30] -> [ABORT][31] +1 other test abort
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-arlh-3/igt@i915_selftest@live.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-arlh-3/igt@i915_selftest@live.html
- fi-pnv-d510: [PASS][32] -> [ABORT][33] +1 other test abort
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-pnv-d510/igt@i915_selftest@live.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-pnv-d510/igt@i915_selftest@live.html
- bat-adlp-9: [PASS][34] -> [ABORT][35] +1 other test abort
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-adlp-9/igt@i915_selftest@live.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adlp-9/igt@i915_selftest@live.html
- bat-twl-2: [PASS][36] -> [ABORT][37] +1 other test abort
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-twl-2/igt@i915_selftest@live.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-twl-2/igt@i915_selftest@live.html
- bat-rpls-4: [PASS][38] -> [ABORT][39] +1 other test abort
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-rpls-4/igt@i915_selftest@live.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-rpls-4/igt@i915_selftest@live.html
- fi-kbl-7567u: [PASS][40] -> [ABORT][41] +1 other test abort
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-kbl-7567u/igt@i915_selftest@live.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-kbl-7567u/igt@i915_selftest@live.html
- fi-cfl-8700k: [PASS][42] -> [ABORT][43] +1 other test abort
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-cfl-8700k/igt@i915_selftest@live.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-cfl-8700k/igt@i915_selftest@live.html
- bat-twl-1: [PASS][44] -> [ABORT][45] +1 other test abort
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-twl-1/igt@i915_selftest@live.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-twl-1/igt@i915_selftest@live.html
- bat-jsl-5: [PASS][46] -> [ABORT][47] +1 other test abort
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-jsl-5/igt@i915_selftest@live.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-jsl-5/igt@i915_selftest@live.html
* igt@i915_selftest@live@gt_pm:
- fi-tgl-1115g4: [PASS][48] -> [DMESG-WARN][49]
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-tgl-1115g4/igt@i915_selftest@live@gt_pm.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-tgl-1115g4/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@gt_tlb:
- bat-adlp-9: [PASS][50] -> [DMESG-WARN][51]
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-adlp-9/igt@i915_selftest@live@gt_tlb.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adlp-9/igt@i915_selftest@live@gt_tlb.html
- fi-kbl-7567u: [PASS][52] -> [DMESG-WARN][53]
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-kbl-7567u/igt@i915_selftest@live@gt_tlb.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-kbl-7567u/igt@i915_selftest@live@gt_tlb.html
- fi-cfl-8700k: [PASS][54] -> [DMESG-WARN][55]
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-cfl-8700k/igt@i915_selftest@live@gt_tlb.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-cfl-8700k/igt@i915_selftest@live@gt_tlb.html
- fi-bsw-nick: [PASS][56] -> [DMESG-WARN][57]
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-bsw-nick/igt@i915_selftest@live@gt_tlb.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-bsw-nick/igt@i915_selftest@live@gt_tlb.html
- fi-cfl-guc: [PASS][58] -> [DMESG-WARN][59]
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-cfl-guc/igt@i915_selftest@live@gt_tlb.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-cfl-guc/igt@i915_selftest@live@gt_tlb.html
- bat-adlp-11: [PASS][60] -> [DMESG-WARN][61]
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-adlp-11/igt@i915_selftest@live@gt_tlb.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adlp-11/igt@i915_selftest@live@gt_tlb.html
- bat-dg1-6: [PASS][62] -> [DMESG-WARN][63]
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-dg1-6/igt@i915_selftest@live@gt_tlb.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-dg1-6/igt@i915_selftest@live@gt_tlb.html
- fi-bsw-n3050: [PASS][64] -> [DMESG-WARN][65]
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-bsw-n3050/igt@i915_selftest@live@gt_tlb.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-bsw-n3050/igt@i915_selftest@live@gt_tlb.html
- bat-adlp-6: [PASS][66] -> [DMESG-WARN][67]
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-adlp-6/igt@i915_selftest@live@gt_tlb.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adlp-6/igt@i915_selftest@live@gt_tlb.html
* igt@i915_selftest@live@requests:
- bat-apl-1: [PASS][68] -> [ABORT][69] +1 other test abort
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-apl-1/igt@i915_selftest@live@requests.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-apl-1/igt@i915_selftest@live@requests.html
- bat-dg2-14: [PASS][70] -> [ABORT][71]
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-dg2-14/igt@i915_selftest@live@requests.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-dg2-14/igt@i915_selftest@live@requests.html
- fi-bsw-nick: [PASS][72] -> [ABORT][73] +1 other test abort
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-bsw-nick/igt@i915_selftest@live@requests.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-bsw-nick/igt@i915_selftest@live@requests.html
- bat-kbl-2: [PASS][74] -> [ABORT][75] +1 other test abort
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-kbl-2/igt@i915_selftest@live@requests.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-kbl-2/igt@i915_selftest@live@requests.html
- bat-rplp-1: [PASS][76] -> [ABORT][77] +1 other test abort
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-rplp-1/igt@i915_selftest@live@requests.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-rplp-1/igt@i915_selftest@live@requests.html
- bat-arlh-2: [PASS][78] -> [ABORT][79] +1 other test abort
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-arlh-2/igt@i915_selftest@live@requests.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-arlh-2/igt@i915_selftest@live@requests.html
- fi-rkl-11600: [PASS][80] -> [ABORT][81] +1 other test abort
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-rkl-11600/igt@i915_selftest@live@requests.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-rkl-11600/igt@i915_selftest@live@requests.html
- bat-atsm-1: [PASS][82] -> [ABORT][83]
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-atsm-1/igt@i915_selftest@live@requests.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-atsm-1/igt@i915_selftest@live@requests.html
- fi-cfl-guc: [PASS][84] -> [ABORT][85] +1 other test abort
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/fi-cfl-guc/igt@i915_selftest@live@requests.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/fi-cfl-guc/igt@i915_selftest@live@requests.html
- bat-mtlp-9: [PASS][86] -> [ABORT][87] +1 other test abort
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-mtlp-9/igt@i915_selftest@live@requests.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-mtlp-9/igt@i915_selftest@live@requests.html
- bat-arls-6: [PASS][88] -> [ABORT][89] +1 other test abort
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-arls-6/igt@i915_selftest@live@requests.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-arls-6/igt@i915_selftest@live@requests.html
- bat-dg2-9: [PASS][90] -> [ABORT][91]
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-dg2-9/igt@i915_selftest@live@requests.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-dg2-9/igt@i915_selftest@live@requests.html
- bat-dg2-8: [PASS][92] -> [ABORT][93]
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-dg2-8/igt@i915_selftest@live@requests.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-dg2-8/igt@i915_selftest@live@requests.html
Known issues
------------
Here are the changes found in Patchwork_171991v5 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_auth@basic-auth:
- bat-adlp-6: [PASS][94] -> [DMESG-WARN][95] ([i915#15673])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-adlp-6/igt@core_auth@basic-auth.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adlp-6/igt@core_auth@basic-auth.html
* igt@gem_lmem_swapping@verify-random:
- bat-adls-6: NOTRUN -> [SKIP][96] ([i915#4613]) +3 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adls-6/igt@gem_lmem_swapping@verify-random.html
* igt@gem_tiled_pread_basic@basic:
- bat-adls-6: NOTRUN -> [SKIP][97] ([i915#15656])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adls-6/igt@gem_tiled_pread_basic@basic.html
* igt@i915_selftest@live:
- bat-dg2-8: [PASS][98] -> [ABORT][99] ([i915#17063])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-dg2-8/igt@i915_selftest@live.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-dg2-8/igt@i915_selftest@live.html
- bat-dg2-14: [PASS][100] -> [ABORT][101] ([i915#17063])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-dg2-14/igt@i915_selftest@live.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-dg2-14/igt@i915_selftest@live.html
- bat-atsm-1: [PASS][102] -> [ABORT][103] ([i915#14564])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-atsm-1/igt@i915_selftest@live.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-atsm-1/igt@i915_selftest@live.html
- bat-dg2-9: [PASS][104] -> [ABORT][105] ([i915#17063])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-dg2-9/igt@i915_selftest@live.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-dg2-9/igt@i915_selftest@live.html
* igt@intel_hwmon@hwmon-read:
- bat-adls-6: NOTRUN -> [SKIP][106] ([i915#7707]) +1 other test skip
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adls-6/igt@intel_hwmon@hwmon-read.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-adls-6: NOTRUN -> [SKIP][107] ([i915#4103]) +1 other test skip
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adls-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-adls-6: NOTRUN -> [SKIP][108] ([i915#16361])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adls-6/igt@kms_dsc@dsc-basic.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-adls-6: NOTRUN -> [SKIP][109]
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adls-6/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_pm_backlight@basic-brightness:
- bat-adls-6: NOTRUN -> [SKIP][110] ([i915#5354])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adls-6/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_psr@psr-primary-mmap-gtt:
- bat-adls-6: NOTRUN -> [SKIP][111] ([i915#1072] / [i915#9732]) +3 other tests skip
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adls-6/igt@kms_psr@psr-primary-mmap-gtt.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-adls-6: NOTRUN -> [SKIP][112] ([i915#3555])
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adls-6/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-read:
- bat-adls-6: NOTRUN -> [SKIP][113] ([i915#3291]) +2 other tests skip
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adls-6/igt@prime_vgem@basic-fence-read.html
#### Possible fixes ####
* igt@core_debugfs@read-all-entries:
- bat-adlp-6: [DMESG-WARN][114] ([i915#15673]) -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19214/bat-adlp-6/igt@core_debugfs@read-all-entries.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/bat-adlp-6/igt@core_debugfs@read-all-entries.html
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#14564]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14564
[i915#15656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15656
[i915#15673]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15673
[i915#16361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16361
[i915#17063]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/17063
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
Build changes
-------------
* Linux: CI_DRM_19214 -> Patchwork_171991v5
CI-20190529: 20190529
CI_DRM_19214: a61293e633b18c618fd2f7d508cf558db0f42227 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_9111: 4aeabf104b136437d0ccc57caf32a752587d595c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_171991v5: a61293e633b18c618fd2f7d508cf558db0f42227 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_171991v5/index.html
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