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From: Radim Krcmar <rkrcmar@qti.qualcomm.com>
To: Yu-Chien Peter Lin <peter.lin@sifive.com>,
	"opensbi@lists.infradead.org" <opensbi@lists.infradead.org>
Cc: "zong.li@sifive.com" <zong.li@sifive.com>,
	"greentime.hu@sifive.com" <greentime.hu@sifive.com>,
	"anup@brainfault.org" <anup@brainfault.org>,
	"scott@riscstar.com" <scott@riscstar.com>,
	"conor@kernel.org" <conor@kernel.org>,
	"dave.patel@riscstar.com" <dave.patel@riscstar.com>,
	"raymond.mao@riscstar.com" <raymond.mao@riscstar.com>,
	"robin.randhawa@sifive.com" <robin.randhawa@sifive.com>,
	"samuel.holland@sifive.com" <samuel.holland@sifive.com>,
	"pawandeep.oza@oss.qualcomm.com" <pawandeep.oza@oss.qualcomm.com>,
	"krzk@kernel.org" <krzk@kernel.org>,
	opensbi <opensbi-bounces@lists.infradead.org>
Subject: Re: [PATCH v2 6/9] lib: sbi_domain_context: add slwid to per-domain S-mode context
Date: Fri, 16 Oct 2026 17:08:14 +0000	[thread overview]
Message-ID: <DM6FF21LWS2G.2ROYH5Q2IQWOL@qti.qualcomm.com> (raw)
In-Reply-To: <20260817090503.2104998-7-peter.lin@sifive.com>

2026-08-17T17:05:00+08:00, Yu-Chien Peter Lin <peter.lin@sifive.com>:
> slwid is the S-mode CSR that controls U-mode's World ID. Since
> each domain may run different U-mode workloads with different
> WID isolation requirements, slwid must be part of the per-domain
> S-mode context.
>
> Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
> ---
> diff --git a/lib/sbi/sbi_domain_context.c b/lib/sbi/sbi_domain_context.c
> @@ -145,6 +147,17 @@ static int switch_to_next_domain_context(struct hart_context *ctx,
>  		ctx->senvcfg	= csr_swap(CSR_SENVCFG, dom_ctx->senvcfg);
>  	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSQOSID))
>  		ctx->srmcfg	= csr_swap(CSR_SRMCFG, dom_ctx->srmcfg);
> +	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSWID)) {
> +		/*
> +		 * Temporarily enable Sswid so slwid is accessible for
> +		 * swap. The target domain's mwiddeleg is restored by
> +		 * sbi_hart_protection_reconfigure() below.
> +		 */
> +		csr_write(CSR_MWIDDELEG, ~0UL);
> +		if (csr_read(CSR_MWIDDELEG))

The slow verification isn't necessary on each switch -- either check the
hart capabilities during initialization and mask widdeleg from DT, or
just trust the DT.
We know what we've written to mwiddeleg for the current domain, so we
could just read it from context.

> +			ctx->slwid = csr_swap(CSR_SLWID, dom_ctx->slwid);
> +		csr_write(CSR_MWIDDELEG, 0);

Setting mwiddeleg to 0 is dangerous, because the specification isn't
clear whether zeroing mwiddleg and hence disabling Sslwid preserves
slwid CSR.  In any case, there is no reason to write 0 here, because we
can be writing the correct mwiddeleg.

To optimize a bit, I think we only need 2 CSR accesses to handle
delegation:

  if (ctx->mwiddeleg) {
    ctx->slwid = csr_swap(CSR_SLWID, dom_ctx->slwid);
    csr_write(CSR_MWIDDELEG, dom_ctx->mwiddeleg);
  } else if (dom_ctx->mwiddeleg) {
    csr_write(CSR_MWIDDELEG, dom_ctx->mwiddeleg);
    csr_write(CSR_SLWID, dom_ctx->slwid);
  }

Feel free to keep mwiddeleg write in sbi_hart_protection_reconfigure,
but then please consider moving the slwid logic there as well.
The current split seems suboptimal.

Thanks.
-- 
opensbi mailing list
opensbi@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/opensbi

  parent reply	other threads:[~2026-10-16 17:08 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-17  9:04 [PATCH v2 0/9] Add RISC-V Worlds ISA support to OpenSBI Yu-Chien Peter Lin
2026-08-17  9:04 ` [PATCH v2 1/9] lib: sbi_hart: detect RISC-V Worlds ISA extensions Yu-Chien Peter Lin
2026-09-03 16:50   ` Pawandeep Oza
2026-08-17  9:04 ` [PATCH v2 2/9] lib: utils: fdt_helper: parse RISC-V Worlds per-hart WID properties Yu-Chien Peter Lin
2026-09-03 21:15   ` Pawandeep Oza
2026-09-24  7:33     ` Yu-Chien Peter Lin
2026-09-25 18:26       ` Pawandeep Oza
2026-08-17  9:04 ` [PATCH v2 3/9] lib: fdt_domain: parse domain " Yu-Chien Peter Lin
2026-09-03 21:18   ` Pawandeep Oza
2026-09-24  7:55     ` Yu-Chien Peter Lin
2026-08-17  9:04 ` [PATCH v2 4/9] lib: sbi_hart: lock mwid CSR for RoT immutability Yu-Chien Peter Lin
2026-09-03 21:20   ` Pawandeep Oza
2026-08-17  9:04 ` [PATCH v2 5/9] lib: sbi_hart: add WID protection mechanism Yu-Chien Peter Lin
2026-08-18  2:39   ` Yu-Chien Peter Lin
2026-09-03 21:52   ` Pawandeep Oza
2026-09-24  8:24     ` Yu-Chien Peter Lin
2026-10-16 17:24   ` Radim Krcmar
2026-10-16 18:33     ` Radim Krcmar
2026-08-17  9:05 ` [PATCH v2 6/9] lib: sbi_domain_context: add slwid to per-domain S-mode context Yu-Chien Peter Lin
2026-09-03 21:59   ` Pawandeep Oza
2026-10-16 17:08   ` Radim Krcmar [this message]
2026-08-17  9:05 ` [PATCH v2 7/9] include: sbi_types: add PRIx64 format macro Yu-Chien Peter Lin
2026-09-03 21:59   ` Pawandeep Oza
2026-08-17  9:05 ` [PATCH v2 8/9] lib: sbi: display World ID configuration at boot Yu-Chien Peter Lin
2026-09-03 22:00   ` Pawandeep Oza
2026-08-17  9:05 ` [PATCH v2 9/9] docs: document WID DT properties Yu-Chien Peter Lin
2026-09-03 22:01   ` Pawandeep Oza
2026-09-28  8:35   ` Anup Patel
2026-09-29 13:33     ` Yu-Chien Peter Lin
2026-09-28 11:30   ` Krzysztof Kozlowski
2026-09-29 14:19     ` Yu-Chien Peter Lin
2026-09-28 11:33 ` [PATCH v2 0/9] Add RISC-V Worlds ISA support to OpenSBI Krzysztof Kozlowski
2026-09-29 14:29   ` Yu-Chien Peter Lin

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