[Qemu-devel] [4622] Fix for 32-bit MIPS.

[Thiemo Seufer <ths@networkno.de>]

Revision: 4622
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4622
Author:   ths
Date:     2008-05-30 00:12:52 +0000 (Fri, 30 May 2008)

Log Message:
-----------
Fix for 32-bit MIPS.

Modified Paths:
--------------
    trunk/target-mips/translate.c

Modified: trunk/target-mips/translate.c
===================================================================
--- trunk/target-mips/translate.c	2008-05-29 18:29:05 UTC (rev 4621)
+++ trunk/target-mips/translate.c	2008-05-30 00:12:52 UTC (rev 4622)
@@ -1904,15 +1904,16 @@
             {
                 TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I64);
                 TCGv r_tmp2 = tcg_temp_new(TCG_TYPE_I64);
+                TCGv r_tmp3 = tcg_temp_new(TCG_TYPE_I64);
 
-                tcg_gen_ext32s_tl(cpu_T[0], cpu_T[0]);
-                tcg_gen_ext32s_tl(cpu_T[1], cpu_T[1]);
-                tcg_gen_div_i64(r_tmp1, cpu_T[0], cpu_T[1]);
-                tcg_gen_rem_i64(r_tmp2, cpu_T[0], cpu_T[1]);
-                tcg_gen_ext32s_tl(r_tmp1, r_tmp1);
-                tcg_gen_ext32s_tl(r_tmp2, r_tmp2);
-                gen_store_LO(r_tmp1, 0);
-                gen_store_HI(r_tmp2, 0);
+                tcg_gen_ext_tl_i64(r_tmp1, cpu_T[0]);
+                tcg_gen_ext_tl_i64(r_tmp2, cpu_T[1]);
+                tcg_gen_div_i64(r_tmp3, r_tmp1, r_tmp2);
+                tcg_gen_rem_i64(r_tmp2, r_tmp1, r_tmp2);
+                tcg_gen_trunc_i64_tl(cpu_T[0], r_tmp3);
+                tcg_gen_trunc_i64_tl(cpu_T[1], r_tmp2);
+                gen_store_LO(cpu_T[0], 0);
+                gen_store_HI(cpu_T[1], 0);
             }
             gen_set_label(l1);
         }