* [Qemu-devel] [6368] USB OHCI: add support for big endian targets
@ 2009-01-18 20:56 Aurelien Jarno
0 siblings, 0 replies; only message in thread
From: Aurelien Jarno @ 2009-01-18 20:56 UTC (permalink / raw)
To: qemu-devel
Revision: 6368
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6368
Author: aurel32
Date: 2009-01-18 20:56:30 +0000 (Sun, 18 Jan 2009)
Log Message:
-----------
USB OHCI: add support for big endian targets
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Modified Paths:
--------------
trunk/hw/usb-ohci.c
Modified: trunk/hw/usb-ohci.c
===================================================================
--- trunk/hw/usb-ohci.c 2009-01-18 14:28:20 UTC (rev 6367)
+++ trunk/hw/usb-ohci.c 2009-01-18 20:56:30 UTC (rev 6368)
@@ -1360,103 +1360,135 @@
static uint32_t ohci_mem_read(void *ptr, target_phys_addr_t addr)
{
OHCIState *ohci = ptr;
+ uint32_t retval;
/* Only aligned reads are allowed on OHCI */
if (addr & 3) {
fprintf(stderr, "usb-ohci: Mis-aligned read\n");
return 0xffffffff;
- }
-
- if (addr >= 0x54 && addr < 0x54 + ohci->num_ports * 4) {
+ } else if (addr >= 0x54 && addr < 0x54 + ohci->num_ports * 4) {
/* HcRhPortStatus */
- return ohci->rhport[(addr - 0x54) >> 2].ctrl | OHCI_PORT_PPS;
- }
+ retval = ohci->rhport[(addr - 0x54) >> 2].ctrl | OHCI_PORT_PPS;
+ } else {
+ switch (addr >> 2) {
+ case 0: /* HcRevision */
+ retval = 0x10;
+ break;
- switch (addr >> 2) {
- case 0: /* HcRevision */
- return 0x10;
+ case 1: /* HcControl */
+ retval = ohci->ctl;
+ break;
- case 1: /* HcControl */
- return ohci->ctl;
+ case 2: /* HcCommandStatus */
+ retval = ohci->status;
+ break;
- case 2: /* HcCommandStatus */
- return ohci->status;
+ case 3: /* HcInterruptStatus */
+ retval = ohci->intr_status;
+ break;
- case 3: /* HcInterruptStatus */
- return ohci->intr_status;
+ case 4: /* HcInterruptEnable */
+ case 5: /* HcInterruptDisable */
+ retval = ohci->intr;
+ break;
- case 4: /* HcInterruptEnable */
- case 5: /* HcInterruptDisable */
- return ohci->intr;
+ case 6: /* HcHCCA */
+ retval = ohci->hcca;
+ break;
- case 6: /* HcHCCA */
- return ohci->hcca;
+ case 7: /* HcPeriodCurrentED */
+ retval = ohci->per_cur;
+ break;
- case 7: /* HcPeriodCurrentED */
- return ohci->per_cur;
+ case 8: /* HcControlHeadED */
+ retval = ohci->ctrl_head;
+ break;
- case 8: /* HcControlHeadED */
- return ohci->ctrl_head;
+ case 9: /* HcControlCurrentED */
+ retval = ohci->ctrl_cur;
+ break;
- case 9: /* HcControlCurrentED */
- return ohci->ctrl_cur;
+ case 10: /* HcBulkHeadED */
+ retval = ohci->bulk_head;
+ break;
- case 10: /* HcBulkHeadED */
- return ohci->bulk_head;
+ case 11: /* HcBulkCurrentED */
+ retval = ohci->bulk_cur;
+ break;
- case 11: /* HcBulkCurrentED */
- return ohci->bulk_cur;
+ case 12: /* HcDoneHead */
+ retval = ohci->done;
+ break;
- case 12: /* HcDoneHead */
- return ohci->done;
+ case 13: /* HcFmInterretval */
+ retval = (ohci->fit << 31) | (ohci->fsmps << 16) | (ohci->fi);
+ break;
- case 13: /* HcFmInterval */
- return (ohci->fit << 31) | (ohci->fsmps << 16) | (ohci->fi);
+ case 14: /* HcFmRemaining */
+ retval = ohci_get_frame_remaining(ohci);
+ break;
- case 14: /* HcFmRemaining */
- return ohci_get_frame_remaining(ohci);
+ case 15: /* HcFmNumber */
+ retval = ohci->frame_number;
+ break;
- case 15: /* HcFmNumber */
- return ohci->frame_number;
+ case 16: /* HcPeriodicStart */
+ retval = ohci->pstart;
+ break;
- case 16: /* HcPeriodicStart */
- return ohci->pstart;
+ case 17: /* HcLSThreshold */
+ retval = ohci->lst;
+ break;
- case 17: /* HcLSThreshold */
- return ohci->lst;
+ case 18: /* HcRhDescriptorA */
+ retval = ohci->rhdesc_a;
+ break;
- case 18: /* HcRhDescriptorA */
- return ohci->rhdesc_a;
+ case 19: /* HcRhDescriptorB */
+ retval = ohci->rhdesc_b;
+ break;
- case 19: /* HcRhDescriptorB */
- return ohci->rhdesc_b;
+ case 20: /* HcRhStatus */
+ retval = ohci->rhstatus;
+ break;
- case 20: /* HcRhStatus */
- return ohci->rhstatus;
+ /* PXA27x specific registers */
+ case 24: /* HcStatus */
+ retval = ohci->hstatus & ohci->hmask;
+ break;
- /* PXA27x specific registers */
- case 24: /* HcStatus */
- return ohci->hstatus & ohci->hmask;
+ case 25: /* HcHReset */
+ retval = ohci->hreset;
+ break;
- case 25: /* HcHReset */
- return ohci->hreset;
+ case 26: /* HcHInterruptEnable */
+ retval = ohci->hmask;
+ break;
- case 26: /* HcHInterruptEnable */
- return ohci->hmask;
+ case 27: /* HcHInterruptTest */
+ retval = ohci->htest;
+ break;
- case 27: /* HcHInterruptTest */
- return ohci->htest;
+ default:
+ fprintf(stderr, "ohci_read: Bad offset %x\n", (int)addr);
+ retval = 0xffffffff;
+ }
+ }
- default:
- fprintf(stderr, "ohci_read: Bad offset %x\n", (int)addr);
- return 0xffffffff;
- }
+#ifdef TARGET_WORDS_BIGENDIAN
+ retval = bswap32(retval);
+#endif
+ return retval;
}
static void ohci_mem_write(void *ptr, target_phys_addr_t addr, uint32_t val)
{
OHCIState *ohci = ptr;
+#ifdef TARGET_WORDS_BIGENDIAN
+ val = bswap32(val);
+#endif
+
/* Only aligned reads are allowed on OHCI */
if (addr & 3) {
fprintf(stderr, "usb-ohci: Mis-aligned write\n");
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2009-01-18 20:56 UTC | newest]
Thread overview: (only message) (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2009-01-18 20:56 [Qemu-devel] [6368] USB OHCI: add support for big endian targets Aurelien Jarno
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.