All of lore.kernel.org
 help / color / mirror / Atom feed
* [Qemu-devel] [6500] Implement FFXSR (Alexander Graf)
@ 2009-02-02 17:10 Anthony Liguori
  0 siblings, 0 replies; only message in thread
From: Anthony Liguori @ 2009-02-02 17:10 UTC (permalink / raw)
  To: qemu-devel

Revision: 6500
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6500
Author:   aliguori
Date:     2009-02-02 17:10:52 +0000 (Mon, 02 Feb 2009)

Log Message:
-----------
Implement FFXSR (Alexander Graf)

Newer AMD CPUs have the FFXSR capability. This leaves out XMM
register in FXSAVE/FXRESTORE when in CPL=0 and 64-bit mode.

This is required for Hyper-V.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>

Modified Paths:
--------------
    trunk/target-i386/op_helper.c

Modified: trunk/target-i386/op_helper.c
===================================================================
--- trunk/target-i386/op_helper.c	2009-02-02 15:58:54 UTC (rev 6499)
+++ trunk/target-i386/op_helper.c	2009-02-02 17:10:52 UTC (rev 6500)
@@ -3030,6 +3030,8 @@
                 update_mask |= MSR_EFER_NXE;
             if (env->cpuid_ext3_features & CPUID_EXT3_SVM)
                 update_mask |= MSR_EFER_SVME;
+            if (env->cpuid_ext2_features & CPUID_EXT2_FFXSR)
+                update_mask |= MSR_EFER_FFXSR;
             cpu_load_efer(env, (env->efer & ~update_mask) |
                           (val & update_mask));
         }
@@ -4352,10 +4354,15 @@
         else
             nb_xmm_regs = 8;
         addr = ptr + 0xa0;
-        for(i = 0; i < nb_xmm_regs; i++) {
-            stq(addr, env->xmm_regs[i].XMM_Q(0));
-            stq(addr + 8, env->xmm_regs[i].XMM_Q(1));
-            addr += 16;
+        /* Fast FXSAVE leaves out the XMM registers */
+        if (!(env->efer & MSR_EFER_FFXSR)
+          || (env->hflags & HF_CPL_MASK)
+          || !(env->hflags & HF_LMA_MASK)) {
+            for(i = 0; i < nb_xmm_regs; i++) {
+                stq(addr, env->xmm_regs[i].XMM_Q(0));
+                stq(addr + 8, env->xmm_regs[i].XMM_Q(1));
+                addr += 16;
+            }
         }
     }
 }
@@ -4392,10 +4399,15 @@
         else
             nb_xmm_regs = 8;
         addr = ptr + 0xa0;
-        for(i = 0; i < nb_xmm_regs; i++) {
-            env->xmm_regs[i].XMM_Q(0) = ldq(addr);
-            env->xmm_regs[i].XMM_Q(1) = ldq(addr + 8);
-            addr += 16;
+        /* Fast FXRESTORE leaves out the XMM registers */
+        if (!(env->efer & MSR_EFER_FFXSR)
+          || (env->hflags & HF_CPL_MASK)
+          || !(env->hflags & HF_LMA_MASK)) {
+            for(i = 0; i < nb_xmm_regs; i++) {
+                env->xmm_regs[i].XMM_Q(0) = ldq(addr);
+                env->xmm_regs[i].XMM_Q(1) = ldq(addr + 8);
+                addr += 16;
+            }
         }
     }
 }

^ permalink raw reply	[flat|nested] only message in thread

only message in thread, other threads:[~2009-02-02 17:10 UTC | newest]

Thread overview: (only message) (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2009-02-02 17:10 [Qemu-devel] [6500] Implement FFXSR (Alexander Graf) Anthony Liguori

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.