From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
To: Andrew Lunn <andrew@lunn.ch>, Heiner Kallweit <hkallweit1@gmail.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
netdev@vger.kernel.org, Paolo Abeni <pabeni@redhat.com>
Subject: [PATCH net-next 01/11] net: stmmac: mdio: provide address register formatter
Date: Wed, 03 Sep 2025 13:39:18 +0100 [thread overview]
Message-ID: <E1utmli-00000001s00-49Uk@rmk-PC.armlinux.org.uk> (raw)
In-Reply-To: <aLg24RZ6hodr711j@shell.armlinux.org.uk>
Rather than duplicating the logic for filling the PA (MDIO address),
GR (MDIO register/devad), CR (clock range) and GB (busy) fields of the
address register in four locations, provide a helper to do this.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
.../net/ethernet/stmicro/stmmac/stmmac_mdio.c | 53 +++++++++----------
1 file changed, 26 insertions(+), 27 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
index 0a302b711bc2..3106fef6eed8 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
@@ -229,6 +229,24 @@ static int stmmac_xgmac2_mdio_write_c45(struct mii_bus *bus, int phyaddr,
phydata);
}
+/**
+ * stmmac_mdio_format_addr() - format the address register
+ * @priv: struct stmmac_priv pointer
+ * @pa: 5-bit MDIO package address
+ * @gr: 5-bit MDIO register address (C22) or MDIO device address (C45)
+ */
+static u32 stmmac_mdio_format_addr(struct stmmac_priv *priv,
+ unsigned int pa, unsigned int gr)
+{
+ const struct mii_regs *mii_regs = &priv->hw->mii;
+
+ return ((pa << mii_regs->addr_shift) & mii_regs->addr_mask) |
+ ((gr << mii_regs->reg_shift) & mii_regs->reg_mask) |
+ ((priv->clk_csr << mii_regs->clk_csr_shift) &
+ mii_regs->clk_csr_mask) |
+ MII_BUSY;
+}
+
static int stmmac_mdio_read(struct stmmac_priv *priv, int data, u32 value)
{
unsigned int mii_address = priv->hw->mii.addr;
@@ -263,18 +281,14 @@ static int stmmac_mdio_read(struct stmmac_priv *priv, int data, u32 value)
static int stmmac_mdio_read_c22(struct mii_bus *bus, int phyaddr, int phyreg)
{
struct stmmac_priv *priv = netdev_priv(bus->priv);
- u32 value = MII_BUSY;
int data = 0;
+ u32 value;
data = pm_runtime_resume_and_get(priv->device);
if (data < 0)
return data;
- value |= (phyaddr << priv->hw->mii.addr_shift)
- & priv->hw->mii.addr_mask;
- value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask;
- value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift)
- & priv->hw->mii.clk_csr_mask;
+ value = stmmac_mdio_format_addr(priv, phyaddr, phyreg);
if (priv->plat->has_gmac4)
value |= MII_GMAC4_READ;
@@ -300,20 +314,16 @@ static int stmmac_mdio_read_c45(struct mii_bus *bus, int phyaddr, int devad,
int phyreg)
{
struct stmmac_priv *priv = netdev_priv(bus->priv);
- u32 value = MII_BUSY;
int data = 0;
+ u32 value;
data = pm_runtime_resume_and_get(priv->device);
if (data < 0)
return data;
- value |= (phyaddr << priv->hw->mii.addr_shift)
- & priv->hw->mii.addr_mask;
- value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift)
- & priv->hw->mii.clk_csr_mask;
+ value = stmmac_mdio_format_addr(priv, phyaddr, devad);
value |= MII_GMAC4_READ;
value |= MII_GMAC4_C45E;
- value |= (devad << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask;
data |= phyreg << MII_GMAC4_REG_ADDR_SHIFT;
@@ -357,18 +367,13 @@ static int stmmac_mdio_write_c22(struct mii_bus *bus, int phyaddr, int phyreg,
{
struct stmmac_priv *priv = netdev_priv(bus->priv);
int ret, data = phydata;
- u32 value = MII_BUSY;
+ u32 value;
ret = pm_runtime_resume_and_get(priv->device);
if (ret < 0)
return ret;
- value |= (phyaddr << priv->hw->mii.addr_shift)
- & priv->hw->mii.addr_mask;
- value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask;
-
- value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift)
- & priv->hw->mii.clk_csr_mask;
+ value = stmmac_mdio_format_addr(priv, phyaddr, phyreg);
if (priv->plat->has_gmac4)
value |= MII_GMAC4_WRITE;
else
@@ -395,21 +400,15 @@ static int stmmac_mdio_write_c45(struct mii_bus *bus, int phyaddr,
{
struct stmmac_priv *priv = netdev_priv(bus->priv);
int ret, data = phydata;
- u32 value = MII_BUSY;
+ u32 value;
ret = pm_runtime_resume_and_get(priv->device);
if (ret < 0)
return ret;
- value |= (phyaddr << priv->hw->mii.addr_shift)
- & priv->hw->mii.addr_mask;
-
- value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift)
- & priv->hw->mii.clk_csr_mask;
-
+ value = stmmac_mdio_format_addr(priv, phyaddr, devad);
value |= MII_GMAC4_WRITE;
value |= MII_GMAC4_C45E;
- value |= (devad << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask;
data |= phyreg << MII_GMAC4_REG_ADDR_SHIFT;
--
2.47.2
next prev parent reply other threads:[~2025-09-03 14:48 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-03 12:38 [PATCH net-next 00/11] net: stmmac: mdio cleanups Russell King (Oracle)
2025-09-03 12:39 ` Russell King (Oracle) [this message]
2025-09-04 0:53 ` [PATCH net-next 01/11] net: stmmac: mdio: provide address register formatter Jakub Kicinski
2025-09-03 12:39 ` [PATCH net-next 02/11] net: stmmac: mdio: provide stmmac_mdio_wait() Russell King (Oracle)
2025-09-03 12:39 ` [PATCH net-next 03/11] net: stmmac: mdio: provide priv->gmii_address_bus_config Russell King (Oracle)
2025-09-03 12:39 ` [PATCH net-next 04/11] net: stmmac: mdio: move stmmac_mdio_format_addr() into read/write Russell King (Oracle)
2025-09-03 12:39 ` [PATCH net-next 05/11] net: stmmac: mdio: merge stmmac_mdio_read() and stmmac_mdio_write() Russell King (Oracle)
2025-09-03 12:39 ` [PATCH net-next 06/11] net: stmmac: mdio: move runtime PM into stmmac_mdio_access() Russell King (Oracle)
2025-09-03 12:39 ` [PATCH net-next 07/11] net: stmmac: mdio: improve mdio register field definitions Russell King (Oracle)
2025-09-03 12:39 ` [PATCH net-next 08/11] net: stmmac: mdio: move initialisation of priv->clk_csr to stmmac_mdio Russell King (Oracle)
2025-09-03 12:40 ` [PATCH net-next 09/11] net: stmmac: mdio: return clk_csr value from stmmac_clk_csr_set() Russell King (Oracle)
2025-09-03 12:40 ` [PATCH net-next 10/11] net: stmmac: mdio: remove redundant clock rate tests Russell King (Oracle)
2025-09-03 12:40 ` [PATCH net-next 11/11] net: stmmac: use STMMAC_CSR_xxx definitions in platform glue Russell King (Oracle)
2025-09-03 13:04 ` [PATCH net-next 00/11] net: stmmac: mdio cleanups Russell King (Oracle)
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