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From: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
To: conor.dooley@microchip.com
Cc: devicetree@vger.kernel.org, damien.lemoal@wdc.com,
	aou@eecs.berkeley.edu, cyril.jean@microchip.com,
	david.abdurachmanov@gmail.com, daire.mcnamara@microchip.com,
	jassisinghbrar@gmail.com, j.neuschaefer@gmx.net,
	atish.patra@wdc.com, anup.patel@wdc.com, robh+dt@kernel.org,
	palmer@dabbelt.com, paul.walmsley@sifive.com,
	lewis.hanly@microchip.com, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v3 3/5] soc: add polarfire soc system controller
Date: Tue, 5 Jan 2021 23:14:02 +0100	[thread overview]
Message-ID: <X/TkquplML5INtZg@latitude> (raw)
In-Reply-To: <20201223163310.29122-1-conor.dooley@microchip.com>


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Hello,

On Wed, Dec 23, 2020 at 04:33:10PM +0000, conor.dooley@microchip.com wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> This driver provides an interface for other drivers to access the
> functions of the system controller on the Microchip PolarFire SoC.
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
[...]
> --- a/drivers/soc/Makefile
> +++ b/drivers/soc/Makefile
> @@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_GEMINI)	+= gemini/
>  obj-y				+= imx/
>  obj-$(CONFIG_ARCH_IXP4XX)	+= ixp4xx/
>  obj-$(CONFIG_SOC_XWAY)		+= lantiq/
> +obj-$(CONFIG_SOC_MICROCHIP_POLARFIRE)	+= microchip/

CONFIG_SOC_MICROCHIP_POLARFIRE is more specific than a flag guarding
the microchip directory should (intuitively) be (because there may be
Microchip SoCs that are not Microchip PolarFire). Fortunately, since
mpfs-sys-controller.o itself is guarded by CONFIG_POLARFIRE_SOC_SYS_CTRL,
using "obj-y += microchip/" here should work without a problem.


[...]
> +int mpfs_blocking_transaction(struct mpfs_sys_controller *mpfs_client, void *msg,
> +			      void *response, u16 response_size_bytes)
> +{
> +	int ret;
> +
> +	mpfs_client->response = response;
> +	mpfs_client->response_size_bytes = response_size_bytes;
> +
> +	mutex_lock_interruptible(&transaction_lock);
> +
> +	reinit_completion(&mpfs_client->c);
> +
> +	ret = mbox_send_message(mpfs_client->chan, msg);
> +	if (ret >= 0) {
> +		if (wait_for_completion_timeout(&mpfs_client->c, HZ)) {
> +			ret = 0;
> +		} else {
> +			ret = -ETIMEDOUT;
> +			dev_warn(mpfs_client->client.dev, "MPFS sys controller transaction timeout");

\n is missing

> +		}
> +	} else {
> +		dev_err(mpfs_client->client.dev,
> +			"mpfs sys controller transaction returned %d\r\n", ret);

\r\n is quite unusual and probably unnecessary in printk-style
functions, \n is enough.

> +	}
> +
> +	mutex_unlock(&transaction_lock);
> +
> +	return ret;
> +}
> +EXPORT_SYMBOL(mpfs_blocking_transaction);


Best regards,
Jonathan Neuschäfer

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WARNING: multiple messages have this Message-ID (diff)
From: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
To: conor.dooley@microchip.com
Cc: robh+dt@kernel.org, damien.lemoal@wdc.com,
	jassisinghbrar@gmail.com, aou@eecs.berkeley.edu,
	paul.walmsley@sifive.com, palmer@dabbelt.com,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	cyril.jean@microchip.com, david.abdurachmanov@gmail.com,
	daire.mcnamara@microchip.com, anup.patel@wdc.com,
	j.neuschaefer@gmx.net, atish.patra@wdc.com,
	lewis.hanly@microchip.com
Subject: Re: [PATCH v3 3/5] soc: add polarfire soc system controller
Date: Tue, 5 Jan 2021 23:14:02 +0100	[thread overview]
Message-ID: <X/TkquplML5INtZg@latitude> (raw)
In-Reply-To: <20201223163310.29122-1-conor.dooley@microchip.com>

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Hello,

On Wed, Dec 23, 2020 at 04:33:10PM +0000, conor.dooley@microchip.com wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> This driver provides an interface for other drivers to access the
> functions of the system controller on the Microchip PolarFire SoC.
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
[...]
> --- a/drivers/soc/Makefile
> +++ b/drivers/soc/Makefile
> @@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_GEMINI)	+= gemini/
>  obj-y				+= imx/
>  obj-$(CONFIG_ARCH_IXP4XX)	+= ixp4xx/
>  obj-$(CONFIG_SOC_XWAY)		+= lantiq/
> +obj-$(CONFIG_SOC_MICROCHIP_POLARFIRE)	+= microchip/

CONFIG_SOC_MICROCHIP_POLARFIRE is more specific than a flag guarding
the microchip directory should (intuitively) be (because there may be
Microchip SoCs that are not Microchip PolarFire). Fortunately, since
mpfs-sys-controller.o itself is guarded by CONFIG_POLARFIRE_SOC_SYS_CTRL,
using "obj-y += microchip/" here should work without a problem.


[...]
> +int mpfs_blocking_transaction(struct mpfs_sys_controller *mpfs_client, void *msg,
> +			      void *response, u16 response_size_bytes)
> +{
> +	int ret;
> +
> +	mpfs_client->response = response;
> +	mpfs_client->response_size_bytes = response_size_bytes;
> +
> +	mutex_lock_interruptible(&transaction_lock);
> +
> +	reinit_completion(&mpfs_client->c);
> +
> +	ret = mbox_send_message(mpfs_client->chan, msg);
> +	if (ret >= 0) {
> +		if (wait_for_completion_timeout(&mpfs_client->c, HZ)) {
> +			ret = 0;
> +		} else {
> +			ret = -ETIMEDOUT;
> +			dev_warn(mpfs_client->client.dev, "MPFS sys controller transaction timeout");

\n is missing

> +		}
> +	} else {
> +		dev_err(mpfs_client->client.dev,
> +			"mpfs sys controller transaction returned %d\r\n", ret);

\r\n is quite unusual and probably unnecessary in printk-style
functions, \n is enough.

> +	}
> +
> +	mutex_unlock(&transaction_lock);
> +
> +	return ret;
> +}
> +EXPORT_SYMBOL(mpfs_blocking_transaction);


Best regards,
Jonathan Neuschäfer

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  reply	other threads:[~2021-01-05 22:14 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-23 16:33 [PATCH v3 3/5] soc: add polarfire soc system controller conor.dooley
2020-12-23 16:33 ` conor.dooley
2021-01-05 22:14 ` Jonathan Neuschäfer [this message]
2021-01-05 22:14   ` Jonathan Neuschäfer

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