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From: Conor Dooley <conor@kernel.org>
To: Evan Green <evan@rivosinc.com>
Cc: Palmer Dabbelt <palmer@rivosinc.com>,
	heiko@sntech.de, slewis@rivosinc.com, vineetg@rivosinc.com,
	Albert Ou <aou@eecs.berkeley.edu>,
	Andrew Bresticker <abrestic@rivosinc.com>,
	Andrew Jones <ajones@ventanamicro.com>,
	Anup Patel <apatel@ventanamicro.com>,
	Arnd Bergmann <arnd@arndb.de>, Atish Patra <atishp@rivosinc.com>,
	Bagas Sanjaya <bagasdotme@gmail.com>,
	Celeste Liu <coelacanthus@outlook.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Guo Ren <guoren@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
	Niklas Cassel <niklas.cassel@wdc.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Randy Dunlap <rdunlap@infradead.org>,
	Ruizhe Pan <c141028@gmail.com>,
	Sunil V L <sunilvl@ventanamicro.com>,
	Tobias Klauser <tklauser@distanz.ch>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v3 2/7] RISC-V: Add a syscall for HW probing
Date: Mon, 27 Feb 2023 22:19:54 +0000	[thread overview]
Message-ID: <Y/0sikPIVR3j7cKI@spud> (raw)
In-Reply-To: <20230221190858.3159617-3-evan@rivosinc.com>

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On Tue, Feb 21, 2023 at 11:08:53AM -0800, Evan Green wrote:
> We don't have enough space for these all in ELF_HWCAP{,2} and there's no
> system call that quite does this, so let's just provide an arch-specific
> one to probe for hardware capabilities.  This currently just provides
> m{arch,imp,vendor}id, but with the key-value pairs we can pass more in
> the future.
> 
> Co-developed-by: Palmer Dabbelt <palmer@rivosinc.com>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> Signed-off-by: Evan Green <evan@rivosinc.com>

> +static
> +int do_riscv_hwprobe(struct riscv_hwprobe __user *pairs, long pair_count,
> +		      long cpu_count, unsigned long __user *cpus_user,
> +		      unsigned long flags)

I almost feel bad commenting this, but this is now the only function
split like this w/ the static on its own line.

With the same caveat about ignorance about glibc's desires & lingering
doubt as to whether this interface is the right way to go, this looks
good to me now.
I'm reluctant to give an R-b for the latter reason, but assuming the
Higher Power deem this approach acceptable:
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Cheers,
Conor.

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WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Evan Green <evan@rivosinc.com>
Cc: Niklas Cassel <niklas.cassel@wdc.com>,
	heiko@sntech.de, linux-doc@vger.kernel.org,
	Andrew Bresticker <abrestic@rivosinc.com>,
	Atish Patra <atishp@rivosinc.com>,
	Palmer Dabbelt <palmer@rivosinc.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Celeste Liu <coelacanthus@outlook.com>,
	slewis@rivosinc.com, Bagas Sanjaya <bagasdotme@gmail.com>,
	linux-riscv@lists.infradead.org, Jonathan Corbet <corbet@lwn.net>,
	Tobias Klauser <tklauser@distanz.ch>,
	Andrew Jones <ajones@ventanamicro.com>,
	Albert Ou <aou@eecs.berkeley.edu>, Arnd Bergmann <arnd@arndb.de>,
	vineetg@rivosinc.com, Paul Walmsley <paul.walmsley@sifive.com>,
	Ruizhe Pan <c141028@gmail.com>,
	Anup Patel <apatel@ventanamicro.com>,
	Randy Dunlap <rdunlap@infradead.org>,
	linux-kernel@vger.kernel.org, Palmer Dabbelt <palmer@dabbelt.com>,
	Guo Ren <guoren@kernel.org>
Subject: Re: [PATCH v3 2/7] RISC-V: Add a syscall for HW probing
Date: Mon, 27 Feb 2023 22:19:54 +0000	[thread overview]
Message-ID: <Y/0sikPIVR3j7cKI@spud> (raw)
In-Reply-To: <20230221190858.3159617-3-evan@rivosinc.com>


[-- Attachment #1.1: Type: text/plain, Size: 1197 bytes --]

On Tue, Feb 21, 2023 at 11:08:53AM -0800, Evan Green wrote:
> We don't have enough space for these all in ELF_HWCAP{,2} and there's no
> system call that quite does this, so let's just provide an arch-specific
> one to probe for hardware capabilities.  This currently just provides
> m{arch,imp,vendor}id, but with the key-value pairs we can pass more in
> the future.
> 
> Co-developed-by: Palmer Dabbelt <palmer@rivosinc.com>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> Signed-off-by: Evan Green <evan@rivosinc.com>

> +static
> +int do_riscv_hwprobe(struct riscv_hwprobe __user *pairs, long pair_count,
> +		      long cpu_count, unsigned long __user *cpus_user,
> +		      unsigned long flags)

I almost feel bad commenting this, but this is now the only function
split like this w/ the static on its own line.

With the same caveat about ignorance about glibc's desires & lingering
doubt as to whether this interface is the right way to go, this looks
good to me now.
I'm reluctant to give an R-b for the latter reason, but assuming the
Higher Power deem this approach acceptable:
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Cheers,
Conor.

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  parent reply	other threads:[~2023-02-27 22:20 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-21 19:08 [PATCH v3 0/7] RISC-V Hardware Probing User Interface Evan Green
2023-02-21 19:08 ` Evan Green
2023-02-21 19:08 ` [PATCH v3 1/7] RISC-V: Move struct riscv_cpuinfo to new header Evan Green
2023-02-21 19:08   ` Evan Green
2023-02-21 19:08 ` [PATCH v3 2/7] RISC-V: Add a syscall for HW probing Evan Green
2023-02-21 19:08   ` Evan Green
2023-02-23 10:06   ` Arnd Bergmann
2023-02-23 10:06     ` Arnd Bergmann
2023-03-30 18:30     ` Evan Green
2023-03-30 18:30       ` Evan Green
2023-03-30 20:20       ` Heiko Stübner
2023-03-30 20:20         ` Heiko Stübner
2023-03-30 21:24         ` Evan Green
2023-03-30 21:24           ` Evan Green
2023-03-31 13:21       ` Arnd Bergmann
2023-03-31 13:21         ` Arnd Bergmann
2023-03-31 17:51         ` Evan Green
2023-03-31 17:51           ` Evan Green
2023-02-27 22:19   ` Conor Dooley [this message]
2023-02-27 22:19     ` Conor Dooley
2023-02-21 19:08 ` [PATCH v3 3/7] RISC-V: hwprobe: Add support for RISCV_HWPROBE_BASE_BEHAVIOR_IMA Evan Green
2023-02-21 19:08   ` Evan Green
2023-02-27 22:47   ` Conor Dooley
2023-02-27 22:47     ` Conor Dooley
2023-03-03  0:56     ` Evan Green
2023-03-03  0:56       ` Evan Green
2023-02-21 19:08 ` [PATCH v3 4/7] dt-bindings: Add RISC-V misaligned access performance Evan Green
2023-02-21 19:08   ` Evan Green
2023-02-27 22:57   ` Conor Dooley
2023-02-27 22:57     ` Conor Dooley
2023-02-28 14:57     ` Rob Herring
2023-02-28 14:57       ` Rob Herring
2023-02-21 19:08 ` [PATCH v3 5/7] RISC-V: hwprobe: Support probing of " Evan Green
2023-02-21 19:08   ` Evan Green
2023-02-22  9:39   ` Joe Perches
2023-02-22  9:39     ` Joe Perches
2023-02-27 23:14   ` Conor Dooley
2023-02-27 23:14     ` Conor Dooley
2023-02-21 19:08 ` [PATCH v3 6/7] selftests: Test the new RISC-V hwprobe interface Evan Green
2023-02-21 19:08   ` Evan Green
2023-02-21 22:45   ` Mark Brown
2023-02-21 22:45     ` Mark Brown
2023-02-21 19:08 ` [PATCH v3 7/7] RISC-V: Add hwprobe vDSO function and data Evan Green
2023-02-21 19:08   ` Evan Green
2023-02-21 21:17   ` kernel test robot
2023-02-21 21:17     ` kernel test robot
2023-02-22  6:55   ` kernel test robot
2023-02-22  6:55     ` kernel test robot

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