Re: [RFC RESEND 2/2] RISC-V: enable building the 64-bit kernels with rust support

[Conor Dooley <conor.dooley@microchip.com>]

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On Fri, Feb 24, 2023 at 07:57:13AM -0700, Nathan Chancellor wrote:
> Hi Conor,
> 
> On Fri, Feb 24, 2023 at 01:50:44PM +0000, Conor Dooley wrote:
> > From: Miguel Ojeda <ojeda@kernel.org>
> > 
> > The rust modules work on 64-bit RISC-V, with no twiddling required.
> > Select HAS_RUST and provide the required flags to kbuild so that the
> > modules can be used.
> > 32-bit is broken in core rust code, so support is limited to 64-bit
> > only: ld.lld: error: undefined symbol: __udivdi3
> > 
> > Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > ---
> >  Documentation/rust/arch-support.rst | 2 ++
> >  arch/riscv/Kconfig                  | 1 +
> >  arch/riscv/Makefile                 | 3 ++-
> >  3 files changed, 5 insertions(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/rust/arch-support.rst b/Documentation/rust/arch-support.rst
> > index 6982b63775da..197919158596 100644
> > --- a/Documentation/rust/arch-support.rst
> > +++ b/Documentation/rust/arch-support.rst
> > @@ -15,5 +15,7 @@ support corresponds to ``S`` values in the ``MAINTAINERS`` file.
> >  ============  ================  ==============================================
> >  Architecture  Level of support  Constraints
> >  ============  ================  ==============================================
> > +``riscv``     Maintained        ``rv64`` only.
> > +============  ================  ==============================================
> >  ``x86``       Maintained        ``x86_64`` only.
> >  ============  ================  ==============================================
> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > index 81eb031887d2..73174157212d 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -115,6 +115,7 @@ config RISCV
> >  	select HAVE_POSIX_CPU_TIMERS_TASK_WORK
> >  	select HAVE_REGS_AND_STACK_ACCESS_API
> >  	select HAVE_RSEQ
> > +	select HAVE_RUST if 64BIT
> 
> Just a small drive by comment, you have 'if 64BIT' here...
> 
> >  	select HAVE_STACKPROTECTOR
> >  	select HAVE_SYSCALL_TRACEPOINTS
> >  	select IRQ_DOMAIN
> > diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
> > index 76989561566b..0d6fc4e25221 100644
> > --- a/arch/riscv/Makefile
> > +++ b/arch/riscv/Makefile
> > @@ -29,8 +29,8 @@ ifeq ($(CONFIG_ARCH_RV64I),y)
> >  
> >  	KBUILD_CFLAGS += -mabi=lp64
> >  	KBUILD_AFLAGS += -mabi=lp64
> > -
> >  	KBUILD_LDFLAGS += -melf64lriscv
> > +	KBUILD_RUSTFLAGS += -Ctarget-cpu=generic-rv64
> >  else
> >  	BITS := 32
> >  	UTS_MACHINE := riscv32
> > @@ -38,6 +38,7 @@ else
> >  	KBUILD_CFLAGS += -mabi=ilp32
> >  	KBUILD_AFLAGS += -mabi=ilp32
> >  	KBUILD_LDFLAGS += -melf32lriscv
> > +	KBUILD_RUSTFLAGS += -Ctarget-cpu=generic-rv32
> 
> but also add KBUILD_RUSTFLAGS for the !64BIT case. Seems like one of
> those can be removed.

Yeah & it's ditto for the rv32 handling in 1/2 as well. Ideally there
wouldn't be implicit 64-bit division and the "if 64BIT" could go
away. I just left things as-lifted, but I'll go drop anything 32-bit
related if this series looses the RFC prefix ;)

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