Re: [Intel-xe] [PATCH v2 09/11] drm/xe/guc_pc: Move gt register to the proper place

[Rodrigo Vivi <rodrigo.vivi@intel.com>]

On Thu, Feb 16, 2023 at 04:52:24PM -0800, Lucas De Marchi wrote:
> Move a few defines from xe_guc_pc.c to the right register, now that
> there is one: xe_gt_regs.h.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 ++
>  drivers/gpu/drm/xe/xe_guc_pc.c       | 6 ------
>  2 files changed, 2 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index da40133252fb..ab8c9e51f62e 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -186,6 +186,7 @@
>  #define   DFR_DISABLE				(1 << 9)
>  
>  #define GEN6_RPNSWREQ				_MMIO(0xa008)
> +#define   REQ_RATIO_MASK			REG_GENMASK(31, 23)
>  #define GEN6_RC_CONTROL				_MMIO(0xa090)
>  #define GEN6_RC_STATE				_MMIO(0xa094)
>  
> @@ -242,6 +243,7 @@
>  #define   FORCEWAKE_KERNEL_FALLBACK		BIT(15)
>  
>  #define GEN6_GT_CORE_STATUS			_MMIO(0x138060)
> +#define   RCN_MASK				REG_GENMASK(2, 0)
>  #define   GEN6_RC0				0
>  #define   GEN6_RC6				3
>  
> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
> index 0df82defa7e4..3465236b0b49 100644
> --- a/drivers/gpu/drm/xe/xe_guc_pc.c
> +++ b/drivers/gpu/drm/xe/xe_guc_pc.c
> @@ -30,12 +30,6 @@
>  #define GEN10_FREQ_INFO_REC	_MMIO(MCHBAR_MIRROR_BASE_SNB + 0x5ef0)
>  #define   RPE_MASK		REG_GENMASK(15, 8)

I don't like this getting split from the rest... but I don't have
any quick better recommendation and the movement below at least is correct
by itself. So,


Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>


>  
> -/* For GEN6_RPNSWREQ.reg to be merged when the definition moves to Xe */
> -#define   REQ_RATIO_MASK	REG_GENMASK(31, 23)
> -
> -/* For GEN6_GT_CORE_STATUS.reg to be merged when the definition moves to Xe */
> -#define   RCN_MASK	REG_GENMASK(2, 0)
> -
>  #define GEN12_RPSTAT1		_MMIO(0x1381b4)
>  #define   GEN12_CAGF_MASK	REG_GENMASK(19, 11)
>  
> -- 
> 2.39.0
>