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From: Mostafa Saleh <smostafa@google.com>
To: Eric Auger <eric.auger@redhat.com>
Cc: qemu-devel@nongnu.org, jean-philippe@linaro.org,
	peter.maydell@linaro.org, qemu-arm@nongnu.org
Subject: Re: [RFC PATCH 06/16] hw/arm/smmuv3: Parse STE config for stage-2
Date: Thu, 16 Feb 2023 13:17:02 +0000	[thread overview]
Message-ID: <Y+4szt24KUwaz50y@google.com> (raw)
In-Reply-To: <3086b46d-b7dd-5403-f0c0-7051a7fbc189@redhat.com>

Hi Eric,

On Wed, Feb 15, 2023 at 06:47:52PM +0100, Eric Auger wrote:
> On 2/5/23 10:44, Mostafa Saleh wrote:
> > Parse stage-2 configuration and populate it in SMMUTransCfg.
> > Configs in this patch (s2g, ttb, tsz, sl0).
> above 'sentence' a bit cryptic.
I will reword it.

> > +++ b/hw/arm/smmuv3.c
> > @@ -366,7 +366,48 @@ static int decode_ste(SMMUv3State *s, SMMUTransCfg *cfg,
> >          return 0;
> >      }
> >  
> > -    if (STE_CFG_S2_ENABLED(config)) {
> > +    if (STAGE2_SUPPORTED(s->features) && STE_CFG_S2_ENABLED(config)) {
> Don't you want to check both S1 and S2 aren't set?
Yes, currently this is ignored, but looking at the SMMU manual it is
illegal to configure an unsupported stage, I will update it.

> > +            break;
> > +        case 0x2: /* 16KB */
> > +            cfg->s2cfg.granule_sz = 14;
> > +            break;
> > +        default:
> > +            qemu_log_mask(LOG_GUEST_ERROR,
> > +                          "SMMUv3 bad STE S2TG: %x\n", STE_S2TG(ste));
> > +            goto bad_ste;
> > +        }
> > +
> > +        cfg->s2cfg.vttb = STE_S2TTB(ste);
> > +        cfg->s2cfg.tsz = STE_S2T0SZ(ste);
> What about IDR3.STT currently 0 so S2T0SZ <= 39
> 
> don't you need to check against SMMU_IDR3.STT/S2TG
> 
> • In architectures after SMMUv3.0:
> – If STE.S2TG selects a 4KB or 16KB granule, the minimum valid value for
> this field is MAX(16,
> 64-IAS).
> – If STE.S2TG selects a 64KB granule, the minimum valid value for this
> field is (64-IAS).
I will add a function to validate S2T0SZ based on the behaviour after
SMMUv3.0 and checks against STT disabled. I believe it is safe just to
check S2T0SZ <= 39 without checking IDR3.STT as we don’t support it
for now.

> > +                          cfg->s2cfg.tsz);
> > +            goto bad_ste;
> > +        }
> > +
> > +        cfg->s2cfg.sl0 = STE_S2SL0(ste);
> > +        if (cfg->s2cfg.sl0 == 0x3) {
> > +            qemu_log_mask(LOG_UNIMP,
> > +                          "SMMUv3 STE->SL0 0x3 has no meaning!\n");
> > +            goto bad_ste;
> what about S2PS, S2VMID?
> 
> you may either squash [RFC PATCH 11/16] hw/arm/smmuv3: Read VMID from
> STE into that patch or at least mention in the commit msg that S2VMID
> will be dealt with separately
I will squash it with
"[RFC PATCH 11/16] hw/arm/smmuv3: Read VMID from STE"
I missed S2PS, I will add it in V2.

Thanks,
Mostafa

  reply	other threads:[~2023-02-16 13:17 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-05  9:43 [RFC PATCH 00/16] Add stage-2 translation for SMMUv3 Mostafa Saleh
2023-02-05  9:43 ` [RFC PATCH 01/16] hw/arm/smmuv3: Add missing fields for IDR0 Mostafa Saleh
2023-02-06 22:51   ` Richard Henderson
2023-02-15 16:16   ` Eric Auger
2023-02-05  9:43 ` [RFC PATCH 02/16] hw/arm/smmuv3: Update translation config to hold stage-2 Mostafa Saleh
2023-02-15 18:57   ` Eric Auger
2023-02-16 12:53     ` Mostafa Saleh
2023-02-05  9:43 ` [RFC PATCH 03/16] hw/arm/smmuv3: Rename smmu_ptw_64 Mostafa Saleh
2023-02-15 16:53   ` Eric Auger
2023-02-16 12:56     ` Mostafa Saleh
2023-02-16 16:44       ` Eric Auger
2023-02-05  9:43 ` [RFC PATCH 04/16] hw/arm/smmuv3: Add a system property to choose translation stage Mostafa Saleh
2023-02-15 16:29   ` Eric Auger
2023-02-16 12:58     ` Mostafa Saleh
2023-02-16 16:45       ` Eric Auger
2023-02-05  9:44 ` [RFC PATCH 05/16] hw/arm/smmuv3: Add page table walk for stage-2 Mostafa Saleh
2023-02-15 16:52   ` Eric Auger
2023-02-16 13:09     ` Mostafa Saleh
2023-02-16 16:50       ` Eric Auger
2023-02-05  9:44 ` [RFC PATCH 06/16] hw/arm/smmuv3: Parse STE config " Mostafa Saleh
2023-02-15 17:47   ` Eric Auger
2023-02-16 13:17     ` Mostafa Saleh [this message]
2023-02-05  9:44 ` [RFC PATCH 07/16] hw/arm/smmuv3: Check validity of stage-2 page table Mostafa Saleh
2023-02-15 18:53   ` Eric Auger
2023-02-16 13:20     ` Mostafa Saleh
2023-02-05  9:44 ` [RFC PATCH 08/16] hw/arm/smmuv3: Support S2AFFD Mostafa Saleh
2023-02-15 18:37   ` Eric Auger
2023-02-16 13:27     ` Mostafa Saleh
2023-02-05  9:44 ` [RFC PATCH 09/16] hw/arm/smmuv3: Don't touch CD if stage-1 is not supported Mostafa Saleh
2023-02-05  9:44 ` [RFC PATCH 10/16] hw/arm/smmuv3: Make TLB lookup work for stage-2 Mostafa Saleh
2023-02-16 11:32   ` Eric Auger
2023-02-16 13:49     ` Mostafa Saleh
2023-02-16 16:52       ` Eric Auger
2023-02-05  9:44 ` [RFC PATCH 11/16] hw/arm/smmuv3: Read VMID from STE Mostafa Saleh
2023-02-05  9:44 ` [RFC PATCH 12/16] hw/arm/smmuv3: Add VMID to tlb tagging Mostafa Saleh
2023-02-15 19:47   ` Jean-Philippe Brucker
2023-02-16 13:52     ` Mostafa Saleh
2023-02-16 10:17   ` Eric Auger
2023-02-16 13:53     ` Mostafa Saleh
2023-02-16 16:53       ` Eric Auger
2023-02-05  9:44 ` [RFC PATCH 13/16] hw/arm/smmuv3: Add CMDs related to stage 2 Mostafa Saleh
2023-02-16 11:56   ` Eric Auger
2023-02-16 13:58     ` Mostafa Saleh
2023-02-16 16:54       ` Eric Auger
2023-02-05  9:44 ` [RFC PATCH 14/16] hw/arm/smmuv3: Add stage-2 support in iova notifier Mostafa Saleh
2023-02-05  9:44 ` [RFC PATCH 15/16] hw/arm/smmuv3: Add fault configuration for stage-2 Mostafa Saleh
2023-02-15 18:55   ` Eric Auger
2023-02-16 14:01     ` Mostafa Saleh
2023-02-05  9:44 ` [RFC PATCH 16/16] hw/arm/smmuv3: Enable stage-2 support Mostafa Saleh

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