From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Matthew Auld <matthew.auld@intel.com>,
dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] Revert "drm/i915/hwmon: Enable PL1 power limit"
Date: Wed, 8 Feb 2023 15:08:04 -0500 [thread overview]
Message-ID: <Y+QBJLXJ7uTo3p7l@intel.com> (raw)
In-Reply-To: <20230208190312.1611335-1-ashutosh.dixit@intel.com>
On Wed, Feb 08, 2023 at 11:03:12AM -0800, Ashutosh Dixit wrote:
> This reverts commit 0349c41b05968befaffa5fbb7e73d0ee6004f610.
>
> 0349c41b0596 ("drm/i915/hwmon: Enable PL1 power limit") is incorrect and
> caused a major regression on ATSM. The change enabled the PL1 power limit
> but FW sets the default value of the PL1 limit to 0 which implies HW now
> works at minimum power and therefore the lowest effective frequency. This
> means all workloads now run slower resulting in even GuC FW load operations
> timing out, rendering ATSM unusable.
>
> A different solution to the original issue of the PL1 limit being disabled
> on ATSM is needed but till that is developed, revert 0349c41b0596.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8062
pushed to drm-intel-next and removed from drm-intel-fixes.
Thanks for the quick reaction.
> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> ---
> drivers/gpu/drm/i915/i915_hwmon.c | 5 -----
> 1 file changed, 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_hwmon.c b/drivers/gpu/drm/i915/i915_hwmon.c
> index 4683a5b96eff1..1225bc432f0d5 100644
> --- a/drivers/gpu/drm/i915/i915_hwmon.c
> +++ b/drivers/gpu/drm/i915/i915_hwmon.c
> @@ -687,11 +687,6 @@ hwm_get_preregistration_info(struct drm_i915_private *i915)
> for_each_gt(gt, i915, i)
> hwm_energy(&hwmon->ddat_gt[i], &energy);
> }
> -
> - /* Enable PL1 power limit */
> - if (i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit))
> - hwm_locked_with_pm_intel_uncore_rmw(ddat, hwmon->rg.pkg_rapl_limit,
> - PKG_PWR_LIM_1_EN, PKG_PWR_LIM_1_EN);
> }
>
> void i915_hwmon_register(struct drm_i915_private *i915)
> --
> 2.38.0
>
WARNING: multiple messages have this Message-ID (diff)
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Matthew Auld <matthew.auld@intel.com>,
dri-devel@lists.freedesktop.org, gwan-gyeong.mun@intel.com
Subject: Re: [PATCH] Revert "drm/i915/hwmon: Enable PL1 power limit"
Date: Wed, 8 Feb 2023 15:08:04 -0500 [thread overview]
Message-ID: <Y+QBJLXJ7uTo3p7l@intel.com> (raw)
In-Reply-To: <20230208190312.1611335-1-ashutosh.dixit@intel.com>
On Wed, Feb 08, 2023 at 11:03:12AM -0800, Ashutosh Dixit wrote:
> This reverts commit 0349c41b05968befaffa5fbb7e73d0ee6004f610.
>
> 0349c41b0596 ("drm/i915/hwmon: Enable PL1 power limit") is incorrect and
> caused a major regression on ATSM. The change enabled the PL1 power limit
> but FW sets the default value of the PL1 limit to 0 which implies HW now
> works at minimum power and therefore the lowest effective frequency. This
> means all workloads now run slower resulting in even GuC FW load operations
> timing out, rendering ATSM unusable.
>
> A different solution to the original issue of the PL1 limit being disabled
> on ATSM is needed but till that is developed, revert 0349c41b0596.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8062
pushed to drm-intel-next and removed from drm-intel-fixes.
Thanks for the quick reaction.
> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> ---
> drivers/gpu/drm/i915/i915_hwmon.c | 5 -----
> 1 file changed, 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_hwmon.c b/drivers/gpu/drm/i915/i915_hwmon.c
> index 4683a5b96eff1..1225bc432f0d5 100644
> --- a/drivers/gpu/drm/i915/i915_hwmon.c
> +++ b/drivers/gpu/drm/i915/i915_hwmon.c
> @@ -687,11 +687,6 @@ hwm_get_preregistration_info(struct drm_i915_private *i915)
> for_each_gt(gt, i915, i)
> hwm_energy(&hwmon->ddat_gt[i], &energy);
> }
> -
> - /* Enable PL1 power limit */
> - if (i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit))
> - hwm_locked_with_pm_intel_uncore_rmw(ddat, hwmon->rg.pkg_rapl_limit,
> - PKG_PWR_LIM_1_EN, PKG_PWR_LIM_1_EN);
> }
>
> void i915_hwmon_register(struct drm_i915_private *i915)
> --
> 2.38.0
>
next prev parent reply other threads:[~2023-02-08 20:08 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-08 19:03 [Intel-gfx] [PATCH] Revert "drm/i915/hwmon: Enable PL1 power limit" Ashutosh Dixit
2023-02-08 19:03 ` Ashutosh Dixit
2023-02-08 20:08 ` Rodrigo Vivi [this message]
2023-02-08 20:08 ` Rodrigo Vivi
2023-02-15 15:37 ` [Intel-gfx] " Jani Nikula
2023-02-15 16:24 ` Dixit, Ashutosh
2023-02-15 17:19 ` Rodrigo Vivi
2023-03-18 3:28 ` [Intel-gfx] Reverted patch reappears! Dixit, Ashutosh
2023-03-18 3:28 ` Dixit, Ashutosh
2023-03-18 15:10 ` [Intel-gfx] " Dixit, Ashutosh
2023-03-18 15:10 ` Dixit, Ashutosh
2023-02-08 21:52 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Revert "drm/i915/hwmon: Enable PL1 power limit" Patchwork
2023-02-08 22:17 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2023-03-18 14:59 [Intel-gfx] [PATCH] " Ashutosh Dixit
2023-03-19 14:03 Ashutosh Dixit
2023-03-20 10:35 ` Jani Nikula
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