From: Andrew Lunn <andrew@lunn.ch>
To: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Cc: Lee Jones <lee@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Emil Renner Berthing <kernel@esmil.dk>,
Conor Dooley <conor@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Jose Abreu <joabreu@synopsys.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Richard Cochran <richardcochran@gmail.com>,
Sagar Kadam <sagar.kadam@sifive.com>,
Yanhong Wang <yanhong.wang@starfivetech.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org, kernel@collabora.com
Subject: Re: [PATCH 08/12] net: stmmac: Add glue layer for StarFive JH7100 SoC
Date: Wed, 15 Feb 2023 13:51:56 +0100 [thread overview]
Message-ID: <Y+zVbPppy7jvWF5r@lunn.ch> (raw)
In-Reply-To: <d1769dac-9e80-2f0d-6a5c-386ef70e1547@collabora.com>
On Wed, Feb 15, 2023 at 02:08:01AM +0200, Cristian Ciocaltea wrote:
> On 2/11/23 18:11, Andrew Lunn wrote:
> > > +
> > > +#define JH7100_SYSMAIN_REGISTER28 0x70
> > > +/* The value below is not a typo, just really bad naming by StarFive ¯\_(ツ)_/¯ */
> > > +#define JH7100_SYSMAIN_REGISTER49 0xc8
> >
> > Seems like the comment should be one line earlier?
> >
> > There is value in basing the names on the datasheet, but you could
> > append something meaningful on the end:
> >
> > #define JH7100_SYSMAIN_REGISTER49_DLYCHAIN 0xc8
> >
> > ???
>
> Unfortunately the JH7100 datasheet I have access to doesn't provide any
> information regarding the SYSCTRL-MAINSYS related registers. Maybe Emil
> could provide some details here?
If you have no reliable source of naming, just make a name up from how
the register is used. This is why i suggested adding _DLYCHAIN,
because that is what is written to it. You should be able to do the
same with register 28.
Andrew
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Lunn <andrew@lunn.ch>
To: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Cc: Lee Jones <lee@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Emil Renner Berthing <kernel@esmil.dk>,
Conor Dooley <conor@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Jose Abreu <joabreu@synopsys.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Richard Cochran <richardcochran@gmail.com>,
Sagar Kadam <sagar.kadam@sifive.com>,
Yanhong Wang <yanhong.wang@starfivetech.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org, kernel@collabora.com
Subject: Re: [PATCH 08/12] net: stmmac: Add glue layer for StarFive JH7100 SoC
Date: Wed, 15 Feb 2023 13:51:56 +0100 [thread overview]
Message-ID: <Y+zVbPppy7jvWF5r@lunn.ch> (raw)
In-Reply-To: <d1769dac-9e80-2f0d-6a5c-386ef70e1547@collabora.com>
On Wed, Feb 15, 2023 at 02:08:01AM +0200, Cristian Ciocaltea wrote:
> On 2/11/23 18:11, Andrew Lunn wrote:
> > > +
> > > +#define JH7100_SYSMAIN_REGISTER28 0x70
> > > +/* The value below is not a typo, just really bad naming by StarFive ¯\_(ツ)_/¯ */
> > > +#define JH7100_SYSMAIN_REGISTER49 0xc8
> >
> > Seems like the comment should be one line earlier?
> >
> > There is value in basing the names on the datasheet, but you could
> > append something meaningful on the end:
> >
> > #define JH7100_SYSMAIN_REGISTER49_DLYCHAIN 0xc8
> >
> > ???
>
> Unfortunately the JH7100 datasheet I have access to doesn't provide any
> information regarding the SYSCTRL-MAINSYS related registers. Maybe Emil
> could provide some details here?
If you have no reliable source of naming, just make a name up from how
the register is used. This is why i suggested adding _DLYCHAIN,
because that is what is written to it. You should be able to do the
same with register 28.
Andrew
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Lunn <andrew@lunn.ch>
To: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Cc: Lee Jones <lee@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Emil Renner Berthing <kernel@esmil.dk>,
Conor Dooley <conor@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Jose Abreu <joabreu@synopsys.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Richard Cochran <richardcochran@gmail.com>,
Sagar Kadam <sagar.kadam@sifive.com>,
Yanhong Wang <yanhong.wang@starfivetech.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org, kernel@collabora.com
Subject: Re: [PATCH 08/12] net: stmmac: Add glue layer for StarFive JH7100 SoC
Date: Wed, 15 Feb 2023 13:51:56 +0100 [thread overview]
Message-ID: <Y+zVbPppy7jvWF5r@lunn.ch> (raw)
In-Reply-To: <d1769dac-9e80-2f0d-6a5c-386ef70e1547@collabora.com>
On Wed, Feb 15, 2023 at 02:08:01AM +0200, Cristian Ciocaltea wrote:
> On 2/11/23 18:11, Andrew Lunn wrote:
> > > +
> > > +#define JH7100_SYSMAIN_REGISTER28 0x70
> > > +/* The value below is not a typo, just really bad naming by StarFive ¯\_(ツ)_/¯ */
> > > +#define JH7100_SYSMAIN_REGISTER49 0xc8
> >
> > Seems like the comment should be one line earlier?
> >
> > There is value in basing the names on the datasheet, but you could
> > append something meaningful on the end:
> >
> > #define JH7100_SYSMAIN_REGISTER49_DLYCHAIN 0xc8
> >
> > ???
>
> Unfortunately the JH7100 datasheet I have access to doesn't provide any
> information regarding the SYSCTRL-MAINSYS related registers. Maybe Emil
> could provide some details here?
If you have no reliable source of naming, just make a name up from how
the register is used. This is why i suggested adding _DLYCHAIN,
because that is what is written to it. You should be able to do the
same with register 28.
Andrew
next prev parent reply other threads:[~2023-02-15 12:52 UTC|newest]
Thread overview: 151+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-11 3:18 [PATCH 00/12] Enable networking support for StarFive JH7100 SoC Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 3:18 ` [PATCH 01/12] dt-bindings: riscv: sifive-ccache: Add compatible " Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-13 9:20 ` Krzysztof Kozlowski
2023-02-13 9:20 ` Krzysztof Kozlowski
2023-02-13 9:20 ` Krzysztof Kozlowski
2023-02-14 20:40 ` Conor Dooley
2023-02-14 20:40 ` Conor Dooley
2023-02-14 20:40 ` Conor Dooley
2023-02-15 13:11 ` Emil Renner Berthing
2023-02-15 13:11 ` Emil Renner Berthing
2023-02-15 13:11 ` Emil Renner Berthing
2023-03-20 23:46 ` Palmer Dabbelt
2023-03-20 23:46 ` Palmer Dabbelt
2023-03-20 23:46 ` Palmer Dabbelt
2023-02-11 3:18 ` [PATCH 02/12] dt-bindings: riscv: sifive-ccache: Add 'uncached-offset' property Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-13 9:23 ` Krzysztof Kozlowski
2023-02-13 9:23 ` Krzysztof Kozlowski
2023-02-13 9:23 ` Krzysztof Kozlowski
2023-02-14 17:58 ` Cristian Ciocaltea
2023-02-14 17:58 ` Cristian Ciocaltea
2023-02-14 17:58 ` Cristian Ciocaltea
2023-02-16 21:53 ` Conor Dooley
2023-02-16 21:53 ` Conor Dooley
2023-02-16 21:53 ` Conor Dooley
2023-02-11 3:18 ` [PATCH 03/12] soc: sifive: ccache: Add StarFive JH7100 support Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-03-06 23:32 ` Conor Dooley
2023-03-06 23:32 ` Conor Dooley
2023-03-06 23:32 ` Conor Dooley
2023-03-06 23:46 ` Cristian Ciocaltea
2023-03-06 23:46 ` Cristian Ciocaltea
2023-03-06 23:46 ` Cristian Ciocaltea
2023-02-11 3:18 ` [PATCH 04/12] soc: sifive: ccache: Add non-coherent DMA handling Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-16 18:50 ` Conor Dooley
2023-02-16 18:50 ` Conor Dooley
2023-02-16 18:50 ` Conor Dooley
2023-02-19 21:32 ` Emil Renner Berthing
2023-02-19 21:32 ` Emil Renner Berthing
2023-02-19 21:32 ` Emil Renner Berthing
2023-02-20 11:43 ` Conor Dooley
2023-02-20 11:43 ` Conor Dooley
2023-02-20 11:43 ` Conor Dooley
2023-02-11 3:18 ` [PATCH 05/12] riscv: Implement non-coherent DMA support via SiFive cache flushing Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-13 8:30 ` Ben Dooks
2023-02-13 8:30 ` Ben Dooks
2023-02-13 8:30 ` Ben Dooks
2023-02-14 18:06 ` Cristian Ciocaltea
2023-02-14 18:06 ` Cristian Ciocaltea
2023-02-14 18:06 ` Cristian Ciocaltea
2023-02-14 18:17 ` Conor Dooley
2023-02-14 18:17 ` Conor Dooley
2023-02-14 18:17 ` Conor Dooley
2023-02-11 3:18 ` [PATCH 06/12] dt-bindings: mfd: syscon: Add StarFive JH7100 sysmain compatible Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-13 9:23 ` Krzysztof Kozlowski
2023-02-13 9:23 ` Krzysztof Kozlowski
2023-02-13 9:23 ` Krzysztof Kozlowski
2023-03-03 11:52 ` Lee Jones
2023-03-03 11:52 ` Lee Jones
2023-03-03 11:52 ` Lee Jones
2023-02-11 3:18 ` [PATCH 07/12] dt-bindings: net: Add StarFive JH7100 SoC Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 16:01 ` Andrew Lunn
2023-02-11 16:01 ` Andrew Lunn
2023-02-11 16:01 ` Andrew Lunn
2023-02-15 0:34 ` Cristian Ciocaltea
2023-02-15 0:34 ` Cristian Ciocaltea
2023-02-15 0:34 ` Cristian Ciocaltea
2023-02-15 13:01 ` Andrew Lunn
2023-02-15 13:01 ` Andrew Lunn
2023-02-15 13:01 ` Andrew Lunn
2023-02-16 15:51 ` Cristian Ciocaltea
2023-02-16 15:51 ` Cristian Ciocaltea
2023-02-16 15:51 ` Cristian Ciocaltea
2023-02-16 17:54 ` Andrew Lunn
2023-02-16 17:54 ` Andrew Lunn
2023-02-16 17:54 ` Andrew Lunn
2023-02-17 0:32 ` Cristian Ciocaltea
2023-02-17 0:32 ` Cristian Ciocaltea
2023-02-17 0:32 ` Cristian Ciocaltea
2023-02-17 13:30 ` Andrew Lunn
2023-02-17 13:30 ` Andrew Lunn
2023-02-17 13:30 ` Andrew Lunn
2023-02-17 15:25 ` Cristian Ciocaltea
2023-02-17 15:25 ` Cristian Ciocaltea
2023-02-17 15:25 ` Cristian Ciocaltea
2023-10-27 14:55 ` Cristian Ciocaltea
2023-02-13 9:25 ` Krzysztof Kozlowski
2023-02-13 9:25 ` Krzysztof Kozlowski
2023-02-13 9:25 ` Krzysztof Kozlowski
2023-02-11 3:18 ` [PATCH 08/12] net: stmmac: Add glue layer for " Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 16:11 ` Andrew Lunn
2023-02-11 16:11 ` Andrew Lunn
2023-02-11 16:11 ` Andrew Lunn
2023-02-15 0:08 ` Cristian Ciocaltea
2023-02-15 0:08 ` Cristian Ciocaltea
2023-02-15 0:08 ` Cristian Ciocaltea
2023-02-15 11:20 ` Emil Renner Berthing
2023-02-15 11:20 ` Emil Renner Berthing
2023-02-15 11:20 ` Emil Renner Berthing
2023-02-15 11:51 ` Cristian Ciocaltea
2023-02-15 11:51 ` Cristian Ciocaltea
2023-02-15 11:51 ` Cristian Ciocaltea
2023-02-15 12:51 ` Andrew Lunn [this message]
2023-02-15 12:51 ` Andrew Lunn
2023-02-15 12:51 ` Andrew Lunn
2023-02-13 9:26 ` Krzysztof Kozlowski
2023-02-13 9:26 ` Krzysztof Kozlowski
2023-02-13 9:26 ` Krzysztof Kozlowski
2023-02-14 18:12 ` Cristian Ciocaltea
2023-02-14 18:12 ` Cristian Ciocaltea
2023-02-14 18:12 ` Cristian Ciocaltea
2023-02-11 3:18 ` [PATCH 09/12] riscv: dts: starfive: Add dma-noncoherent for " Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 3:18 ` [PATCH 10/12] riscv: dts: starfive: jh7100: Add ccache DT node Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 3:18 ` [PATCH 11/12] riscv: dts: starfive: jh7100: Add sysmain and gmac DT nodes Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-13 9:26 ` Krzysztof Kozlowski
2023-02-13 9:26 ` Krzysztof Kozlowski
2023-02-13 9:26 ` Krzysztof Kozlowski
2023-02-14 18:15 ` Cristian Ciocaltea
2023-02-14 18:15 ` Cristian Ciocaltea
2023-02-14 18:15 ` Cristian Ciocaltea
2023-02-11 3:18 ` [PATCH 12/12] riscv: dts: starfive: jh7100-common: Setup pinmux and enable gmac Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 3:18 ` Cristian Ciocaltea
2023-02-11 11:11 ` [PATCH 00/12] Enable networking support for StarFive JH7100 SoC Conor Dooley
2023-02-11 11:11 ` Conor Dooley
2023-02-11 11:11 ` Conor Dooley
2023-02-11 11:53 ` Cristian Ciocaltea
2023-02-11 11:53 ` Cristian Ciocaltea
2023-02-11 11:53 ` Cristian Ciocaltea
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