[PATCH 0/2] arm64: dts: renesas: r8a779g0/white-hawk: Add RPC and QSPI FLASH support

[PATCH 0/2] arm64: dts: renesas: r8a779g0/white-hawk: Add RPC and QSPI FLASH support

[Geert Uytterhoeven]

	Hi all,

This patch series adds SPI Multi I/O Bus Controller (RPC-IF) support for
the R-Car V4H SoC, and QSPI FLASH support for the White Hawk board.

I plan to queue these in renesas-devel for v6.2.
Thanks for your comments!

Hai Pham (2):
  arm64: dts: renesas: r8a779g0: Add RPC node
  arm64: dts: renesas: white-hawk-cpu: Add QSPI FLASH support

 .../dts/renesas/r8a779g0-white-hawk-cpu.dtsi  | 33 +++++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a779g0.dtsi     | 16 +++++++++
 2 files changed, 49 insertions(+)

-- 
2.25.1

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

[PATCH 0/2] arm64: dts: renesas: r8a779g0/white-hawk: Add RPC and QSPI FLASH support

[Geert Uytterhoeven]

	Hi all,

This patch series adds SPI Multi I/O Bus Controller (RPC-IF) support for
the R-Car V4H SoC, and QSPI FLASH support for the White Hawk board.

I plan to queue these in renesas-devel for v6.2.
Thanks for your comments!

Hai Pham (2):
  arm64: dts: renesas: r8a779g0: Add RPC node
  arm64: dts: renesas: white-hawk-cpu: Add QSPI FLASH support

 .../dts/renesas/r8a779g0-white-hawk-cpu.dtsi  | 33 +++++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a779g0.dtsi     | 16 +++++++++
 2 files changed, 49 insertions(+)

-- 
2.25.1

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

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[PATCH 1/2] arm64: dts: renesas: r8a779g0: Add RPC node

[Geert Uytterhoeven]

From: Hai Pham <hai.pham.ud@renesas.com>

Add a device node for the SPI Multi I/O Bus Controller (RPC-IF) on the
Renesas R-Car V4H (R8A779G0) SoC.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
index 33d9df39a9cc7149..8141ffc38a08301d 100644
--- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
@@ -921,6 +921,22 @@ mmc0: mmc@ee140000 {
 			status = "disabled";
 		};
 
+		rpc: spi@ee200000 {
+			compatible = "renesas,r8a779g0-rpc-if",
+				     "renesas,rcar-gen4-rpc-if";
+			reg = <0 0xee200000 0 0x200>,
+			      <0 0x08000000 0 0x04000000>,
+			      <0 0xee208000 0 0x100>;
+			reg-names = "regs", "dirmap", "wbuf";
+			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 629>;
+			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
+			resets = <&cpg 629>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@f1000000 {
 			compatible = "arm,gic-v3";
 			#interrupt-cells = <3>;
-- 
2.25.1

[PATCH 1/2] arm64: dts: renesas: r8a779g0: Add RPC node

[Geert Uytterhoeven]

From: Hai Pham <hai.pham.ud@renesas.com>

Add a device node for the SPI Multi I/O Bus Controller (RPC-IF) on the
Renesas R-Car V4H (R8A779G0) SoC.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
index 33d9df39a9cc7149..8141ffc38a08301d 100644
--- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
@@ -921,6 +921,22 @@ mmc0: mmc@ee140000 {
 			status = "disabled";
 		};
 
+		rpc: spi@ee200000 {
+			compatible = "renesas,r8a779g0-rpc-if",
+				     "renesas,rcar-gen4-rpc-if";
+			reg = <0 0xee200000 0 0x200>,
+			      <0 0x08000000 0 0x04000000>,
+			      <0 0xee208000 0 0x100>;
+			reg-names = "regs", "dirmap", "wbuf";
+			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 629>;
+			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
+			resets = <&cpg 629>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@f1000000 {
 			compatible = "arm,gic-v3";
 			#interrupt-cells = <3>;
-- 
2.25.1


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Re: [PATCH 1/2] arm64: dts: renesas: r8a779g0: Add RPC node

[Wolfram Sang]

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On Wed, Oct 12, 2022 at 04:06:50PM +0200, Geert Uytterhoeven wrote:
> From: Hai Pham <hai.pham.ud@renesas.com>
> 
> Add a device node for the SPI Multi I/O Bus Controller (RPC-IF) on the
> Renesas R-Car V4H (R8A779G0) SoC.
> 
> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>


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Re: [PATCH 1/2] arm64: dts: renesas: r8a779g0: Add RPC node

[Wolfram Sang]

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On Wed, Oct 12, 2022 at 04:06:50PM +0200, Geert Uytterhoeven wrote:
> From: Hai Pham <hai.pham.ud@renesas.com>
> 
> Add a device node for the SPI Multi I/O Bus Controller (RPC-IF) on the
> Renesas R-Car V4H (R8A779G0) SoC.
> 
> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>


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[PATCH 2/2] arm64: dts: renesas: white-hawk-cpu: Add QSPI FLASH support

[Geert Uytterhoeven]

From: Hai Pham <hai.pham.ud@renesas.com>

Describe the QSPI FLASH on the White Hawk CPU board.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 .../dts/renesas/r8a779g0-white-hawk-cpu.dtsi  | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
index b306e5a10794dfb5..bb4dd08781ca275d 100644
--- a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
@@ -232,12 +232,45 @@ mmc_pins: mmc {
 		power-source = <1800>;
 	};
 
+	qspi0_pins: qspi0 {
+		groups = "qspi0_ctrl", "qspi0_data4";
+		function = "qspi0";
+	};
+
 	scif_clk_pins: scif_clk {
 		groups = "scif_clk";
 		function = "scif_clk";
 	};
 };
 
+&rpc {
+	pinctrl-0 = <&qspi0_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+
+	flash@0 {
+		compatible = "spansion,s25fs512s", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+		spi-rx-bus-width = <4>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			boot@0 {
+				reg = <0x0 0x1200000>;
+				read-only;
+			};
+			user@1200000 {
+				reg = <0x1200000 0x2e00000>;
+			};
+		};
+	};
+};
+
 &scif_clk {
 	clock-frequency = <24000000>;
 };
-- 
2.25.1

[PATCH 2/2] arm64: dts: renesas: white-hawk-cpu: Add QSPI FLASH support

[Geert Uytterhoeven]

From: Hai Pham <hai.pham.ud@renesas.com>

Describe the QSPI FLASH on the White Hawk CPU board.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 .../dts/renesas/r8a779g0-white-hawk-cpu.dtsi  | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
index b306e5a10794dfb5..bb4dd08781ca275d 100644
--- a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
@@ -232,12 +232,45 @@ mmc_pins: mmc {
 		power-source = <1800>;
 	};
 
+	qspi0_pins: qspi0 {
+		groups = "qspi0_ctrl", "qspi0_data4";
+		function = "qspi0";
+	};
+
 	scif_clk_pins: scif_clk {
 		groups = "scif_clk";
 		function = "scif_clk";
 	};
 };
 
+&rpc {
+	pinctrl-0 = <&qspi0_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+
+	flash@0 {
+		compatible = "spansion,s25fs512s", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+		spi-rx-bus-width = <4>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			boot@0 {
+				reg = <0x0 0x1200000>;
+				read-only;
+			};
+			user@1200000 {
+				reg = <0x1200000 0x2e00000>;
+			};
+		};
+	};
+};
+
 &scif_clk {
 	clock-frequency = <24000000>;
 };
-- 
2.25.1


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Re: [PATCH 2/2] arm64: dts: renesas: white-hawk-cpu: Add QSPI FLASH support

[Wolfram Sang]

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On Wed, Oct 12, 2022 at 04:06:51PM +0200, Geert Uytterhoeven wrote:
> From: Hai Pham <hai.pham.ud@renesas.com>
> 
> Describe the QSPI FLASH on the White Hawk CPU board.
> 
> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Looks good, but I can't really review the partition sizes. However,
Geert is very good and careful with hex values :)


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Re: [PATCH 2/2] arm64: dts: renesas: white-hawk-cpu: Add QSPI FLASH support

[Wolfram Sang]

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On Wed, Oct 12, 2022 at 04:06:51PM +0200, Geert Uytterhoeven wrote:
> From: Hai Pham <hai.pham.ud@renesas.com>
> 
> Describe the QSPI FLASH on the White Hawk CPU board.
> 
> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Looks good, but I can't really review the partition sizes. However,
Geert is very good and careful with hex values :)


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Re: [PATCH 2/2] arm64: dts: renesas: white-hawk-cpu: Add QSPI FLASH support

[Geert Uytterhoeven]

Hi Wolfram,

On Thu, Oct 13, 2022 at 2:19 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> On Wed, Oct 12, 2022 at 04:06:51PM +0200, Geert Uytterhoeven wrote:
> > From: Hai Pham <hai.pham.ud@renesas.com>
> >
> > Describe the QSPI FLASH on the White Hawk CPU board.
> >
> > Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> Looks good, but I can't really review the partition sizes. However,

Actually I just kept the partition sizes from the BSP.
As the second partition on my board is still empty, all I could verify
is that the first partition is sufficiently large to hold the boot
loader (ca. 9 MiB).  Note that the boot partition on Falcon is smaller.

> Geert is very good and careful with hex values :)

"i" (from iprint) is your friend...

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 2/2] arm64: dts: renesas: white-hawk-cpu: Add QSPI FLASH support

[Geert Uytterhoeven]

Hi Wolfram,

On Thu, Oct 13, 2022 at 2:19 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> On Wed, Oct 12, 2022 at 04:06:51PM +0200, Geert Uytterhoeven wrote:
> > From: Hai Pham <hai.pham.ud@renesas.com>
> >
> > Describe the QSPI FLASH on the White Hawk CPU board.
> >
> > Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> Looks good, but I can't really review the partition sizes. However,

Actually I just kept the partition sizes from the BSP.
As the second partition on my board is still empty, all I could verify
is that the first partition is sufficiently large to hold the boot
loader (ca. 9 MiB).  Note that the boot partition on Falcon is smaller.

> Geert is very good and careful with hex values :)

"i" (from iprint) is your friend...

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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Re: [PATCH 0/2] arm64: dts: renesas: r8a779g0/white-hawk: Add RPC and QSPI FLASH support

[Wolfram Sang]

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Hi Geert,

> This patch series adds SPI Multi I/O Bus Controller (RPC-IF) support for
> the R-Car V4H SoC, and QSPI FLASH support for the White Hawk board.

Did you need to alter the firmware to access it, or did it work out of
the box?

Happy hacking,

   Wolfram


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Re: [PATCH 0/2] arm64: dts: renesas: r8a779g0/white-hawk: Add RPC and QSPI FLASH support

[Wolfram Sang]

[-- Attachment #1.1: Type: text/plain, Size: 266 bytes --]

Hi Geert,

> This patch series adds SPI Multi I/O Bus Controller (RPC-IF) support for
> the R-Car V4H SoC, and QSPI FLASH support for the White Hawk board.

Did you need to alter the firmware to access it, or did it work out of
the box?

Happy hacking,

   Wolfram


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Re: [PATCH 0/2] arm64: dts: renesas: r8a779g0/white-hawk: Add RPC and QSPI FLASH support

[Geert Uytterhoeven]

Hi Wolfram,

On Wed, Oct 12, 2022 at 9:16 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> > This patch series adds SPI Multi I/O Bus Controller (RPC-IF) support for
> > the R-Car V4H SoC, and QSPI FLASH support for the White Hawk board.
>
> Did you need to alter the firmware to access it, or did it work out of
> the box?

It worked out of the box.
Note that the initial firmware that was on the board was newer, but
that was lost by installing a firmware stack that did include U-Boot.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 0/2] arm64: dts: renesas: r8a779g0/white-hawk: Add RPC and QSPI FLASH support

[Geert Uytterhoeven]

Hi Wolfram,

On Wed, Oct 12, 2022 at 9:16 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> > This patch series adds SPI Multi I/O Bus Controller (RPC-IF) support for
> > the R-Car V4H SoC, and QSPI FLASH support for the White Hawk board.
>
> Did you need to alter the firmware to access it, or did it work out of
> the box?

It worked out of the box.
Note that the initial firmware that was on the board was newer, but
that was lost by installing a firmware stack that did include U-Boot.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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