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From: Bagas Sanjaya <bagasdotme@gmail.com>
To: Maciej Kwapulinski <maciej.kwapulinski@linux.intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Arnd Bergmann <arnd@arndb.de>, Jonathan Corbet <corbet@lwn.net>,
	Derek Kiernan <derek.kiernan@xilinx.com>,
	Dragan Cvetic <dragan.cvetic@xilinx.com>,
	Andy Shevchenko <andy.shevchenko@gmail.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Olof Johansson <olof@lixom.net>,
	dri-devel@lists.freedesktop.org, linux-doc@vger.kernel.org,
	Mikolaj Grzybowski <mikolajx.grzybowski@intel.com>,
	Tomasz Jankowski <tomasz1.jankowski@intel.com>,
	Jianxun Zhang <jianxun.zhang@linux.intel.com>
Subject: Re: [PATCH v5 01/10] gna: add PCI driver module
Date: Fri, 21 Oct 2022 11:02:05 +0700	[thread overview]
Message-ID: <Y1IZvWFE5kRSLYCc@debian.me> (raw)
In-Reply-To: <20221020175334.1820519-2-maciej.kwapulinski@linux.intel.com>

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On Thu, Oct 20, 2022 at 07:53:25PM +0200, Maciej Kwapulinski wrote:
> +IOCTL
> +-----
> +Intel(R) GNA driver controls the device through IOCTL interfaces.
> +Following IOCTL commands - handled by DRM framework - are supported:
> +
> +GNA_GET_PARAMETER gets driver and device capabilities.
> +
> +GNA_GEM_NEW acquires new 4KB page aligned memory region ready for DMA operations.
> +
> +GNA_GEM_FREE frees memory region back to system.
> +
> +GNA_COMPUTE submits a request to the device queue.
> +            Memory regions acquired by GNA_GEM_NEW are part of request.
> +
> +GNA_WAIT blocks and waits on the submitted request.
> +

Use bullet lists for ioctl list above (with minor wording improv on
the whole section):

---- >8 ----

diff --git a/Documentation/gpu/gna.rst b/Documentation/gpu/gna.rst
index 7f3b7ce7e8f722..9a896664a3c29f 100644
--- a/Documentation/gpu/gna.rst
+++ b/Documentation/gpu/gna.rst
@@ -32,21 +32,22 @@ Multiple processes can independently file many requests to the driver. These req
 processed in a FIFO manner. The hardware can process one request at a time by using a FIFO
 queue.
 
-IOCTL
+ioctl
 -----
-Intel(R) GNA driver controls the device through IOCTL interfaces.
-Following IOCTL commands - handled by DRM framework - are supported:
+Intel(R) GNA driver controls the device through ioctl interfaces.
+The following commands (handled by DRM framework) are supported:
 
-GNA_GET_PARAMETER gets driver and device capabilities.
+  * GNA_GET_PARAMETER gets driver and device capabilities.
 
-GNA_GEM_NEW acquires new 4KB page aligned memory region ready for DMA operations.
+  * GNA_GEM_NEW allocates new 4KB page of aligned memory region ready for DMA
+    operations.
 
-GNA_GEM_FREE frees memory region back to system.
+  * GNA_GEM_FREE frees memory region back to system.
 
-GNA_COMPUTE submits a request to the device queue.
-            Memory regions acquired by GNA_GEM_NEW are part of request.
+  * GNA_COMPUTE submits a request to the device queue. Memory regions allocated
+    by GNA_GEM_NEW become part of the request payload.
 
-GNA_WAIT blocks and waits on the submitted request.
+  * GNA_WAIT blocks and waits on the submitted request.
 
 GNA MMU
 -------

Thanks.

-- 
An old man doll... just what I always wanted! - Clara

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WARNING: multiple messages have this Message-ID (diff)
From: Bagas Sanjaya <bagasdotme@gmail.com>
To: Maciej Kwapulinski <maciej.kwapulinski@linux.intel.com>
Cc: Arnd Bergmann <arnd@arndb.de>, Jonathan Corbet <corbet@lwn.net>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Dragan Cvetic <dragan.cvetic@xilinx.com>,
	linux-doc@vger.kernel.org,
	Tomasz Jankowski <tomasz1.jankowski@intel.com>,
	Mikolaj Grzybowski <mikolajx.grzybowski@intel.com>,
	Andy Shevchenko <andy.shevchenko@gmail.com>,
	dri-devel@lists.freedesktop.org,
	Thomas Zimmermann <tzimmermann@suse.de>,
	Derek Kiernan <derek.kiernan@xilinx.com>,
	Jianxun Zhang <jianxun.zhang@linux.intel.com>
Subject: Re: [PATCH v5 01/10] gna: add PCI driver module
Date: Fri, 21 Oct 2022 11:02:05 +0700	[thread overview]
Message-ID: <Y1IZvWFE5kRSLYCc@debian.me> (raw)
In-Reply-To: <20221020175334.1820519-2-maciej.kwapulinski@linux.intel.com>

[-- Attachment #1: Type: text/plain, Size: 2336 bytes --]

On Thu, Oct 20, 2022 at 07:53:25PM +0200, Maciej Kwapulinski wrote:
> +IOCTL
> +-----
> +Intel(R) GNA driver controls the device through IOCTL interfaces.
> +Following IOCTL commands - handled by DRM framework - are supported:
> +
> +GNA_GET_PARAMETER gets driver and device capabilities.
> +
> +GNA_GEM_NEW acquires new 4KB page aligned memory region ready for DMA operations.
> +
> +GNA_GEM_FREE frees memory region back to system.
> +
> +GNA_COMPUTE submits a request to the device queue.
> +            Memory regions acquired by GNA_GEM_NEW are part of request.
> +
> +GNA_WAIT blocks and waits on the submitted request.
> +

Use bullet lists for ioctl list above (with minor wording improv on
the whole section):

---- >8 ----

diff --git a/Documentation/gpu/gna.rst b/Documentation/gpu/gna.rst
index 7f3b7ce7e8f722..9a896664a3c29f 100644
--- a/Documentation/gpu/gna.rst
+++ b/Documentation/gpu/gna.rst
@@ -32,21 +32,22 @@ Multiple processes can independently file many requests to the driver. These req
 processed in a FIFO manner. The hardware can process one request at a time by using a FIFO
 queue.
 
-IOCTL
+ioctl
 -----
-Intel(R) GNA driver controls the device through IOCTL interfaces.
-Following IOCTL commands - handled by DRM framework - are supported:
+Intel(R) GNA driver controls the device through ioctl interfaces.
+The following commands (handled by DRM framework) are supported:
 
-GNA_GET_PARAMETER gets driver and device capabilities.
+  * GNA_GET_PARAMETER gets driver and device capabilities.
 
-GNA_GEM_NEW acquires new 4KB page aligned memory region ready for DMA operations.
+  * GNA_GEM_NEW allocates new 4KB page of aligned memory region ready for DMA
+    operations.
 
-GNA_GEM_FREE frees memory region back to system.
+  * GNA_GEM_FREE frees memory region back to system.
 
-GNA_COMPUTE submits a request to the device queue.
-            Memory regions acquired by GNA_GEM_NEW are part of request.
+  * GNA_COMPUTE submits a request to the device queue. Memory regions allocated
+    by GNA_GEM_NEW become part of the request payload.
 
-GNA_WAIT blocks and waits on the submitted request.
+  * GNA_WAIT blocks and waits on the submitted request.
 
 GNA MMU
 -------

Thanks.

-- 
An old man doll... just what I always wanted! - Clara

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  parent reply	other threads:[~2022-10-21  4:02 UTC|newest]

Thread overview: 73+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-20 17:53 [PATCH v5 00/10] Driver of Intel(R) Gaussian & Neural Accelerator Maciej Kwapulinski
2022-10-20 17:53 ` Maciej Kwapulinski
2022-10-20 17:53 ` [PATCH v5 01/10] gna: add PCI driver module Maciej Kwapulinski
2022-10-20 17:53   ` Maciej Kwapulinski
2022-10-20 18:49   ` Andy Shevchenko
2022-10-20 18:49     ` Andy Shevchenko
2022-10-21  4:02   ` Bagas Sanjaya [this message]
2022-10-21  4:02     ` Bagas Sanjaya
2022-10-21  4:20   ` Greg Kroah-Hartman
2022-10-21  4:20     ` Greg Kroah-Hartman
2022-10-21  8:10     ` Bagas Sanjaya
2022-10-21  8:10       ` Bagas Sanjaya
2022-10-21  8:27       ` Greg Kroah-Hartman
2022-10-21  8:27         ` Greg Kroah-Hartman
2022-10-24 13:40     ` Maciej Kwapulinski
2022-10-24 13:40       ` Maciej Kwapulinski
2022-10-20 17:53 ` [PATCH v5 02/10] gna: add GNA DRM device Maciej Kwapulinski
2022-10-20 17:53   ` Maciej Kwapulinski
2022-10-20 18:52   ` Andy Shevchenko
2022-10-20 18:52     ` Andy Shevchenko
2022-10-21  4:25   ` Greg Kroah-Hartman
2022-10-21  4:25     ` Greg Kroah-Hartman
2022-10-20 17:53 ` [PATCH v5 03/10] gna: read hardware info Maciej Kwapulinski
2022-10-20 17:53   ` Maciej Kwapulinski
2022-10-21  4:21   ` Greg Kroah-Hartman
2022-10-21  4:21     ` Greg Kroah-Hartman
2022-10-21  9:19   ` Linus Walleij
2022-10-21  9:19     ` Linus Walleij
2022-10-20 17:53 ` [PATCH v5 04/10] gna: initialize MMU Maciej Kwapulinski
2022-10-20 17:53   ` Maciej Kwapulinski
2022-10-20 19:00   ` Andy Shevchenko
2022-10-20 19:00     ` Andy Shevchenko
2022-10-20 19:01     ` Andy Shevchenko
2022-10-20 19:01       ` Andy Shevchenko
2022-10-20 17:53 ` [PATCH v5 05/10] gna: add GNA_GET_PARAMETER ioctl Maciej Kwapulinski
2022-10-20 17:53   ` Maciej Kwapulinski
2022-10-21  4:23   ` Greg Kroah-Hartman
2022-10-21  4:23     ` Greg Kroah-Hartman
2022-10-20 17:53 ` [PATCH v5 06/10] gna: add GNA_GEM_NEW and GNA_GEM_FREE ioctls Maciej Kwapulinski
2022-10-20 17:53   ` Maciej Kwapulinski
2022-10-20 19:06   ` Andy Shevchenko
2022-10-20 19:06     ` Andy Shevchenko
2022-10-20 17:53 ` [PATCH v5 07/10] gna: add GNA_COMPUTE ioctl Maciej Kwapulinski
2022-10-20 17:53   ` Maciej Kwapulinski
2022-10-21  9:30   ` Linus Walleij
2022-10-21  9:30     ` Linus Walleij
2022-10-21 11:52     ` Maciej Kwapulinski
2022-10-21 11:52       ` Maciej Kwapulinski
2022-10-21 11:57       ` Maciej Kwapulinski
2022-10-21 11:57         ` Maciej Kwapulinski
2022-10-20 17:53 ` [PATCH v5 08/10] gna: add GNA_WAIT ioctl Maciej Kwapulinski
2022-10-20 17:53   ` Maciej Kwapulinski
2022-10-21  4:25   ` Greg Kroah-Hartman
2022-10-21  4:25     ` Greg Kroah-Hartman
2022-10-20 17:53 ` [PATCH v5 09/10] gna: add power management Maciej Kwapulinski
2022-10-20 17:53   ` Maciej Kwapulinski
2022-10-21  9:37   ` Linus Walleij
2022-10-21  9:37     ` Linus Walleij
2022-10-20 17:53 ` [PATCH v5 10/10] gna: add open and close operations on GNA device Maciej Kwapulinski
2022-10-20 17:53   ` Maciej Kwapulinski
2022-10-21  4:27   ` Greg Kroah-Hartman
2022-10-21  4:27     ` Greg Kroah-Hartman
2022-10-21  9:23     ` Daniel Vetter
2022-10-21  9:23       ` Daniel Vetter
2022-10-20 19:08 ` [PATCH v5 00/10] Driver of Intel(R) Gaussian & Neural Accelerator Andy Shevchenko
2022-10-20 19:08   ` Andy Shevchenko
2022-10-21  4:17 ` Greg Kroah-Hartman
2022-10-21  4:17   ` Greg Kroah-Hartman
2022-10-24 13:21   ` Maciej Kwapulinski
2022-10-24 13:21     ` Maciej Kwapulinski
2022-10-24 11:29 ` Thomas Zimmermann
2023-01-24  8:25   ` Oded Gabbay
2023-01-24  8:25     ` Oded Gabbay

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