From: Mark Brown <broonie@kernel.org>
To: Ajye Huang <ajye_huang@compal.corp-partner.google.com>
Cc: robh@kernel.org, alsa-devel@alsa-project.org,
Charles Keepax <ckeepax@opensource.cirrus.com>,
devicetree@vger.kernel.org,
angelogioacchino.delregno@collabora.corp-partner.google.com,
Shengjiu Wang <shengjiu.wang@nxp.com>,
Takashi Iwai <tiwai@suse.com>,
linux-kernel@vger.kernel.org, Liam Girdwood <lgirdwood@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Subject: Re: [PATCH v1 2/2] ASoC: dmic: Add optional dmic selection
Date: Fri, 28 Oct 2022 12:57:58 +0100 [thread overview]
Message-ID: <Y1vDxtdNGURAT850@sirena.org.uk> (raw)
In-Reply-To: <20221028102450.1161382-3-ajye_huang@compal.corp-partner.google.com>
[-- Attachment #1: Type: text/plain, Size: 807 bytes --]
On Fri, Oct 28, 2022 at 06:24:50PM +0800, Ajye Huang wrote:
> + dmic->dmic_sel = devm_gpiod_get_optional(component->dev,
> + "dmic_sel", GPIOD_OUT_LOW);
> + if (IS_ERR(dmic->dmic_sel))
> + return PTR_ERR(dmic->dmic_sel);
> +
> snd_soc_component_set_drvdata(component, dmic);
>
> return 0;
> @@ -125,10 +172,15 @@ static const struct snd_soc_dapm_widget dmic_dapm_widgets[] = {
> SND_SOC_NOPM, 0, 0, dmic_aif_event,
> SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
> SND_SOC_DAPM_INPUT("DMic"),
> + SND_SOC_DAPM_MIC("DMIC", NULL),
> + SND_SOC_DAPM_MUX("Dmic Mux", SND_SOC_NOPM, 0, 0, &dmic_mux_control),
If we are doing this then adding the mux needs to be conditional on
having the GPIO, without the GPIO the control is at best confusing to
users.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
To: Ajye Huang <ajye_huang@compal.corp-partner.google.com>
Cc: linux-kernel@vger.kernel.org, Liam Girdwood <lgirdwood@gmail.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
robh@kernel.org, Shengjiu Wang <shengjiu.wang@nxp.com>,
Charles Keepax <ckeepax@opensource.cirrus.com>,
Takashi Iwai <tiwai@suse.com>, Jaroslav Kysela <perex@perex.cz>,
Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>,
angelogioacchino.delregno@collabora.corp-partner.google.com,
devicetree@vger.kernel.org, alsa-devel@alsa-project.org
Subject: Re: [PATCH v1 2/2] ASoC: dmic: Add optional dmic selection
Date: Fri, 28 Oct 2022 12:57:58 +0100 [thread overview]
Message-ID: <Y1vDxtdNGURAT850@sirena.org.uk> (raw)
In-Reply-To: <20221028102450.1161382-3-ajye_huang@compal.corp-partner.google.com>
[-- Attachment #1: Type: text/plain, Size: 807 bytes --]
On Fri, Oct 28, 2022 at 06:24:50PM +0800, Ajye Huang wrote:
> + dmic->dmic_sel = devm_gpiod_get_optional(component->dev,
> + "dmic_sel", GPIOD_OUT_LOW);
> + if (IS_ERR(dmic->dmic_sel))
> + return PTR_ERR(dmic->dmic_sel);
> +
> snd_soc_component_set_drvdata(component, dmic);
>
> return 0;
> @@ -125,10 +172,15 @@ static const struct snd_soc_dapm_widget dmic_dapm_widgets[] = {
> SND_SOC_NOPM, 0, 0, dmic_aif_event,
> SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
> SND_SOC_DAPM_INPUT("DMic"),
> + SND_SOC_DAPM_MIC("DMIC", NULL),
> + SND_SOC_DAPM_MUX("Dmic Mux", SND_SOC_NOPM, 0, 0, &dmic_mux_control),
If we are doing this then adding the mux needs to be conditional on
having the GPIO, without the GPIO the control is at best confusing to
users.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
next prev parent reply other threads:[~2022-10-28 11:59 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-28 10:24 [PATCH v1 0/2] Add optional dmic selection for two DMICs Ajye Huang
2022-10-28 10:24 ` Ajye Huang
2022-10-28 10:24 ` [PATCH v1 1/2] ASoC: dt-bindings: Document dmic_sel-gpios optional prop for two DMICs case Ajye Huang
2022-10-28 10:24 ` Ajye Huang
2022-10-28 11:56 ` Mark Brown
2022-10-28 11:56 ` Mark Brown
2022-10-31 18:43 ` Rob Herring
2022-10-31 18:43 ` Rob Herring
2022-10-31 20:47 ` Mark Brown
2022-10-31 20:47 ` Mark Brown
2022-11-01 1:04 ` Ajye Huang
2022-11-01 1:04 ` Ajye Huang
2022-11-01 1:07 ` Ajye Huang
2022-11-01 1:07 ` Ajye Huang
2022-10-28 10:24 ` [PATCH v1 2/2] ASoC: dmic: Add optional dmic selection Ajye Huang
2022-10-28 10:24 ` Ajye Huang
2022-10-28 11:44 ` Amadeusz Sławiński
2022-10-28 12:54 ` Ajye Huang
2022-10-28 12:54 ` Ajye Huang
2022-10-28 12:58 ` Mark Brown
2022-10-28 12:58 ` Mark Brown
2022-10-28 11:57 ` Mark Brown [this message]
2022-10-28 11:57 ` Mark Brown
2022-10-28 12:59 ` Ajye Huang
2022-10-28 12:59 ` Ajye Huang
2022-10-28 13:01 ` Mark Brown
2022-10-28 13:01 ` Mark Brown
2022-10-28 13:09 ` Ajye Huang
2022-10-28 13:09 ` Ajye Huang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Y1vDxtdNGURAT850@sirena.org.uk \
--to=broonie@kernel.org \
--cc=ajye_huang@compal.corp-partner.google.com \
--cc=alsa-devel@alsa-project.org \
--cc=angelogioacchino.delregno@collabora.corp-partner.google.com \
--cc=arnaud.pouliquen@foss.st.com \
--cc=ckeepax@opensource.cirrus.com \
--cc=devicetree@vger.kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=lgirdwood@gmail.com \
--cc=linux-kernel@vger.kernel.org \
--cc=robh+dt@kernel.org \
--cc=robh@kernel.org \
--cc=shengjiu.wang@nxp.com \
--cc=tiwai@suse.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.