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From: Conor Dooley <conor.dooley@microchip.com>
To: Samuel Holland <samuel@sholland.org>
Cc: <daniel.lezcano@linaro.org>, <tglx@linutronix.de>,
	Anup Patel <anup@brainfault.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Palmer Dabbelt <palmer@rivosinc.com>, <aou@eecs.berkeley.edu>,
	<atishp@atishpatra.org>, <dmitriy@oss-tech.org>,
	<paul.walmsley@sifive.com>, <linux-kernel@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v2] Revert "clocksource/drivers/riscv: Events are stopped during CPU suspend"
Date: Wed, 23 Nov 2022 09:04:13 +0000	[thread overview]
Message-ID: <Y33iDVTuSglaN0O4@wendy> (raw)
In-Reply-To: <a218ebf8-0fba-168d-6598-c970bbff5faf@sholland.org>

Hey Samuel,

On Tue, Nov 22, 2022 at 11:49:49PM -0600, Samuel Holland wrote:
> On 11/22/22 06:16, Conor Dooley wrote:
> > This reverts commit 232ccac1bd9b5bfe73895f527c08623e7fa0752d.

> > To fix this, the x86 C3STOP feature was enabled for the timer driver -
> 
> C3STOP isn't inherently x86-specific.

I think I originally had feature with "s around it & meant this as a
tongue-in-cheek reference to the header, which describes it as an "x86
(mis)feature" or something like that. Think I decided against that but
forgot to drop the x86 bit..
Could easily do s/x86// and it'd still make sense.

> > Fortunately, the D1 has a second timer, which is "currently used in
> > preference to the RISC-V/SBI timer driver" so a revert here does not
> > hurt operation of D1 in it's current form.
> 
> typo: its

Good spot :)

> Acked-by: Samuel Holland <samuel@sholland.org>

Thanks!

Perhaps the two minor commit message bits could be fixed on application?
Otherwise, I will send a reworded one in a few days.

Conor.


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WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor.dooley@microchip.com>
To: Samuel Holland <samuel@sholland.org>
Cc: <daniel.lezcano@linaro.org>, <tglx@linutronix.de>,
	Anup Patel <anup@brainfault.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Palmer Dabbelt <palmer@rivosinc.com>, <aou@eecs.berkeley.edu>,
	<atishp@atishpatra.org>, <dmitriy@oss-tech.org>,
	<paul.walmsley@sifive.com>, <linux-kernel@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v2] Revert "clocksource/drivers/riscv: Events are stopped during CPU suspend"
Date: Wed, 23 Nov 2022 09:04:13 +0000	[thread overview]
Message-ID: <Y33iDVTuSglaN0O4@wendy> (raw)
In-Reply-To: <a218ebf8-0fba-168d-6598-c970bbff5faf@sholland.org>

Hey Samuel,

On Tue, Nov 22, 2022 at 11:49:49PM -0600, Samuel Holland wrote:
> On 11/22/22 06:16, Conor Dooley wrote:
> > This reverts commit 232ccac1bd9b5bfe73895f527c08623e7fa0752d.

> > To fix this, the x86 C3STOP feature was enabled for the timer driver -
> 
> C3STOP isn't inherently x86-specific.

I think I originally had feature with "s around it & meant this as a
tongue-in-cheek reference to the header, which describes it as an "x86
(mis)feature" or something like that. Think I decided against that but
forgot to drop the x86 bit..
Could easily do s/x86// and it'd still make sense.

> > Fortunately, the D1 has a second timer, which is "currently used in
> > preference to the RISC-V/SBI timer driver" so a revert here does not
> > hurt operation of D1 in it's current form.
> 
> typo: its

Good spot :)

> Acked-by: Samuel Holland <samuel@sholland.org>

Thanks!

Perhaps the two minor commit message bits could be fixed on application?
Otherwise, I will send a reworded one in a few days.

Conor.


  reply	other threads:[~2022-11-23  9:04 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-22 12:16 [PATCH v2] Revert "clocksource/drivers/riscv: Events are stopped during CPU suspend" Conor Dooley
2022-11-22 12:16 ` Conor Dooley
2022-11-23  5:49 ` Samuel Holland
2022-11-23  5:49   ` Samuel Holland
2022-11-23  9:04   ` Conor Dooley [this message]
2022-11-23  9:04     ` Conor Dooley
2022-12-01 11:13 ` [tip: timers/urgent] " tip-bot2 for Conor Dooley

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