From: Bagas Sanjaya <bagasdotme@gmail.com>
To: Junhao He <hejunhao3@huawei.com>
Cc: mathieu.poirier@linaro.org, suzuki.poulose@arm.com,
mike.leach@linaro.org, leo.yan@linaro.org,
jonathan.cameron@huawei.com, john.garry@huawei.com,
coresight@lists.linaro.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
lpieralisi@kernel.org, linuxarm@huawei.com,
yangyicong@huawei.com, liuqi115@huawei.com,
f.fangjian@huawei.com, prime.zeng@hisilicon.com
Subject: Re: [PATCH v13 2/2] Documentation: Add document for UltraSoc SMB drivers
Date: Mon, 14 Nov 2022 20:57:29 +0700 [thread overview]
Message-ID: <Y3JJSfVoatl5yKlm@debian.me> (raw)
In-Reply-To: <20221114090316.63157-3-hejunhao3@huawei.com>
[-- Attachment #1: Type: text/plain, Size: 8878 bytes --]
On Mon, Nov 14, 2022 at 05:03:16PM +0800, Junhao He wrote:
> diff --git a/Documentation/trace/coresight/ultrasoc-smb.rst b/Documentation/trace/coresight/ultrasoc-smb.rst
> new file mode 100644
> index 000000000000..b7fe3f5c7f53
> --- /dev/null
> +++ b/Documentation/trace/coresight/ultrasoc-smb.rst
> @@ -0,0 +1,82 @@
> +.. SPDX-License-Identifier: GPL-2.0
> +
> +======================================
> +UltraSoc - HW Assisted Tracing on SoC
> +======================================
> + :Author: Qi Liu <liuqi115@huawei.com>
> + :Date: March 2022
> +
> +Introduction
> +------------
> +
> +UltraSoc SMB is a per SCCL(Super CPU Cluster) hardware, and it provides a
> +way to buffer and store CPU trace messages in a region of shared system
> +memory. SMB is plugged as a coresight sink device and the corresponding
> +trace generators (ETM) are plugged in as source devices.
> +
> +Sysfs files and directories
> +---------------------------
> +
> +The SMB devices appear on the existing coresight bus alongside the other
> +coresight devices::
> +
> + $# ls /sys/bus/coresight/devices/
> + ultra_smb0 ultra_smb1 ultra_smb2 ultra_smb3
> +
> +The ``ultra_smb<N>`` named SMB associated with SCCL.::
> +
> + $# ls /sys/bus/coresight/devices/ultra_smb0
> + enable_sink mgmt
> + $# ls /sys/bus/coresight/devices/ultra_smb0/mgmt
> + buf_size buf_status read_pos write_pos
> +
> +*Key file items are:-*
> + * ``read_pos``: Shows the value held by UltraSoc SMB Read Pointer register.
> + * ``write_pos``: Shows the value held by UltraSoc SMB Write Pointer register.
> + * ``buf_status``: Shows the value held by UltraSoc SMB status register.
> + BIT(0) is zero means buffer is empty.
> + * ``buf_size``: Shows the buffer size of each UltraSoc SMB device.
The key list above doesn't look right, so I have applied the fixup:
---- >8 ----
diff --git a/Documentation/trace/coresight/ultrasoc-smb.rst b/Documentation/trace/coresight/ultrasoc-smb.rst
index b7fe3f5c7f53f7..5d0fa1a76b04d1 100644
--- a/Documentation/trace/coresight/ultrasoc-smb.rst
+++ b/Documentation/trace/coresight/ultrasoc-smb.rst
@@ -30,11 +30,12 @@ The ``ultra_smb<N>`` named SMB associated with SCCL.::
$# ls /sys/bus/coresight/devices/ultra_smb0/mgmt
buf_size buf_status read_pos write_pos
-*Key file items are:-*
+Key file items are:
+
* ``read_pos``: Shows the value held by UltraSoc SMB Read Pointer register.
* ``write_pos``: Shows the value held by UltraSoc SMB Write Pointer register.
* ``buf_status``: Shows the value held by UltraSoc SMB status register.
- BIT(0) is zero means buffer is empty.
+ BIT(0) is zero means buffer is empty.
* ``buf_size``: Shows the buffer size of each UltraSoc SMB device.
Firmware Bindings
> +
> +Firmware Bindings
> +---------------------------
> +
> +SMB device is only supported with ACPI, and ACPI binding of SMB device
> +describes SMB device indentifier, resource information and graph structure.
> +
> +SMB is identified by ACPI HID "HISI03A1", resource of device is declared using
> +the _CRS method. Each SMB must present two base address, the first one is the
> +configuration base address of SMB device, the second one is the 32bits base
> +address of shared system memory.
> +
> +examples::
> +
> + Device(USMB) { \
> + Name(_HID, "HISI03A1") \
> + Name(_CRS, ResourceTemplate() { \
> + QWordMemory (ResourceConsumer, , MinFixed, MaxFixed, NonCacheable, \
> + ReadWrite, 0x0, 0x95100000, 0x951FFFFF, 0x0, 0x100000) \
> + QWordMemory (ResourceConsumer, , MinFixed, MaxFixed, Cacheable, \
> + ReadWrite, 0x0, 0x50000000, 0x53FFFFFF, 0x0, 0x4000000) \
> + }) \
> + Name(_DSD, Package() { \
> + ToUUID("ab02a46b-74c7-45a2-bd68-f7d344ef2153"), \
> + /* Use CoreSight Graph ACPI bindings to describe connections topology */
> + Package() { \
> + 0, \
> + 1, \
> + Package() { \
> + 1, \
> + ToUUID("3ecbc8b6-1d0e-4fb3-8107-e627f805c6cd"), \
> + 8, \
> + Package() {0x8, 0, \_SB.S00.SL11.CL28.F008, 0}, \
> + Package() {0x9, 0, \_SB.S00.SL11.CL29.F009, 0}, \
> + Package() {0xa, 0, \_SB.S00.SL11.CL2A.F010, 0}, \
> + Package() {0xb, 0, \_SB.S00.SL11.CL2B.F011, 0}, \
> + Package() {0xc, 0, \_SB.S00.SL11.CL2C.F012, 0}, \
> + Package() {0xd, 0, \_SB.S00.SL11.CL2D.F013, 0}, \
> + Package() {0xe, 0, \_SB.S00.SL11.CL2E.F014, 0}, \
> + Package() {0xf, 0, \_SB.S00.SL11.CL2F.F015, 0}, \
> + } \
> + } \
> + }) \
> + }
The rest of wordings also read a rather weird. What about below instead?
---- >8 ----
diff --git a/Documentation/trace/coresight/ultrasoc-smb.rst b/Documentation/trace/coresight/ultrasoc-smb.rst
index 5d0fa1a76b04d1..eee32cbf90d2ea 100644
--- a/Documentation/trace/coresight/ultrasoc-smb.rst
+++ b/Documentation/trace/coresight/ultrasoc-smb.rst
@@ -9,21 +9,21 @@ UltraSoc - HW Assisted Tracing on SoC
Introduction
------------
-UltraSoc SMB is a per SCCL(Super CPU Cluster) hardware, and it provides a
+UltraSoc SMB is a per SCCL (Super CPU Cluster) hardware. It provides a
way to buffer and store CPU trace messages in a region of shared system
-memory. SMB is plugged as a coresight sink device and the corresponding
-trace generators (ETM) are plugged in as source devices.
+memory. The device acts as a coresight sink device and the
+corresponding trace generators (ETM) are attached as source devices.
Sysfs files and directories
---------------------------
-The SMB devices appear on the existing coresight bus alongside the other
-coresight devices::
+The SMB devices appear on the existing coresight bus alongside other
+devices::
$# ls /sys/bus/coresight/devices/
ultra_smb0 ultra_smb1 ultra_smb2 ultra_smb3
-The ``ultra_smb<N>`` named SMB associated with SCCL.::
+The ``ultra_smb<N>`` names SMB device associated with SCCL.::
$# ls /sys/bus/coresight/devices/ultra_smb0
enable_sink mgmt
@@ -32,24 +32,23 @@ The ``ultra_smb<N>`` named SMB associated with SCCL.::
Key file items are:
- * ``read_pos``: Shows the value held by UltraSoc SMB Read Pointer register.
- * ``write_pos``: Shows the value held by UltraSoc SMB Write Pointer register.
- * ``buf_status``: Shows the value held by UltraSoc SMB status register.
- BIT(0) is zero means buffer is empty.
- * ``buf_size``: Shows the buffer size of each UltraSoc SMB device.
+ * ``read_pos``: Shows the value on the read pointer register.
+ * ``write_pos``: Shows the value on the write pointer register.
+ * ``buf_status``: Shows the value on the status register.
+ BIT(0) is zero value which means the buffer is empty.
+ * ``buf_size``: Shows the buffer size of each device.
Firmware Bindings
----------------------------
+-----------------
-SMB device is only supported with ACPI, and ACPI binding of SMB device
-describes SMB device indentifier, resource information and graph structure.
+The device is only supported with ACPI. Its binding describes device
+identifier, resource information and graph structure.
-SMB is identified by ACPI HID "HISI03A1", resource of device is declared using
-the _CRS method. Each SMB must present two base address, the first one is the
-configuration base address of SMB device, the second one is the 32bits base
-address of shared system memory.
+The device is identified as ACPI HID "HISI03A1". Device resources are allocated
+using the _CRS method. Each device must present two base address; the first one is the configuration base address of the device, the second one is the 32-bit
+base address of shared system memory.
-examples::
+Example::
Device(USMB) { \
Name(_HID, "HISI03A1") \
Thanks.
--
An old man doll... just what I always wanted! - Clara
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Bagas Sanjaya <bagasdotme@gmail.com>
To: Junhao He <hejunhao3@huawei.com>
Cc: mathieu.poirier@linaro.org, suzuki.poulose@arm.com,
mike.leach@linaro.org, leo.yan@linaro.org,
jonathan.cameron@huawei.com, john.garry@huawei.com,
coresight@lists.linaro.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
lpieralisi@kernel.org, linuxarm@huawei.com,
yangyicong@huawei.com, liuqi115@huawei.com,
f.fangjian@huawei.com, prime.zeng@hisilicon.com
Subject: Re: [PATCH v13 2/2] Documentation: Add document for UltraSoc SMB drivers
Date: Mon, 14 Nov 2022 20:57:29 +0700 [thread overview]
Message-ID: <Y3JJSfVoatl5yKlm@debian.me> (raw)
In-Reply-To: <20221114090316.63157-3-hejunhao3@huawei.com>
[-- Attachment #1.1: Type: text/plain, Size: 8878 bytes --]
On Mon, Nov 14, 2022 at 05:03:16PM +0800, Junhao He wrote:
> diff --git a/Documentation/trace/coresight/ultrasoc-smb.rst b/Documentation/trace/coresight/ultrasoc-smb.rst
> new file mode 100644
> index 000000000000..b7fe3f5c7f53
> --- /dev/null
> +++ b/Documentation/trace/coresight/ultrasoc-smb.rst
> @@ -0,0 +1,82 @@
> +.. SPDX-License-Identifier: GPL-2.0
> +
> +======================================
> +UltraSoc - HW Assisted Tracing on SoC
> +======================================
> + :Author: Qi Liu <liuqi115@huawei.com>
> + :Date: March 2022
> +
> +Introduction
> +------------
> +
> +UltraSoc SMB is a per SCCL(Super CPU Cluster) hardware, and it provides a
> +way to buffer and store CPU trace messages in a region of shared system
> +memory. SMB is plugged as a coresight sink device and the corresponding
> +trace generators (ETM) are plugged in as source devices.
> +
> +Sysfs files and directories
> +---------------------------
> +
> +The SMB devices appear on the existing coresight bus alongside the other
> +coresight devices::
> +
> + $# ls /sys/bus/coresight/devices/
> + ultra_smb0 ultra_smb1 ultra_smb2 ultra_smb3
> +
> +The ``ultra_smb<N>`` named SMB associated with SCCL.::
> +
> + $# ls /sys/bus/coresight/devices/ultra_smb0
> + enable_sink mgmt
> + $# ls /sys/bus/coresight/devices/ultra_smb0/mgmt
> + buf_size buf_status read_pos write_pos
> +
> +*Key file items are:-*
> + * ``read_pos``: Shows the value held by UltraSoc SMB Read Pointer register.
> + * ``write_pos``: Shows the value held by UltraSoc SMB Write Pointer register.
> + * ``buf_status``: Shows the value held by UltraSoc SMB status register.
> + BIT(0) is zero means buffer is empty.
> + * ``buf_size``: Shows the buffer size of each UltraSoc SMB device.
The key list above doesn't look right, so I have applied the fixup:
---- >8 ----
diff --git a/Documentation/trace/coresight/ultrasoc-smb.rst b/Documentation/trace/coresight/ultrasoc-smb.rst
index b7fe3f5c7f53f7..5d0fa1a76b04d1 100644
--- a/Documentation/trace/coresight/ultrasoc-smb.rst
+++ b/Documentation/trace/coresight/ultrasoc-smb.rst
@@ -30,11 +30,12 @@ The ``ultra_smb<N>`` named SMB associated with SCCL.::
$# ls /sys/bus/coresight/devices/ultra_smb0/mgmt
buf_size buf_status read_pos write_pos
-*Key file items are:-*
+Key file items are:
+
* ``read_pos``: Shows the value held by UltraSoc SMB Read Pointer register.
* ``write_pos``: Shows the value held by UltraSoc SMB Write Pointer register.
* ``buf_status``: Shows the value held by UltraSoc SMB status register.
- BIT(0) is zero means buffer is empty.
+ BIT(0) is zero means buffer is empty.
* ``buf_size``: Shows the buffer size of each UltraSoc SMB device.
Firmware Bindings
> +
> +Firmware Bindings
> +---------------------------
> +
> +SMB device is only supported with ACPI, and ACPI binding of SMB device
> +describes SMB device indentifier, resource information and graph structure.
> +
> +SMB is identified by ACPI HID "HISI03A1", resource of device is declared using
> +the _CRS method. Each SMB must present two base address, the first one is the
> +configuration base address of SMB device, the second one is the 32bits base
> +address of shared system memory.
> +
> +examples::
> +
> + Device(USMB) { \
> + Name(_HID, "HISI03A1") \
> + Name(_CRS, ResourceTemplate() { \
> + QWordMemory (ResourceConsumer, , MinFixed, MaxFixed, NonCacheable, \
> + ReadWrite, 0x0, 0x95100000, 0x951FFFFF, 0x0, 0x100000) \
> + QWordMemory (ResourceConsumer, , MinFixed, MaxFixed, Cacheable, \
> + ReadWrite, 0x0, 0x50000000, 0x53FFFFFF, 0x0, 0x4000000) \
> + }) \
> + Name(_DSD, Package() { \
> + ToUUID("ab02a46b-74c7-45a2-bd68-f7d344ef2153"), \
> + /* Use CoreSight Graph ACPI bindings to describe connections topology */
> + Package() { \
> + 0, \
> + 1, \
> + Package() { \
> + 1, \
> + ToUUID("3ecbc8b6-1d0e-4fb3-8107-e627f805c6cd"), \
> + 8, \
> + Package() {0x8, 0, \_SB.S00.SL11.CL28.F008, 0}, \
> + Package() {0x9, 0, \_SB.S00.SL11.CL29.F009, 0}, \
> + Package() {0xa, 0, \_SB.S00.SL11.CL2A.F010, 0}, \
> + Package() {0xb, 0, \_SB.S00.SL11.CL2B.F011, 0}, \
> + Package() {0xc, 0, \_SB.S00.SL11.CL2C.F012, 0}, \
> + Package() {0xd, 0, \_SB.S00.SL11.CL2D.F013, 0}, \
> + Package() {0xe, 0, \_SB.S00.SL11.CL2E.F014, 0}, \
> + Package() {0xf, 0, \_SB.S00.SL11.CL2F.F015, 0}, \
> + } \
> + } \
> + }) \
> + }
The rest of wordings also read a rather weird. What about below instead?
---- >8 ----
diff --git a/Documentation/trace/coresight/ultrasoc-smb.rst b/Documentation/trace/coresight/ultrasoc-smb.rst
index 5d0fa1a76b04d1..eee32cbf90d2ea 100644
--- a/Documentation/trace/coresight/ultrasoc-smb.rst
+++ b/Documentation/trace/coresight/ultrasoc-smb.rst
@@ -9,21 +9,21 @@ UltraSoc - HW Assisted Tracing on SoC
Introduction
------------
-UltraSoc SMB is a per SCCL(Super CPU Cluster) hardware, and it provides a
+UltraSoc SMB is a per SCCL (Super CPU Cluster) hardware. It provides a
way to buffer and store CPU trace messages in a region of shared system
-memory. SMB is plugged as a coresight sink device and the corresponding
-trace generators (ETM) are plugged in as source devices.
+memory. The device acts as a coresight sink device and the
+corresponding trace generators (ETM) are attached as source devices.
Sysfs files and directories
---------------------------
-The SMB devices appear on the existing coresight bus alongside the other
-coresight devices::
+The SMB devices appear on the existing coresight bus alongside other
+devices::
$# ls /sys/bus/coresight/devices/
ultra_smb0 ultra_smb1 ultra_smb2 ultra_smb3
-The ``ultra_smb<N>`` named SMB associated with SCCL.::
+The ``ultra_smb<N>`` names SMB device associated with SCCL.::
$# ls /sys/bus/coresight/devices/ultra_smb0
enable_sink mgmt
@@ -32,24 +32,23 @@ The ``ultra_smb<N>`` named SMB associated with SCCL.::
Key file items are:
- * ``read_pos``: Shows the value held by UltraSoc SMB Read Pointer register.
- * ``write_pos``: Shows the value held by UltraSoc SMB Write Pointer register.
- * ``buf_status``: Shows the value held by UltraSoc SMB status register.
- BIT(0) is zero means buffer is empty.
- * ``buf_size``: Shows the buffer size of each UltraSoc SMB device.
+ * ``read_pos``: Shows the value on the read pointer register.
+ * ``write_pos``: Shows the value on the write pointer register.
+ * ``buf_status``: Shows the value on the status register.
+ BIT(0) is zero value which means the buffer is empty.
+ * ``buf_size``: Shows the buffer size of each device.
Firmware Bindings
----------------------------
+-----------------
-SMB device is only supported with ACPI, and ACPI binding of SMB device
-describes SMB device indentifier, resource information and graph structure.
+The device is only supported with ACPI. Its binding describes device
+identifier, resource information and graph structure.
-SMB is identified by ACPI HID "HISI03A1", resource of device is declared using
-the _CRS method. Each SMB must present two base address, the first one is the
-configuration base address of SMB device, the second one is the 32bits base
-address of shared system memory.
+The device is identified as ACPI HID "HISI03A1". Device resources are allocated
+using the _CRS method. Each device must present two base address; the first one is the configuration base address of the device, the second one is the 32-bit
+base address of shared system memory.
-examples::
+Example::
Device(USMB) { \
Name(_HID, "HISI03A1") \
Thanks.
--
An old man doll... just what I always wanted! - Clara
[-- Attachment #1.2: signature.asc --]
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[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
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next prev parent reply other threads:[~2022-11-14 13:57 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-14 9:03 [PATCH v13 0/2] Add support for UltraSoc System Memory Buffer Junhao He
2022-11-14 9:03 ` Junhao He
2022-11-14 9:03 ` [PATCH v13 1/2] drivers/coresight: Add UltraSoc System Memory Buffer driver Junhao He
2022-11-14 9:03 ` Junhao He
2022-11-15 11:06 ` Suzuki K Poulose
2022-11-15 11:06 ` Suzuki K Poulose
2022-11-18 12:45 ` hejunhao
2022-11-18 12:45 ` hejunhao
2022-11-21 10:47 ` Suzuki Kuruppassery Poulose
2022-11-21 10:47 ` Suzuki Kuruppassery Poulose
2022-11-22 13:23 ` hejunhao
2022-11-22 13:23 ` hejunhao
2022-11-22 14:06 ` Suzuki K Poulose
2022-11-22 14:06 ` Suzuki K Poulose
2022-11-23 6:54 ` hejunhao
2022-11-23 6:54 ` hejunhao
2022-11-14 9:03 ` [PATCH v13 2/2] Documentation: Add document for UltraSoc SMB drivers Junhao He
2022-11-14 9:03 ` Junhao He
2022-11-14 13:57 ` Bagas Sanjaya [this message]
2022-11-14 13:57 ` Bagas Sanjaya
2022-11-15 7:33 ` hejunhao
2022-11-15 7:33 ` hejunhao
2022-11-15 7:35 ` Bagas Sanjaya
2022-11-15 7:35 ` Bagas Sanjaya
2022-11-15 11:01 ` hejunhao
2022-11-15 11:01 ` hejunhao
2022-11-14 13:11 ` [PATCH v13 0/2] Add support for UltraSoc System Memory Buffer Bagas Sanjaya
2022-11-14 13:11 ` Bagas Sanjaya
2022-11-15 7:52 ` hejunhao
2022-11-15 7:52 ` hejunhao
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