* [Intel-gfx] [PATCH 0/1] i915/mtl: Enable idle messaging for GSC CS @ 2022-11-15 13:44 ` Badal Nilawar 0 siblings, 0 replies; 14+ messages in thread From: Badal Nilawar @ 2022-11-15 13:44 UTC (permalink / raw) To: intel-gfx; +Cc: dri-devel, rodrigo.vivi This series includes code change to enable idle messaging for GSC CS. v2: - Dropped dependency patch and rebased - Fixed review comments Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Vinay Belgaumkar (1): drm/i915/mtl: Enable Idle Messaging for GSC CS drivers/gpu/drm/i915/gt/intel_engine_pm.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4 ++++ 2 files changed, 22 insertions(+) -- 2.25.1 ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 0/1] i915/mtl: Enable idle messaging for GSC CS @ 2022-11-15 13:44 ` Badal Nilawar 0 siblings, 0 replies; 14+ messages in thread From: Badal Nilawar @ 2022-11-15 13:44 UTC (permalink / raw) To: intel-gfx Cc: radhakrishna.sripada, anshuman.gupta, dri-devel, ashutosh.dixit, jon.ewins, daniele.ceraolospurio, rodrigo.vivi, vinay.belgaumkar This series includes code change to enable idle messaging for GSC CS. v2: - Dropped dependency patch and rebased - Fixed review comments Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Vinay Belgaumkar (1): drm/i915/mtl: Enable Idle Messaging for GSC CS drivers/gpu/drm/i915/gt/intel_engine_pm.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4 ++++ 2 files changed, 22 insertions(+) -- 2.25.1 ^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH 1/1] drm/i915/mtl: Enable Idle Messaging for GSC CS 2022-11-15 13:44 ` Badal Nilawar @ 2022-11-15 13:44 ` Badal Nilawar -1 siblings, 0 replies; 14+ messages in thread From: Badal Nilawar @ 2022-11-15 13:44 UTC (permalink / raw) To: intel-gfx; +Cc: dri-devel, rodrigo.vivi From: Vinay Belgaumkar <vinay.belgaumkar@intel.com> By defaut idle mesaging is disabled for GSC CS so to unblock RC6 entry on media tile idle messaging need to be enabled. v2: - Fix review comments (Vinay) - Set GSC idle hysterisis to 5 us (Badal) Bspec: 71496 Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com> --- drivers/gpu/drm/i915/gt/intel_engine_pm.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4 ++++ 2 files changed, 22 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c index b0a4a2dbe3ee..5522885b2db0 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c @@ -15,6 +15,22 @@ #include "intel_rc6.h" #include "intel_ring.h" #include "shmem_utils.h" +#include "intel_gt_regs.h" + +static void intel_gsc_idle_msg_enable(struct intel_engine_cs *engine) +{ + struct drm_i915_private *i915 = engine->i915; + + if (IS_METEORLAKE(i915) && engine->id == GSC0) { + intel_uncore_write(engine->gt->uncore, + RC_PSMI_CTRL_GSCCS, + _MASKED_BIT_DISABLE(IDLE_MSG_DISABLE)); + /* 5 us hysterisis */ + intel_uncore_write(engine->gt->uncore, + PWRCTX_MAXCNT_GSCCS, + 0xA); + } +} static void dbg_poison_ce(struct intel_context *ce) { @@ -275,6 +291,8 @@ void intel_engine_init__pm(struct intel_engine_cs *engine) intel_wakeref_init(&engine->wakeref, rpm, &wf_ops); intel_engine_init_heartbeat(engine); + + intel_gsc_idle_msg_enable(engine); } /** diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h index 07031e03f80c..20472eb15364 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h @@ -913,6 +913,10 @@ #define MSG_IDLE_FW_MASK REG_GENMASK(13, 9) #define MSG_IDLE_FW_SHIFT 9 +#define RC_PSMI_CTRL_GSCCS _MMIO(0x11a050) +#define IDLE_MSG_DISABLE BIT(0) +#define PWRCTX_MAXCNT_GSCCS _MMIO(0x11a054) + #define FORCEWAKE_MEDIA_GEN9 _MMIO(0xa270) #define FORCEWAKE_RENDER_GEN9 _MMIO(0xa278) -- 2.25.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 1/1] drm/i915/mtl: Enable Idle Messaging for GSC CS @ 2022-11-15 13:44 ` Badal Nilawar 0 siblings, 0 replies; 14+ messages in thread From: Badal Nilawar @ 2022-11-15 13:44 UTC (permalink / raw) To: intel-gfx Cc: radhakrishna.sripada, anshuman.gupta, dri-devel, ashutosh.dixit, jon.ewins, daniele.ceraolospurio, rodrigo.vivi, vinay.belgaumkar From: Vinay Belgaumkar <vinay.belgaumkar@intel.com> By defaut idle mesaging is disabled for GSC CS so to unblock RC6 entry on media tile idle messaging need to be enabled. v2: - Fix review comments (Vinay) - Set GSC idle hysterisis to 5 us (Badal) Bspec: 71496 Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com> --- drivers/gpu/drm/i915/gt/intel_engine_pm.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4 ++++ 2 files changed, 22 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c index b0a4a2dbe3ee..5522885b2db0 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c @@ -15,6 +15,22 @@ #include "intel_rc6.h" #include "intel_ring.h" #include "shmem_utils.h" +#include "intel_gt_regs.h" + +static void intel_gsc_idle_msg_enable(struct intel_engine_cs *engine) +{ + struct drm_i915_private *i915 = engine->i915; + + if (IS_METEORLAKE(i915) && engine->id == GSC0) { + intel_uncore_write(engine->gt->uncore, + RC_PSMI_CTRL_GSCCS, + _MASKED_BIT_DISABLE(IDLE_MSG_DISABLE)); + /* 5 us hysterisis */ + intel_uncore_write(engine->gt->uncore, + PWRCTX_MAXCNT_GSCCS, + 0xA); + } +} static void dbg_poison_ce(struct intel_context *ce) { @@ -275,6 +291,8 @@ void intel_engine_init__pm(struct intel_engine_cs *engine) intel_wakeref_init(&engine->wakeref, rpm, &wf_ops); intel_engine_init_heartbeat(engine); + + intel_gsc_idle_msg_enable(engine); } /** diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h index 07031e03f80c..20472eb15364 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h @@ -913,6 +913,10 @@ #define MSG_IDLE_FW_MASK REG_GENMASK(13, 9) #define MSG_IDLE_FW_SHIFT 9 +#define RC_PSMI_CTRL_GSCCS _MMIO(0x11a050) +#define IDLE_MSG_DISABLE BIT(0) +#define PWRCTX_MAXCNT_GSCCS _MMIO(0x11a054) + #define FORCEWAKE_MEDIA_GEN9 _MMIO(0xa270) #define FORCEWAKE_RENDER_GEN9 _MMIO(0xa278) -- 2.25.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/mtl: Enable Idle Messaging for GSC CS 2022-11-15 13:44 ` Badal Nilawar (?) @ 2022-11-15 15:27 ` Rodrigo Vivi 2022-11-17 6:45 ` Nilawar, Badal -1 siblings, 1 reply; 14+ messages in thread From: Rodrigo Vivi @ 2022-11-15 15:27 UTC (permalink / raw) To: Badal Nilawar; +Cc: intel-gfx, dri-devel On Tue, Nov 15, 2022 at 07:14:40PM +0530, Badal Nilawar wrote: > From: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > > By defaut idle mesaging is disabled for GSC CS so to unblock RC6 > entry on media tile idle messaging need to be enabled. > > v2: > - Fix review comments (Vinay) > - Set GSC idle hysterisis to 5 us (Badal) btw, no need for the cover letter in single/standalone patches. This history here is enough. > > Bspec: 71496 > > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > Signed-off-by: Badal Nilawar <badal.nilawar@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_engine_pm.c | 18 ++++++++++++++++++ > drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4 ++++ > 2 files changed, 22 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c > index b0a4a2dbe3ee..5522885b2db0 100644 > --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c > +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c > @@ -15,6 +15,22 @@ > #include "intel_rc6.h" > #include "intel_ring.h" > #include "shmem_utils.h" > +#include "intel_gt_regs.h" > + > +static void intel_gsc_idle_msg_enable(struct intel_engine_cs *engine) > +{ > + struct drm_i915_private *i915 = engine->i915; > + > + if (IS_METEORLAKE(i915) && engine->id == GSC0) { > + intel_uncore_write(engine->gt->uncore, > + RC_PSMI_CTRL_GSCCS, > + _MASKED_BIT_DISABLE(IDLE_MSG_DISABLE)); > + /* 5 us hysterisis */ typo > + intel_uncore_write(engine->gt->uncore, > + PWRCTX_MAXCNT_GSCCS, > + 0xA); you said 5 above, but used 10 here, why? > + } > +} > > static void dbg_poison_ce(struct intel_context *ce) > { > @@ -275,6 +291,8 @@ void intel_engine_init__pm(struct intel_engine_cs *engine) > > intel_wakeref_init(&engine->wakeref, rpm, &wf_ops); > intel_engine_init_heartbeat(engine); > + > + intel_gsc_idle_msg_enable(engine); > } > > /** > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h > index 07031e03f80c..20472eb15364 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h > +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h > @@ -913,6 +913,10 @@ > #define MSG_IDLE_FW_MASK REG_GENMASK(13, 9) > #define MSG_IDLE_FW_SHIFT 9 > > +#define RC_PSMI_CTRL_GSCCS _MMIO(0x11a050) > +#define IDLE_MSG_DISABLE BIT(0) REG_BIT should be preferred. > +#define PWRCTX_MAXCNT_GSCCS _MMIO(0x11a054) > + > #define FORCEWAKE_MEDIA_GEN9 _MMIO(0xa270) > #define FORCEWAKE_RENDER_GEN9 _MMIO(0xa278) > > -- > 2.25.1 > ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/mtl: Enable Idle Messaging for GSC CS 2022-11-15 15:27 ` [Intel-gfx] " Rodrigo Vivi @ 2022-11-17 6:45 ` Nilawar, Badal 0 siblings, 0 replies; 14+ messages in thread From: Nilawar, Badal @ 2022-11-17 6:45 UTC (permalink / raw) To: Rodrigo Vivi; +Cc: intel-gfx, dri-devel Hi Rodrigo, On 15-11-2022 20:57, Rodrigo Vivi wrote: > On Tue, Nov 15, 2022 at 07:14:40PM +0530, Badal Nilawar wrote: >> From: Vinay Belgaumkar <vinay.belgaumkar@intel.com> >> >> By defaut idle mesaging is disabled for GSC CS so to unblock RC6 >> entry on media tile idle messaging need to be enabled. >> >> v2: >> - Fix review comments (Vinay) >> - Set GSC idle hysterisis to 5 us (Badal) > > btw, no need for the cover letter in single/standalone patches. > This history here is enough. Sure, next revision I will take care of this. > >> >> Bspec: 71496 >> >> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> >> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> >> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com> >> --- >> drivers/gpu/drm/i915/gt/intel_engine_pm.c | 18 ++++++++++++++++++ >> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4 ++++ >> 2 files changed, 22 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c >> index b0a4a2dbe3ee..5522885b2db0 100644 >> --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c >> +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c >> @@ -15,6 +15,22 @@ >> #include "intel_rc6.h" >> #include "intel_ring.h" >> #include "shmem_utils.h" >> +#include "intel_gt_regs.h" >> + >> +static void intel_gsc_idle_msg_enable(struct intel_engine_cs *engine) >> +{ >> + struct drm_i915_private *i915 = engine->i915; >> + >> + if (IS_METEORLAKE(i915) && engine->id == GSC0) { >> + intel_uncore_write(engine->gt->uncore, >> + RC_PSMI_CTRL_GSCCS, >> + _MASKED_BIT_DISABLE(IDLE_MSG_DISABLE)); >> + /* 5 us hysterisis */ > > typo > >> + intel_uncore_write(engine->gt->uncore, >> + PWRCTX_MAXCNT_GSCCS, >> + 0xA); > > you said 5 above, but used 10 here, why? Bspec:71496 specifies 0xA = 5us. > >> + } >> +} >> >> static void dbg_poison_ce(struct intel_context *ce) >> { >> @@ -275,6 +291,8 @@ void intel_engine_init__pm(struct intel_engine_cs *engine) >> >> intel_wakeref_init(&engine->wakeref, rpm, &wf_ops); >> intel_engine_init_heartbeat(engine); >> + >> + intel_gsc_idle_msg_enable(engine); >> } >> >> /** >> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h >> index 07031e03f80c..20472eb15364 100644 >> --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h >> +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h >> @@ -913,6 +913,10 @@ >> #define MSG_IDLE_FW_MASK REG_GENMASK(13, 9) >> #define MSG_IDLE_FW_SHIFT 9 >> >> +#define RC_PSMI_CTRL_GSCCS _MMIO(0x11a050) >> +#define IDLE_MSG_DISABLE BIT(0) > > REG_BIT should be preferred. I will take care of this and above comments in next revision. Regards, Badal > >> +#define PWRCTX_MAXCNT_GSCCS _MMIO(0x11a054) >> + >> #define FORCEWAKE_MEDIA_GEN9 _MMIO(0xa270) >> #define FORCEWAKE_RENDER_GEN9 _MMIO(0xa278) >> >> -- >> 2.25.1 >> ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/mtl: Enable Idle Messaging for GSC CS 2022-11-15 13:44 ` Badal Nilawar @ 2022-11-16 18:05 ` Belgaumkar, Vinay -1 siblings, 0 replies; 14+ messages in thread From: Belgaumkar, Vinay @ 2022-11-16 18:05 UTC (permalink / raw) To: Badal Nilawar, intel-gfx; +Cc: dri-devel, rodrigo.vivi On 11/15/2022 5:44 AM, Badal Nilawar wrote: > From: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > > By defaut idle mesaging is disabled for GSC CS so to unblock RC6 > entry on media tile idle messaging need to be enabled. > > v2: > - Fix review comments (Vinay) > - Set GSC idle hysterisis to 5 us (Badal) > > Bspec: 71496 > > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > Signed-off-by: Badal Nilawar <badal.nilawar@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_engine_pm.c | 18 ++++++++++++++++++ > drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4 ++++ > 2 files changed, 22 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c > index b0a4a2dbe3ee..5522885b2db0 100644 > --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c > +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c > @@ -15,6 +15,22 @@ > #include "intel_rc6.h" > #include "intel_ring.h" > #include "shmem_utils.h" > +#include "intel_gt_regs.h" > + > +static void intel_gsc_idle_msg_enable(struct intel_engine_cs *engine) > +{ > + struct drm_i915_private *i915 = engine->i915; > + > + if (IS_METEORLAKE(i915) && engine->id == GSC0) { > + intel_uncore_write(engine->gt->uncore, > + RC_PSMI_CTRL_GSCCS, > + _MASKED_BIT_DISABLE(IDLE_MSG_DISABLE)); > + /* 5 us hysterisis */ > + intel_uncore_write(engine->gt->uncore, > + PWRCTX_MAXCNT_GSCCS, > + 0xA); > + } > +} > > static void dbg_poison_ce(struct intel_context *ce) > { > @@ -275,6 +291,8 @@ void intel_engine_init__pm(struct intel_engine_cs *engine) > > intel_wakeref_init(&engine->wakeref, rpm, &wf_ops); > intel_engine_init_heartbeat(engine); > + > + intel_gsc_idle_msg_enable(engine); > } > > /** > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h > index 07031e03f80c..20472eb15364 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h > +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h > @@ -913,6 +913,10 @@ > #define MSG_IDLE_FW_MASK REG_GENMASK(13, 9) > #define MSG_IDLE_FW_SHIFT 9 > > +#define RC_PSMI_CTRL_GSCCS _MMIO(0x11a050) Alignment still seems off? Other than that, Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > +#define IDLE_MSG_DISABLE BIT(0) > +#define PWRCTX_MAXCNT_GSCCS _MMIO(0x11a054) > + > #define FORCEWAKE_MEDIA_GEN9 _MMIO(0xa270) > #define FORCEWAKE_RENDER_GEN9 _MMIO(0xa278) > ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/1] drm/i915/mtl: Enable Idle Messaging for GSC CS @ 2022-11-16 18:05 ` Belgaumkar, Vinay 0 siblings, 0 replies; 14+ messages in thread From: Belgaumkar, Vinay @ 2022-11-16 18:05 UTC (permalink / raw) To: Badal Nilawar, intel-gfx Cc: radhakrishna.sripada, anshuman.gupta, dri-devel, ashutosh.dixit, jon.ewins, daniele.ceraolospurio, rodrigo.vivi On 11/15/2022 5:44 AM, Badal Nilawar wrote: > From: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > > By defaut idle mesaging is disabled for GSC CS so to unblock RC6 > entry on media tile idle messaging need to be enabled. > > v2: > - Fix review comments (Vinay) > - Set GSC idle hysterisis to 5 us (Badal) > > Bspec: 71496 > > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > Signed-off-by: Badal Nilawar <badal.nilawar@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_engine_pm.c | 18 ++++++++++++++++++ > drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4 ++++ > 2 files changed, 22 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c > index b0a4a2dbe3ee..5522885b2db0 100644 > --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c > +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c > @@ -15,6 +15,22 @@ > #include "intel_rc6.h" > #include "intel_ring.h" > #include "shmem_utils.h" > +#include "intel_gt_regs.h" > + > +static void intel_gsc_idle_msg_enable(struct intel_engine_cs *engine) > +{ > + struct drm_i915_private *i915 = engine->i915; > + > + if (IS_METEORLAKE(i915) && engine->id == GSC0) { > + intel_uncore_write(engine->gt->uncore, > + RC_PSMI_CTRL_GSCCS, > + _MASKED_BIT_DISABLE(IDLE_MSG_DISABLE)); > + /* 5 us hysterisis */ > + intel_uncore_write(engine->gt->uncore, > + PWRCTX_MAXCNT_GSCCS, > + 0xA); > + } > +} > > static void dbg_poison_ce(struct intel_context *ce) > { > @@ -275,6 +291,8 @@ void intel_engine_init__pm(struct intel_engine_cs *engine) > > intel_wakeref_init(&engine->wakeref, rpm, &wf_ops); > intel_engine_init_heartbeat(engine); > + > + intel_gsc_idle_msg_enable(engine); > } > > /** > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h > index 07031e03f80c..20472eb15364 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h > +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h > @@ -913,6 +913,10 @@ > #define MSG_IDLE_FW_MASK REG_GENMASK(13, 9) > #define MSG_IDLE_FW_SHIFT 9 > > +#define RC_PSMI_CTRL_GSCCS _MMIO(0x11a050) Alignment still seems off? Other than that, Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > +#define IDLE_MSG_DISABLE BIT(0) > +#define PWRCTX_MAXCNT_GSCCS _MMIO(0x11a054) > + > #define FORCEWAKE_MEDIA_GEN9 _MMIO(0xa270) > #define FORCEWAKE_RENDER_GEN9 _MMIO(0xa278) > ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/mtl: Enable Idle Messaging for GSC CS 2022-11-15 13:44 ` Badal Nilawar ` (2 preceding siblings ...) (?) @ 2022-11-17 22:14 ` Rodrigo Vivi 2022-11-18 4:05 ` Nilawar, Badal -1 siblings, 1 reply; 14+ messages in thread From: Rodrigo Vivi @ 2022-11-17 22:14 UTC (permalink / raw) To: Badal Nilawar; +Cc: intel-gfx, dri-devel On Tue, Nov 15, 2022 at 07:14:40PM +0530, Badal Nilawar wrote: > From: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > > By defaut idle mesaging is disabled for GSC CS so to unblock RC6 > entry on media tile idle messaging need to be enabled. > > v2: > - Fix review comments (Vinay) > - Set GSC idle hysterisis to 5 us (Badal) > > Bspec: 71496 > > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > Signed-off-by: Badal Nilawar <badal.nilawar@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_engine_pm.c | 18 ++++++++++++++++++ > drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4 ++++ > 2 files changed, 22 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c > index b0a4a2dbe3ee..5522885b2db0 100644 > --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c > +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c > @@ -15,6 +15,22 @@ > #include "intel_rc6.h" > #include "intel_ring.h" > #include "shmem_utils.h" > +#include "intel_gt_regs.h" > + > +static void intel_gsc_idle_msg_enable(struct intel_engine_cs *engine) > +{ > + struct drm_i915_private *i915 = engine->i915; > + > + if (IS_METEORLAKE(i915) && engine->id == GSC0) { > + intel_uncore_write(engine->gt->uncore, > + RC_PSMI_CTRL_GSCCS, > + _MASKED_BIT_DISABLE(IDLE_MSG_DISABLE)); disable the disable? shouldn't be enable the disable? 1 = disable, no? > + /* 5 us hysterisis */ could you please mention here in the comment that 0xA = 5 us per spec? I got confused again even though you had explained already... BTW, how reliable that spec is? Because according to that same line we should be setting the bit 16, not the bit 0 in the previous reg! > + intel_uncore_write(engine->gt->uncore, > + PWRCTX_MAXCNT_GSCCS, > + 0xA); > + } > +} > > static void dbg_poison_ce(struct intel_context *ce) > { > @@ -275,6 +291,8 @@ void intel_engine_init__pm(struct intel_engine_cs *engine) > > intel_wakeref_init(&engine->wakeref, rpm, &wf_ops); > intel_engine_init_heartbeat(engine); > + > + intel_gsc_idle_msg_enable(engine); > } > > /** > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h > index 07031e03f80c..20472eb15364 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h > +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h > @@ -913,6 +913,10 @@ > #define MSG_IDLE_FW_MASK REG_GENMASK(13, 9) > #define MSG_IDLE_FW_SHIFT 9 > > +#define RC_PSMI_CTRL_GSCCS _MMIO(0x11a050) > +#define IDLE_MSG_DISABLE BIT(0) > +#define PWRCTX_MAXCNT_GSCCS _MMIO(0x11a054) > + > #define FORCEWAKE_MEDIA_GEN9 _MMIO(0xa270) > #define FORCEWAKE_RENDER_GEN9 _MMIO(0xa278) > > -- > 2.25.1 > ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/mtl: Enable Idle Messaging for GSC CS 2022-11-17 22:14 ` [Intel-gfx] " Rodrigo Vivi @ 2022-11-18 4:05 ` Nilawar, Badal 2022-11-18 14:32 ` Rodrigo Vivi 0 siblings, 1 reply; 14+ messages in thread From: Nilawar, Badal @ 2022-11-18 4:05 UTC (permalink / raw) To: Rodrigo Vivi; +Cc: intel-gfx, dri-devel On 18-11-2022 03:44, Rodrigo Vivi wrote: > On Tue, Nov 15, 2022 at 07:14:40PM +0530, Badal Nilawar wrote: >> From: Vinay Belgaumkar <vinay.belgaumkar@intel.com> >> >> By defaut idle mesaging is disabled for GSC CS so to unblock RC6 >> entry on media tile idle messaging need to be enabled. >> >> v2: >> - Fix review comments (Vinay) >> - Set GSC idle hysterisis to 5 us (Badal) >> >> Bspec: 71496 >> >> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> >> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> >> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com> >> --- >> drivers/gpu/drm/i915/gt/intel_engine_pm.c | 18 ++++++++++++++++++ >> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4 ++++ >> 2 files changed, 22 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c >> index b0a4a2dbe3ee..5522885b2db0 100644 >> --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c >> +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c >> @@ -15,6 +15,22 @@ >> #include "intel_rc6.h" >> #include "intel_ring.h" >> #include "shmem_utils.h" >> +#include "intel_gt_regs.h" >> + >> +static void intel_gsc_idle_msg_enable(struct intel_engine_cs *engine) >> +{ >> + struct drm_i915_private *i915 = engine->i915; >> + >> + if (IS_METEORLAKE(i915) && engine->id == GSC0) { >> + intel_uncore_write(engine->gt->uncore, >> + RC_PSMI_CTRL_GSCCS, >> + _MASKED_BIT_DISABLE(IDLE_MSG_DISABLE)); > > disable the disable? shouldn't be enable the disable? > 1 = disable, no? > >> + /* 5 us hysterisis */ > > could you please mention here in the comment that 0xA = 5 us per spec? > I got confused again even though you had explained already... Sure I will add the comment "0xA=5 us as per spec" > > BTW, how reliable that spec is? Because according to that same line > we should be setting the bit 16, not the bit 0 in the previous reg! Bit 16 is mask bit. Bit 0 need to be cleared to enable Idle messaging. Bit[0] = 1 Disable Idle Messaging / 0 Enable Idle Messaging. Regards, Badal > >> + intel_uncore_write(engine->gt->uncore, >> + PWRCTX_MAXCNT_GSCCS, >> + 0xA); >> + } >> +} >> >> static void dbg_poison_ce(struct intel_context *ce) >> { >> @@ -275,6 +291,8 @@ void intel_engine_init__pm(struct intel_engine_cs *engine) >> >> intel_wakeref_init(&engine->wakeref, rpm, &wf_ops); >> intel_engine_init_heartbeat(engine); >> + >> + intel_gsc_idle_msg_enable(engine); >> } >> >> /** >> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h >> index 07031e03f80c..20472eb15364 100644 >> --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h >> +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h >> @@ -913,6 +913,10 @@ >> #define MSG_IDLE_FW_MASK REG_GENMASK(13, 9) >> #define MSG_IDLE_FW_SHIFT 9 >> >> +#define RC_PSMI_CTRL_GSCCS _MMIO(0x11a050) >> +#define IDLE_MSG_DISABLE BIT(0) >> +#define PWRCTX_MAXCNT_GSCCS _MMIO(0x11a054) >> + >> #define FORCEWAKE_MEDIA_GEN9 _MMIO(0xa270) >> #define FORCEWAKE_RENDER_GEN9 _MMIO(0xa278) >> >> -- >> 2.25.1 >> ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/mtl: Enable Idle Messaging for GSC CS 2022-11-18 4:05 ` Nilawar, Badal @ 2022-11-18 14:32 ` Rodrigo Vivi 2022-11-18 14:43 ` Rodrigo Vivi 0 siblings, 1 reply; 14+ messages in thread From: Rodrigo Vivi @ 2022-11-18 14:32 UTC (permalink / raw) To: Nilawar, Badal; +Cc: intel-gfx, dri-devel On Fri, Nov 18, 2022 at 09:35:41AM +0530, Nilawar, Badal wrote: > > > On 18-11-2022 03:44, Rodrigo Vivi wrote: > > On Tue, Nov 15, 2022 at 07:14:40PM +0530, Badal Nilawar wrote: > > > From: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > > > > > > By defaut idle mesaging is disabled for GSC CS so to unblock RC6 > > > entry on media tile idle messaging need to be enabled. > > > > > > v2: > > > - Fix review comments (Vinay) > > > - Set GSC idle hysterisis to 5 us (Badal) > > > > > > Bspec: 71496 > > > > > > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > > > Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > > > Signed-off-by: Badal Nilawar <badal.nilawar@intel.com> > > > --- > > > drivers/gpu/drm/i915/gt/intel_engine_pm.c | 18 ++++++++++++++++++ > > > drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4 ++++ > > > 2 files changed, 22 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c > > > index b0a4a2dbe3ee..5522885b2db0 100644 > > > --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c > > > +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c > > > @@ -15,6 +15,22 @@ > > > #include "intel_rc6.h" > > > #include "intel_ring.h" > > > #include "shmem_utils.h" > > > +#include "intel_gt_regs.h" > > > + > > > +static void intel_gsc_idle_msg_enable(struct intel_engine_cs *engine) > > > +{ > > > + struct drm_i915_private *i915 = engine->i915; > > > + > > > + if (IS_METEORLAKE(i915) && engine->id == GSC0) { > > > + intel_uncore_write(engine->gt->uncore, > > > + RC_PSMI_CTRL_GSCCS, > > > + _MASKED_BIT_DISABLE(IDLE_MSG_DISABLE)); > > > > disable the disable? shouldn't be enable the disable? > > 1 = disable, no? doh! the function here is enable so the disable of disable is the right thing for this bit... Sorry for that. > > > > > + /* 5 us hysterisis */ > > > > could you please mention here in the comment that 0xA = 5 us per spec? > > I got confused again even though you had explained already... > Sure I will add the comment "0xA=5 us as per spec" Thank you > > > > BTW, how reliable that spec is? Because according to that same line > > we should be setting the bit 16, not the bit 0 in the previous reg! > Bit 16 is mask bit. Okay, and we need to clear the bit 0. It makes sense. However the spec seems to ask us to set the mask, but we are not. Should we? Also from the register page: "Must be set to modify corresponding bit in Bits 15:0. (All implemented bits)" So it looks to me that we do need to set the bit16 to ensure that the clear of the bit 0 is valid, otherwise this is a bogus call. > Bit 0 need to be cleared to enable Idle messaging. > Bit[0] = 1 Disable Idle Messaging / 0 Enable Idle Messaging. > > Regards, > Badal > > > > > + intel_uncore_write(engine->gt->uncore, > > > + PWRCTX_MAXCNT_GSCCS, > > > + 0xA); > > > + } > > > +} > > > static void dbg_poison_ce(struct intel_context *ce) > > > { > > > @@ -275,6 +291,8 @@ void intel_engine_init__pm(struct intel_engine_cs *engine) > > > intel_wakeref_init(&engine->wakeref, rpm, &wf_ops); > > > intel_engine_init_heartbeat(engine); > > > + > > > + intel_gsc_idle_msg_enable(engine); > > > } > > > /** > > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h > > > index 07031e03f80c..20472eb15364 100644 > > > --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h > > > +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h > > > @@ -913,6 +913,10 @@ > > > #define MSG_IDLE_FW_MASK REG_GENMASK(13, 9) > > > #define MSG_IDLE_FW_SHIFT 9 > > > +#define RC_PSMI_CTRL_GSCCS _MMIO(0x11a050) > > > +#define IDLE_MSG_DISABLE BIT(0) > > > +#define PWRCTX_MAXCNT_GSCCS _MMIO(0x11a054) > > > + > > > #define FORCEWAKE_MEDIA_GEN9 _MMIO(0xa270) > > > #define FORCEWAKE_RENDER_GEN9 _MMIO(0xa278) > > > -- > > > 2.25.1 > > > ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/mtl: Enable Idle Messaging for GSC CS 2022-11-18 14:32 ` Rodrigo Vivi @ 2022-11-18 14:43 ` Rodrigo Vivi 0 siblings, 0 replies; 14+ messages in thread From: Rodrigo Vivi @ 2022-11-18 14:43 UTC (permalink / raw) To: Nilawar, Badal; +Cc: intel-gfx, dri-devel On Fri, Nov 18, 2022 at 09:32:37AM -0500, Rodrigo Vivi wrote: > On Fri, Nov 18, 2022 at 09:35:41AM +0530, Nilawar, Badal wrote: > > > > > > On 18-11-2022 03:44, Rodrigo Vivi wrote: > > > On Tue, Nov 15, 2022 at 07:14:40PM +0530, Badal Nilawar wrote: > > > > From: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > > > > > > > > By defaut idle mesaging is disabled for GSC CS so to unblock RC6 > > > > entry on media tile idle messaging need to be enabled. > > > > > > > > v2: > > > > - Fix review comments (Vinay) > > > > - Set GSC idle hysterisis to 5 us (Badal) > > > > > > > > Bspec: 71496 > > > > > > > > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > > > > Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > > > > Signed-off-by: Badal Nilawar <badal.nilawar@intel.com> > > > > --- > > > > drivers/gpu/drm/i915/gt/intel_engine_pm.c | 18 ++++++++++++++++++ > > > > drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4 ++++ > > > > 2 files changed, 22 insertions(+) > > > > > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c > > > > index b0a4a2dbe3ee..5522885b2db0 100644 > > > > --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c > > > > +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c > > > > @@ -15,6 +15,22 @@ > > > > #include "intel_rc6.h" > > > > #include "intel_ring.h" > > > > #include "shmem_utils.h" > > > > +#include "intel_gt_regs.h" > > > > + > > > > +static void intel_gsc_idle_msg_enable(struct intel_engine_cs *engine) > > > > +{ > > > > + struct drm_i915_private *i915 = engine->i915; > > > > + > > > > + if (IS_METEORLAKE(i915) && engine->id == GSC0) { > > > > + intel_uncore_write(engine->gt->uncore, > > > > + RC_PSMI_CTRL_GSCCS, > > > > + _MASKED_BIT_DISABLE(IDLE_MSG_DISABLE)); > > > > > > disable the disable? shouldn't be enable the disable? > > > 1 = disable, no? > > doh! the function here is enable so the disable of disable is the > right thing for this bit... Sorry for that. > > > > > > > > > + /* 5 us hysterisis */ > > > > > > could you please mention here in the comment that 0xA = 5 us per spec? > > > I got confused again even though you had explained already... > > Sure I will add the comment "0xA=5 us as per spec" > > Thank you > > > > > > > BTW, how reliable that spec is? Because according to that same line > > > we should be setting the bit 16, not the bit 0 in the previous reg! > > Bit 16 is mask bit. > > Okay, and we need to clear the bit 0. It makes sense. However the spec > seems to ask us to set the mask, but we are not. Should we? > > Also from the register page: > "Must be set to modify corresponding bit in Bits 15:0. (All implemented bits)" > > So it looks to me that we do need to set the bit16 to ensure that the > clear of the bit 0 is valid, otherwise this is a bogus call. oh, I hate these macros hiding things up... bit 16 is there on that _MASKED_BIT_DISABLED as you showed me offline... So, with the comment to the 5usec added, feel free to use: Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > > Bit 0 need to be cleared to enable Idle messaging. > > Bit[0] = 1 Disable Idle Messaging / 0 Enable Idle Messaging. > > > > Regards, > > Badal > > > > > > > + intel_uncore_write(engine->gt->uncore, > > > > + PWRCTX_MAXCNT_GSCCS, > > > > + 0xA); > > > > + } > > > > +} > > > > static void dbg_poison_ce(struct intel_context *ce) > > > > { > > > > @@ -275,6 +291,8 @@ void intel_engine_init__pm(struct intel_engine_cs *engine) > > > > intel_wakeref_init(&engine->wakeref, rpm, &wf_ops); > > > > intel_engine_init_heartbeat(engine); > > > > + > > > > + intel_gsc_idle_msg_enable(engine); > > > > } > > > > /** > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h > > > > index 07031e03f80c..20472eb15364 100644 > > > > --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h > > > > +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h > > > > @@ -913,6 +913,10 @@ > > > > #define MSG_IDLE_FW_MASK REG_GENMASK(13, 9) > > > > #define MSG_IDLE_FW_SHIFT 9 > > > > +#define RC_PSMI_CTRL_GSCCS _MMIO(0x11a050) > > > > +#define IDLE_MSG_DISABLE BIT(0) > > > > +#define PWRCTX_MAXCNT_GSCCS _MMIO(0x11a054) > > > > + > > > > #define FORCEWAKE_MEDIA_GEN9 _MMIO(0xa270) > > > > #define FORCEWAKE_RENDER_GEN9 _MMIO(0xa278) > > > > -- > > > > 2.25.1 > > > > ^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for i915/mtl: Enable idle messaging for GSC CS (rev2) 2022-11-15 13:44 ` Badal Nilawar (?) (?) @ 2022-11-15 23:13 ` Patchwork -1 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2022-11-15 23:13 UTC (permalink / raw) To: Badal Nilawar; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 4438 bytes --] == Series Details == Series: i915/mtl: Enable idle messaging for GSC CS (rev2) URL : https://patchwork.freedesktop.org/series/110349/ State : success == Summary == CI Bug Log - changes from CI_DRM_12382 -> Patchwork_110349v2 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/index.html Participating hosts (40 -> 38) ------------------------------ Additional (1): fi-hsw-4770 Missing (3): bat-rpls-1 bat-dg2-11 fi-snb-2520m Known issues ------------ Here are the changes found in Patchwork_110349v2 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_softpin@allocator-basic-reserve: - fi-hsw-4770: NOTRUN -> [SKIP][1] ([fdo#109271]) +9 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/fi-hsw-4770/igt@gem_softpin@allocator-basic-reserve.html * igt@i915_pm_backlight@basic-brightness: - fi-hsw-4770: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#3012]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/fi-hsw-4770/igt@i915_pm_backlight@basic-brightness.html * igt@kms_chamelium@dp-crc-fast: - fi-hsw-4770: NOTRUN -> [SKIP][3] ([fdo#109271] / [fdo#111827]) +8 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/fi-hsw-4770/igt@kms_chamelium@dp-crc-fast.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions: - fi-bsw-kefka: [PASS][4] -> [FAIL][5] ([i915#6298]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions.html * igt@kms_psr@sprite_plane_onoff: - fi-hsw-4770: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#1072]) +3 similar issues [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html #### Possible fixes #### * igt@fbdev@read: - {bat-rpls-2}: [SKIP][7] ([i915#2582]) -> [PASS][8] +4 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/bat-rpls-2/igt@fbdev@read.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/bat-rpls-2/igt@fbdev@read.html * igt@gem_huc_copy@huc-copy: - {bat-dg2-8}: [FAIL][9] ([i915#7029]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/bat-dg2-8/igt@gem_huc_copy@huc-copy.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/bat-dg2-8/igt@gem_huc_copy@huc-copy.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582 [i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012 [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312 [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983 [i915#6257]: https://gitlab.freedesktop.org/drm/intel/issues/6257 [i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298 [i915#6434]: https://gitlab.freedesktop.org/drm/intel/issues/6434 [i915#7029]: https://gitlab.freedesktop.org/drm/intel/issues/7029 [i915#7346]: https://gitlab.freedesktop.org/drm/intel/issues/7346 [i915#7348]: https://gitlab.freedesktop.org/drm/intel/issues/7348 Build changes ------------- * Linux: CI_DRM_12382 -> Patchwork_110349v2 CI-20190529: 20190529 CI_DRM_12382: cb74864693414b221b3601572e75449558126e8b @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7057: e2138d48c2c506816868c16cf3ba64f81bdead41 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_110349v2: cb74864693414b221b3601572e75449558126e8b @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits 2830a42563af drm/i915/mtl: Enable Idle Messaging for GSC CS == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/index.html [-- Attachment #2: Type: text/html, Size: 5014 bytes --] ^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for i915/mtl: Enable idle messaging for GSC CS (rev2) 2022-11-15 13:44 ` Badal Nilawar ` (2 preceding siblings ...) (?) @ 2022-11-16 6:50 ` Patchwork -1 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2022-11-16 6:50 UTC (permalink / raw) To: Badal Nilawar; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 46946 bytes --] == Series Details == Series: i915/mtl: Enable idle messaging for GSC CS (rev2) URL : https://patchwork.freedesktop.org/series/110349/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12382_full -> Patchwork_110349v2_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_110349v2_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_110349v2_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (11 -> 11) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_110349v2_full: ### IGT changes ### #### Possible regressions #### * igt@i915_suspend@forcewake: - shard-snb: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb7/igt@i915_suspend@forcewake.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb6/igt@i915_suspend@forcewake.html #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@gem_ppgtt@blt-vs-render-ctx0: - {shard-rkl}: [PASS][3] -> [FAIL][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-rkl-1/igt@gem_ppgtt@blt-vs-render-ctx0.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-rkl-5/igt@gem_ppgtt@blt-vs-render-ctx0.html Known issues ------------ Here are the changes found in Patchwork_110349v2_full that come from known issues: ### CI changes ### #### Issues hit #### * boot: - shard-snb: ([PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29]) -> ([PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [FAIL][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54]) ([i915#4338]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb7/boot.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb7/boot.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb7/boot.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb7/boot.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb7/boot.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb6/boot.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb6/boot.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb6/boot.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb6/boot.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb6/boot.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb5/boot.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb5/boot.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb5/boot.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb5/boot.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb4/boot.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb4/boot.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb4/boot.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb4/boot.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb4/boot.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb4/boot.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb2/boot.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb2/boot.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb2/boot.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb2/boot.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb2/boot.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb7/boot.html [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb7/boot.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb7/boot.html [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb7/boot.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb7/boot.html [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb6/boot.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb6/boot.html [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb6/boot.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb6/boot.html [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb6/boot.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb5/boot.html [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb5/boot.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb5/boot.html [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb5/boot.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb5/boot.html [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb5/boot.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb4/boot.html [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb4/boot.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb4/boot.html [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb4/boot.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb4/boot.html [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb2/boot.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb2/boot.html [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb2/boot.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb2/boot.html - shard-skl: ([PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72], [PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77], [PASS][78]) -> ([PASS][79], [PASS][80], [PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89], [PASS][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [FAIL][95], [PASS][96], [PASS][97], [PASS][98], [PASS][99], [PASS][100], [PASS][101], [PASS][102], [PASS][103]) ([i915#5032]) [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl9/boot.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl9/boot.html [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl9/boot.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl7/boot.html [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl7/boot.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl7/boot.html [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl6/boot.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl6/boot.html [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl6/boot.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl6/boot.html [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl4/boot.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl4/boot.html [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl4/boot.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl4/boot.html [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl2/boot.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl2/boot.html [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl2/boot.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl1/boot.html [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl1/boot.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl1/boot.html [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl1/boot.html [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl10/boot.html [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl10/boot.html [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl10/boot.html [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl9/boot.html [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl9/boot.html [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl9/boot.html [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl7/boot.html [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl7/boot.html [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl7/boot.html [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl7/boot.html [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl6/boot.html [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl6/boot.html [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl6/boot.html [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl6/boot.html [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl4/boot.html [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl4/boot.html [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl4/boot.html [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl2/boot.html [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl2/boot.html [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl2/boot.html [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl1/boot.html [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl1/boot.html [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl1/boot.html [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl1/boot.html [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl10/boot.html [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl10/boot.html [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl10/boot.html [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl10/boot.html ### IGT changes ### #### Issues hit #### * igt@gem_ctx_persistence@legacy-engines-hang: - shard-snb: NOTRUN -> [SKIP][104] ([fdo#109271] / [i915#1099]) [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb7/igt@gem_ctx_persistence@legacy-engines-hang.html * igt@gem_eio@unwedge-stress: - shard-snb: NOTRUN -> [FAIL][105] ([i915#3354]) [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb7/igt@gem_eio@unwedge-stress.html * igt@gem_exec_fair@basic-deadline: - shard-glk: [PASS][106] -> [FAIL][107] ([i915#2846]) [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-glk2/igt@gem_exec_fair@basic-deadline.html [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-glk9/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-tglb: [PASS][108] -> [FAIL][109] ([i915#2842]) +1 similar issue [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-tglb3/igt@gem_exec_fair@basic-flow@rcs0.html [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-tglb6/igt@gem_exec_fair@basic-flow@rcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [PASS][110] -> [FAIL][111] ([i915#2842]) [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-glk3/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@gem_lmem_swapping@verify-random-ccs: - shard-skl: NOTRUN -> [SKIP][112] ([fdo#109271] / [i915#4613]) [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl10/igt@gem_lmem_swapping@verify-random-ccs.html * igt@gem_pread@exhaustion: - shard-skl: NOTRUN -> [INCOMPLETE][113] ([i915#7248]) [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl9/igt@gem_pread@exhaustion.html * igt@gem_softpin@evict-single-offset: - shard-tglb: [PASS][114] -> [FAIL][115] ([i915#4171]) [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-tglb6/igt@gem_softpin@evict-single-offset.html [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-tglb5/igt@gem_softpin@evict-single-offset.html * igt@i915_pm_rpm@reg-read-ioctl: - shard-tglb: [PASS][116] -> [INCOMPLETE][117] ([i915#2411]) [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-tglb7/igt@i915_pm_rpm@reg-read-ioctl.html [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-tglb8/igt@i915_pm_rpm@reg-read-ioctl.html * igt@i915_selftest@live@gt_heartbeat: - shard-skl: [PASS][118] -> [DMESG-FAIL][119] ([i915#5334]) [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl4/igt@i915_selftest@live@gt_heartbeat.html [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl9/igt@i915_selftest@live@gt_heartbeat.html * igt@i915_suspend@fence-restore-tiled2untiled: - shard-apl: [PASS][120] -> [DMESG-WARN][121] ([i915#180]) +1 similar issue [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-apl3/igt@i915_suspend@fence-restore-tiled2untiled.html [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-apl8/igt@i915_suspend@fence-restore-tiled2untiled.html * igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-2: - shard-glk: NOTRUN -> [INCOMPLETE][122] ([i915#5584]) [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-glk8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-2.html * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0: - shard-iclb: [PASS][123] -> [FAIL][124] ([i915#5138]) [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-iclb3/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0.html [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0.html * igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs: - shard-skl: NOTRUN -> [SKIP][125] ([fdo#109271] / [i915#3886]) +2 similar issues [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl9/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html * igt@kms_chamelium@dp-hpd-for-each-pipe: - shard-skl: NOTRUN -> [SKIP][126] ([fdo#109271] / [fdo#111827]) +3 similar issues [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl10/igt@kms_chamelium@dp-hpd-for-each-pipe.html * igt@kms_chamelium@vga-hpd-with-enabled-mode: - shard-snb: NOTRUN -> [SKIP][127] ([fdo#109271] / [fdo#111827]) [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb7/igt@kms_chamelium@vga-hpd-with-enabled-mode.html * igt@kms_cursor_crc@cursor-offscreen-32x10: - shard-skl: NOTRUN -> [SKIP][128] ([fdo#109271]) +59 similar issues [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl10/igt@kms_cursor_crc@cursor-offscreen-32x10.html * igt@kms_cursor_legacy@cursor-vs-flip@toggle: - shard-iclb: [PASS][129] -> [FAIL][130] ([i915#5072]) +1 similar issue [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-iclb6/igt@kms_cursor_legacy@cursor-vs-flip@toggle.html [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb7/igt@kms_cursor_legacy@cursor-vs-flip@toggle.html * igt@kms_flip@2x-flip-vs-blocking-wf-vblank@ac-hdmi-a1-hdmi-a2: - shard-glk: [PASS][131] -> [FAIL][132] ([i915#2122]) [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-glk8/igt@kms_flip@2x-flip-vs-blocking-wf-vblank@ac-hdmi-a1-hdmi-a2.html [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-glk3/igt@kms_flip@2x-flip-vs-blocking-wf-vblank@ac-hdmi-a1-hdmi-a2.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1: - shard-skl: [PASS][133] -> [FAIL][134] ([i915#79]) [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-default-mode: - shard-iclb: NOTRUN -> [SKIP][135] ([i915#3555]) [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-default-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling@pipe-a-valid-mode: - shard-iclb: NOTRUN -> [SKIP][136] ([i915#2587] / [i915#2672]) +2 similar issues [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-default-mode: - shard-iclb: NOTRUN -> [SKIP][137] ([i915#2672]) +4 similar issues [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-default-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode: - shard-iclb: NOTRUN -> [SKIP][138] ([i915#2672] / [i915#3555]) +1 similar issue [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-cpu: - shard-snb: NOTRUN -> [SKIP][139] ([fdo#109271]) +53 similar issues [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-cpu.html * igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-c-edp-1: - shard-skl: NOTRUN -> [FAIL][140] ([i915#4573]) +5 similar issues [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl7/igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-c-edp-1.html * igt@kms_plane_lowres@tiling-yf@pipe-b-hdmi-a-1: - shard-glk: [PASS][141] -> [FAIL][142] ([i915#7307]) [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-glk1/igt@kms_plane_lowres@tiling-yf@pipe-b-hdmi-a-1.html [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-glk7/igt@kms_plane_lowres@tiling-yf@pipe-b-hdmi-a-1.html * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b-edp-1: - shard-iclb: [PASS][143] -> [SKIP][144] ([i915#5235]) +2 similar issues [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-iclb6/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b-edp-1.html [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b-edp-1.html * igt@kms_psr2_su@frontbuffer-xrgb8888: - shard-skl: NOTRUN -> [SKIP][145] ([fdo#109271] / [i915#658]) +1 similar issue [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl9/igt@kms_psr2_su@frontbuffer-xrgb8888.html * igt@kms_psr2_su@page_flip-xrgb8888: - shard-iclb: NOTRUN -> [SKIP][146] ([fdo#109642] / [fdo#111068] / [i915#658]) [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb5/igt@kms_psr2_su@page_flip-xrgb8888.html * igt@kms_psr@psr2_sprite_plane_move: - shard-iclb: [PASS][147] -> [SKIP][148] ([fdo#109441]) +3 similar issues [147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb5/igt@kms_psr@psr2_sprite_plane_move.html * igt@kms_psr_stress_test@flip-primary-invalidate-overlay: - shard-iclb: [PASS][149] -> [SKIP][150] ([i915#5519]) [149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-iclb5/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb6/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html * igt@perf@oa-exponents: - shard-glk: [PASS][151] -> [INCOMPLETE][152] ([i915#5213]) [151]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-glk5/igt@perf@oa-exponents.html [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-glk1/igt@perf@oa-exponents.html * igt@sysfs_clients@fair-1: - shard-skl: NOTRUN -> [SKIP][153] ([fdo#109271] / [i915#2994]) [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl10/igt@sysfs_clients@fair-1.html #### Possible fixes #### * igt@core_hotunplug@unbind-rebind: - shard-snb: [DMESG-WARN][154] ([i915#4528]) -> [PASS][155] [154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-snb6/igt@core_hotunplug@unbind-rebind.html [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-snb7/igt@core_hotunplug@unbind-rebind.html * igt@gem_ctx_exec@basic-nohangcheck: - shard-tglb: [FAIL][156] ([i915#6268]) -> [PASS][157] [156]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-tglb5/igt@gem_ctx_exec@basic-nohangcheck.html [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-tglb7/igt@gem_ctx_exec@basic-nohangcheck.html * igt@gem_eio@in-flight-suspend: - {shard-rkl}: [FAIL][158] ([fdo#103375]) -> [PASS][159] [158]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-rkl-4/igt@gem_eio@in-flight-suspend.html [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-rkl-6/igt@gem_eio@in-flight-suspend.html * igt@gem_exec_balancer@parallel-keep-in-fence: - shard-iclb: [SKIP][160] ([i915#4525]) -> [PASS][161] +2 similar issues [160]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-iclb3/igt@gem_exec_balancer@parallel-keep-in-fence.html [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb1/igt@gem_exec_balancer@parallel-keep-in-fence.html * igt@gem_exec_fair@basic-none-solo@rcs0: - shard-apl: [FAIL][162] ([i915#2842]) -> [PASS][163] [162]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-apl2/igt@gem_exec_fair@basic-none-solo@rcs0.html [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-apl7/igt@gem_exec_fair@basic-none-solo@rcs0.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-iclb: [FAIL][164] ([i915#2842]) -> [PASS][165] [164]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-iclb5/igt@gem_exec_fair@basic-pace@rcs0.html [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb7/igt@gem_exec_fair@basic-pace@rcs0.html * igt@gem_exec_fence@basic-busy@bcs0: - {shard-rkl}: [SKIP][166] ([i915#6251]) -> [PASS][167] [166]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-rkl-5/igt@gem_exec_fence@basic-busy@bcs0.html [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-rkl-2/igt@gem_exec_fence@basic-busy@bcs0.html * igt@gem_exec_reloc@basic-write-read: - {shard-rkl}: [SKIP][168] ([i915#3281]) -> [PASS][169] +5 similar issues [168]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-rkl-1/igt@gem_exec_reloc@basic-write-read.html [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-rkl-5/igt@gem_exec_reloc@basic-write-read.html * igt@gem_exec_schedule@semaphore-power: - {shard-rkl}: [SKIP][170] ([i915#7276]) -> [PASS][171] [170]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-rkl-1/igt@gem_exec_schedule@semaphore-power.html [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-rkl-5/igt@gem_exec_schedule@semaphore-power.html * igt@gem_partial_pwrite_pread@writes-after-reads-uncached: - {shard-rkl}: [SKIP][172] ([i915#3282]) -> [PASS][173] +5 similar issues [172]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-rkl-4/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-rkl-5/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html * igt@gen9_exec_parse@secure-batches: - {shard-rkl}: [SKIP][174] ([i915#2527]) -> [PASS][175] +1 similar issue [174]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-rkl-1/igt@gen9_exec_parse@secure-batches.html [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-rkl-5/igt@gen9_exec_parse@secure-batches.html * igt@i915_pipe_stress@stress-xrgb8888-untiled: - {shard-rkl}: [SKIP][176] ([i915#4098]) -> [PASS][177] [176]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-rkl-4/igt@i915_pipe_stress@stress-xrgb8888-untiled.html [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-rkl-6/igt@i915_pipe_stress@stress-xrgb8888-untiled.html * igt@i915_pm_rc6_residency@rc6-idle@vcs0: - {shard-dg1}: [FAIL][178] ([i915#3591]) -> [PASS][179] [178]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-dg1-19/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html - shard-skl: [WARN][180] ([i915#1804]) -> [PASS][181] [180]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl7/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl4/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html * igt@i915_pm_rpm@drm-resources-equal: - {shard-rkl}: [SKIP][182] ([fdo#109308]) -> [PASS][183] [182]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-rkl-4/igt@i915_pm_rpm@drm-resources-equal.html [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-rkl-6/igt@i915_pm_rpm@drm-resources-equal.html * igt@i915_suspend@fence-restore-tiled2untiled: - shard-iclb: [SKIP][184] -> [PASS][185] [184]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-iclb5/igt@i915_suspend@fence-restore-tiled2untiled.html [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb2/igt@i915_suspend@fence-restore-tiled2untiled.html * igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-1: - shard-glk: [INCOMPLETE][186] ([i915#5584]) -> [PASS][187] [186]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-glk7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-1.html [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-glk8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-1.html * igt@kms_big_fb@linear-32bpp-rotate-180: - {shard-rkl}: [SKIP][188] ([i915#1845] / [i915#4098]) -> [PASS][189] +19 similar issues [188]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-rkl-4/igt@kms_big_fb@linear-32bpp-rotate-180.html [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-rkl-6/igt@kms_big_fb@linear-32bpp-rotate-180.html * igt@kms_cursor_legacy@single-move@all-pipes: - {shard-rkl}: [INCOMPLETE][190] -> [PASS][191] [190]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-rkl-4/igt@kms_cursor_legacy@single-move@all-pipes.html [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-rkl-6/igt@kms_cursor_legacy@single-move@all-pipes.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1: - shard-skl: [FAIL][192] ([i915#79]) -> [PASS][193] [192]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html * igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1: - shard-skl: [FAIL][194] ([i915#2122]) -> [PASS][195] +2 similar issues [194]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl2/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt: - {shard-rkl}: [SKIP][196] ([i915#1849] / [i915#4098]) -> [PASS][197] +14 similar issues [196]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html * igt@kms_plane@pixel-format@pipe-b-planes: - {shard-rkl}: [SKIP][198] ([i915#3558]) -> [PASS][199] +1 similar issue [198]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-rkl-4/igt@kms_plane@pixel-format@pipe-b-planes.html [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-rkl-6/igt@kms_plane@pixel-format@pipe-b-planes.html * igt@kms_plane_lowres@tiling-yf@pipe-c-hdmi-a-1: - shard-glk: [FAIL][200] ([i915#7307]) -> [PASS][201] [200]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-glk1/igt@kms_plane_lowres@tiling-yf@pipe-c-hdmi-a-1.html [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-glk7/igt@kms_plane_lowres@tiling-yf@pipe-c-hdmi-a-1.html * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a-edp-1: - shard-iclb: [SKIP][202] ([i915#5235]) -> [PASS][203] +2 similar issues [202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-iclb2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a-edp-1.html [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb5/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a-edp-1.html * igt@kms_psr@psr2_primary_mmap_cpu: - shard-iclb: [SKIP][204] ([fdo#109441]) -> [PASS][205] +1 similar issue [204]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-iclb6/igt@kms_psr@psr2_primary_mmap_cpu.html [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html * igt@kms_psr@sprite_plane_onoff: - {shard-rkl}: [SKIP][206] ([i915#1072]) -> [PASS][207] +3 similar issues [206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-rkl-4/igt@kms_psr@sprite_plane_onoff.html [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-rkl-6/igt@kms_psr@sprite_plane_onoff.html * igt@kms_psr_stress_test@flip-primary-invalidate-overlay: - shard-tglb: [SKIP][208] ([i915#5519]) -> [PASS][209] [208]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-tglb2/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-tglb3/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html * igt@perf_pmu@module-unload: - shard-skl: [DMESG-WARN][210] ([i915#1982]) -> [PASS][211] [210]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl7/igt@perf_pmu@module-unload.html [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl4/igt@perf_pmu@module-unload.html * igt@prime_vgem@basic-fence-read: - {shard-rkl}: [SKIP][212] ([fdo#109295] / [i915#3291] / [i915#3708]) -> [PASS][213] [212]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-rkl-1/igt@prime_vgem@basic-fence-read.html [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-rkl-5/igt@prime_vgem@basic-fence-read.html #### Warnings #### * igt@gem_exec_balancer@parallel-ordering: - shard-iclb: [FAIL][214] ([i915#6117]) -> [SKIP][215] ([i915#4525]) [214]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-iclb2/igt@gem_exec_balancer@parallel-ordering.html [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb5/igt@gem_exec_balancer@parallel-ordering.html * igt@gem_pread@exhaustion: - shard-apl: [INCOMPLETE][216] ([i915#7248]) -> [WARN][217] ([i915#2658]) [216]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-apl6/igt@gem_pread@exhaustion.html [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-apl7/igt@gem_pread@exhaustion.html * igt@kms_plane_alpha_blend@alpha-basic@pipe-c-dp-1: - shard-apl: [DMESG-FAIL][218] ([IGT#6]) -> [FAIL][219] ([i915#4573]) +1 similar issue [218]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-apl8/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-dp-1.html [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-apl6/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-dp-1.html * igt@kms_plane_alpha_blend@alpha-basic@pipe-c-edp-1: - shard-skl: [FAIL][220] ([i915#4573]) -> [DMESG-FAIL][221] ([IGT#6]) [220]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-skl6/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-edp-1.html [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-skl1/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-edp-1.html * igt@kms_psr2_sf@cursor-plane-update-sf: - shard-iclb: [SKIP][222] ([i915#2920]) -> [SKIP][223] ([fdo#111068] / [i915#658]) [222]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-iclb2/igt@kms_psr2_sf@cursor-plane-update-sf.html [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb6/igt@kms_psr2_sf@cursor-plane-update-sf.html * igt@kms_psr2_sf@overlay-plane-move-continuous-sf: - shard-iclb: [SKIP][224] ([i915#2920]) -> [SKIP][225] ([i915#658]) [224]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-iclb2/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb5/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area: - shard-iclb: [SKIP][226] ([fdo#111068] / [i915#658]) -> [SKIP][227] ([i915#2920]) [226]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-iclb5/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-iclb2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html * igt@runner@aborted: - shard-apl: ([FAIL][228], [FAIL][229]) ([i915#3002] / [i915#4312]) -> ([FAIL][230], [FAIL][231], [FAIL][232], [FAIL][233]) ([i915#180] / [i915#3002] / [i915#4312]) [228]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-apl1/igt@runner@aborted.html [229]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12382/shard-apl8/igt@runner@aborted.html [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-apl2/igt@runner@aborted.html [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-apl3/igt@runner@aborted.html [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-apl8/igt@runner@aborted.html [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/shard-apl8/igt@runner@aborted.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [IGT#6]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6 [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279 [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289 [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295 [fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308 [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614 [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054 [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099 [i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132 [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397 [i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722 [i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#1804]: https://gitlab.freedesktop.org/drm/intel/issues/1804 [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825 [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839 [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845 [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849 [i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122 [i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411 [i915#2436]: https://gitlab.freedesktop.org/drm/intel/issues/2436 [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527 [i915#2532]: https://gitlab.freedesktop.org/drm/intel/issues/2532 [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587 [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658 [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672 [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280 [i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284 [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842 [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846 [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920 [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994 [i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002 [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291 [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297 [i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318 [i915#3354]: https://gitlab.freedesktop.org/drm/intel/issues/3354 [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359 [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458 [i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469 [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558 [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591 [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637 [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638 [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689 [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708 [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734 [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742 [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886 [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070 [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077 [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078 [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083 [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4171]: https://gitlab.freedesktop.org/drm/intel/issues/4171 [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213 [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270 [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312 [i915#4338]: https://gitlab.freedesktop.org/drm/intel/issues/4338 [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525 [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528 [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538 [i915#4573]: https://gitlab.freedesktop.org/drm/intel/issues/4573 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812 [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833 [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852 [i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859 [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860 [i915#5032]: https://gitlab.freedesktop.org/drm/intel/issues/5032 [i915#5072]: https://gitlab.freedesktop.org/drm/intel/issues/5072 [i915#5138]: https://gitlab.freedesktop.org/drm/intel/issues/5138 [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176 [i915#5213]: https://gitlab.freedesktop.org/drm/intel/issues/5213 [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235 [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286 [i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288 [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289 [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325 [i915#5327]: https://gitlab.freedesktop.org/drm/intel/issues/5327 [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533 [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334 [i915#5519]: https://gitlab.freedesktop.org/drm/intel/issues/5519 [i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563 [i915#5584]: https://gitlab.freedesktop.org/drm/intel/issues/5584 [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095 [i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117 [i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247 [i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248 [i915#6251]: https://gitlab.freedesktop.org/drm/intel/issues/6251 [i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252 [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268 [i915#6344]: https://gitlab.freedesktop.org/drm/intel/issues/6344 [i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497 [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524 [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658 [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621 [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768 [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118 [i915#7248]: https://gitlab.freedesktop.org/drm/intel/issues/7248 [i915#7276]: https://gitlab.freedesktop.org/drm/intel/issues/7276 [i915#7307]: https://gitlab.freedesktop.org/drm/intel/issues/7307 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 Build changes ------------- * Linux: CI_DRM_12382 -> Patchwork_110349v2 CI-20190529: 20190529 CI_DRM_12382: cb74864693414b221b3601572e75449558126e8b @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7057: e2138d48c2c506816868c16cf3ba64f81bdead41 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_110349v2: cb74864693414b221b3601572e75449558126e8b @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110349v2/index.html [-- Attachment #2: Type: text/html, Size: 48129 bytes --] ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2022-11-18 14:44 UTC | newest] Thread overview: 14+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2022-11-15 13:44 [Intel-gfx] [PATCH 0/1] i915/mtl: Enable idle messaging for GSC CS Badal Nilawar 2022-11-15 13:44 ` Badal Nilawar 2022-11-15 13:44 ` [Intel-gfx] [PATCH 1/1] drm/i915/mtl: Enable Idle Messaging " Badal Nilawar 2022-11-15 13:44 ` Badal Nilawar 2022-11-15 15:27 ` [Intel-gfx] " Rodrigo Vivi 2022-11-17 6:45 ` Nilawar, Badal 2022-11-16 18:05 ` Belgaumkar, Vinay 2022-11-16 18:05 ` Belgaumkar, Vinay 2022-11-17 22:14 ` [Intel-gfx] " Rodrigo Vivi 2022-11-18 4:05 ` Nilawar, Badal 2022-11-18 14:32 ` Rodrigo Vivi 2022-11-18 14:43 ` Rodrigo Vivi 2022-11-15 23:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success for i915/mtl: Enable idle messaging for GSC CS (rev2) Patchwork 2022-11-16 6:50 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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