From: Andrew Lunn <andrew@lunn.ch>
To: Vladimir Oltean <vladimir.oltean@nxp.com>
Cc: netdev@vger.kernel.org, Florian Fainelli <f.fainelli@gmail.com>,
Vladimir Oltean <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>
Subject: Re: [PATCH net] net: dsa: sja1105: disallow C45 transactions on the BASE-TX MDIO bus
Date: Wed, 16 Nov 2022 14:28:20 +0100 [thread overview]
Message-ID: <Y3TldORKPxFUgqH/@lunn.ch> (raw)
In-Reply-To: <20221116100653.3839654-1-vladimir.oltean@nxp.com>
On Wed, Nov 16, 2022 at 12:06:53PM +0200, Vladimir Oltean wrote:
> You'd think people know that the internal 100BASE-TX PHY on the SJA1110
> responds only to clause 22 MDIO transactions, but they don't :)
>
> When a clause 45 transaction is attempted, sja1105_base_tx_mdio_read()
> and sja1105_base_tx_mdio_write() don't expect "reg" to contain bit 30
> set (MII_ADDR_C45) and pack this value into the SPI transaction buffer.
Yep, it is a common problem with MDIO busses. And driver i review now
i asks for EOPNOTSUPP for clauses which are not supported, but there
are old drivers out there missing such checks.
I have a bit rotting patchset which completely separates C22 and C45,
i just spend too much time reviewing other code to get my own merged.
> Fixes: 5a8f09748ee7 ("net: dsa: sja1105: register the MDIO buses for 100base-T1 and 100base-TX")
> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
next prev parent reply other threads:[~2022-11-16 13:28 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-16 10:06 [PATCH net] net: dsa: sja1105: disallow C45 transactions on the BASE-TX MDIO bus Vladimir Oltean
2022-11-16 13:28 ` Andrew Lunn [this message]
2022-11-17 8:11 ` Michael Walle
2022-11-17 13:41 ` Andrew Lunn
2022-11-18 13:31 ` Michael Walle
2022-11-18 12:20 ` patchwork-bot+netdevbpf
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