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From: Conor Dooley <conor@kernel.org>
To: Hal Feng <hal.feng@starfivetech.com>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Ben Dooks <ben.dooks@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Linus Walleij <linus.walleij@linaro.org>,
	Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 5/8] soc: sifive: ccache: Add StarFive JH7110 support
Date: Fri, 18 Nov 2022 11:45:57 +0000	[thread overview]
Message-ID: <Y3dwdXExRRltyp8A@spud> (raw)
In-Reply-To: <20221118011714.70877-6-hal.feng@starfivetech.com>

Hey Emil/Hal,

On Fri, Nov 18, 2022 at 09:17:11AM +0800, Hal Feng wrote:
> From: Emil Renner Berthing <kernel@esmil.dk>
> 
> This adds support for the StarFive JH7110 SoC which also
> features this SiFive cache controller.
> 
> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> ---
>  arch/riscv/Kconfig.socs            | 1 +
>  drivers/soc/Makefile               | 2 +-
>  drivers/soc/sifive/Kconfig         | 2 +-
>  drivers/soc/sifive/sifive_ccache.c | 1 +
>  4 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 69774bb362d6..5a40e05f8cab 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -22,6 +22,7 @@ config SOC_STARFIVE
>  	bool "StarFive SoCs"
>  	select PINCTRL
>  	select RESET_CONTROLLER
> +	select SIFIVE_CCACHE

Please no. I am trying to get rid of these selects + I cannot figure out
why this driver is so important that you *need* to select it. Surely the
SoC is useable without it?

Is this a hang over from your vendor tree that uses the driver to do
non-coherent stuff for the jh7100?

>  	select SIFIVE_PLIC
>  	help
>  	  This enables support for StarFive SoC platform hardware.
> diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
> index 69ba6508cf2c..534669840858 100644
> --- a/drivers/soc/Makefile
> +++ b/drivers/soc/Makefile
> @@ -26,7 +26,7 @@ obj-y				+= qcom/
>  obj-y				+= renesas/
>  obj-y				+= rockchip/
>  obj-$(CONFIG_SOC_SAMSUNG)	+= samsung/
> -obj-$(CONFIG_SOC_SIFIVE)	+= sifive/
> +obj-y				+= sifive/

This bit is fine.

>  obj-y				+= sunxi/
>  obj-$(CONFIG_ARCH_TEGRA)	+= tegra/
>  obj-y				+= ti/
> diff --git a/drivers/soc/sifive/Kconfig b/drivers/soc/sifive/Kconfig
> index ed4c571f8771..e86870be34c9 100644
> --- a/drivers/soc/sifive/Kconfig
> +++ b/drivers/soc/sifive/Kconfig
> @@ -1,6 +1,6 @@
>  # SPDX-License-Identifier: GPL-2.0
>  
> -if SOC_SIFIVE
> +if SOC_SIFIVE || SOC_STARFIVE

As I suppose is this - but hardly scalable. I suppose it doesn't really
matter.

>  config SIFIVE_CCACHE
>  	bool "Sifive Composable Cache controller"
> diff --git a/drivers/soc/sifive/sifive_ccache.c b/drivers/soc/sifive/sifive_ccache.c
> index 1c171150e878..9489d1a90fbc 100644
> --- a/drivers/soc/sifive/sifive_ccache.c
> +++ b/drivers/soc/sifive/sifive_ccache.c
> @@ -107,6 +107,7 @@ static const struct of_device_id sifive_ccache_ids[] = {
>  	{ .compatible = "sifive,fu540-c000-ccache" },
>  	{ .compatible = "sifive,fu740-c000-ccache" },
>  	{ .compatible = "sifive,ccache0" },
> +	{ .compatible = "starfive,jh7110-ccache" },

Per my second reply to the previous patch, I am not sure why you do not
just have a fallback compatible in the binding/dt for the fu740 ccache
since you appear to have identical configuration?

Thanks,
Conor.


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Hal Feng <hal.feng@starfivetech.com>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Ben Dooks <ben.dooks@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Linus Walleij <linus.walleij@linaro.org>,
	Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 5/8] soc: sifive: ccache: Add StarFive JH7110 support
Date: Fri, 18 Nov 2022 11:45:57 +0000	[thread overview]
Message-ID: <Y3dwdXExRRltyp8A@spud> (raw)
In-Reply-To: <20221118011714.70877-6-hal.feng@starfivetech.com>

Hey Emil/Hal,

On Fri, Nov 18, 2022 at 09:17:11AM +0800, Hal Feng wrote:
> From: Emil Renner Berthing <kernel@esmil.dk>
> 
> This adds support for the StarFive JH7110 SoC which also
> features this SiFive cache controller.
> 
> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> ---
>  arch/riscv/Kconfig.socs            | 1 +
>  drivers/soc/Makefile               | 2 +-
>  drivers/soc/sifive/Kconfig         | 2 +-
>  drivers/soc/sifive/sifive_ccache.c | 1 +
>  4 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 69774bb362d6..5a40e05f8cab 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -22,6 +22,7 @@ config SOC_STARFIVE
>  	bool "StarFive SoCs"
>  	select PINCTRL
>  	select RESET_CONTROLLER
> +	select SIFIVE_CCACHE

Please no. I am trying to get rid of these selects + I cannot figure out
why this driver is so important that you *need* to select it. Surely the
SoC is useable without it?

Is this a hang over from your vendor tree that uses the driver to do
non-coherent stuff for the jh7100?

>  	select SIFIVE_PLIC
>  	help
>  	  This enables support for StarFive SoC platform hardware.
> diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
> index 69ba6508cf2c..534669840858 100644
> --- a/drivers/soc/Makefile
> +++ b/drivers/soc/Makefile
> @@ -26,7 +26,7 @@ obj-y				+= qcom/
>  obj-y				+= renesas/
>  obj-y				+= rockchip/
>  obj-$(CONFIG_SOC_SAMSUNG)	+= samsung/
> -obj-$(CONFIG_SOC_SIFIVE)	+= sifive/
> +obj-y				+= sifive/

This bit is fine.

>  obj-y				+= sunxi/
>  obj-$(CONFIG_ARCH_TEGRA)	+= tegra/
>  obj-y				+= ti/
> diff --git a/drivers/soc/sifive/Kconfig b/drivers/soc/sifive/Kconfig
> index ed4c571f8771..e86870be34c9 100644
> --- a/drivers/soc/sifive/Kconfig
> +++ b/drivers/soc/sifive/Kconfig
> @@ -1,6 +1,6 @@
>  # SPDX-License-Identifier: GPL-2.0
>  
> -if SOC_SIFIVE
> +if SOC_SIFIVE || SOC_STARFIVE

As I suppose is this - but hardly scalable. I suppose it doesn't really
matter.

>  config SIFIVE_CCACHE
>  	bool "Sifive Composable Cache controller"
> diff --git a/drivers/soc/sifive/sifive_ccache.c b/drivers/soc/sifive/sifive_ccache.c
> index 1c171150e878..9489d1a90fbc 100644
> --- a/drivers/soc/sifive/sifive_ccache.c
> +++ b/drivers/soc/sifive/sifive_ccache.c
> @@ -107,6 +107,7 @@ static const struct of_device_id sifive_ccache_ids[] = {
>  	{ .compatible = "sifive,fu540-c000-ccache" },
>  	{ .compatible = "sifive,fu740-c000-ccache" },
>  	{ .compatible = "sifive,ccache0" },
> +	{ .compatible = "starfive,jh7110-ccache" },

Per my second reply to the previous patch, I am not sure why you do not
just have a fallback compatible in the binding/dt for the fu740 ccache
since you appear to have identical configuration?

Thanks,
Conor.


  reply	other threads:[~2022-11-18 11:46 UTC|newest]

Thread overview: 106+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-18  1:17 [PATCH v2 0/8] Basic device tree support for StarFive JH7110 RISC-V SoC Hal Feng
2022-11-18  1:17 ` Hal Feng
2022-11-18  1:17 ` [PATCH v2 1/8] dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive2 board Hal Feng
2022-11-18  1:17   ` Hal Feng
2022-11-18 11:31   ` Conor Dooley
2022-11-18 11:31     ` Conor Dooley
2022-11-18 13:13   ` Krzysztof Kozlowski
2022-11-18 13:13     ` Krzysztof Kozlowski
2022-11-18 17:28   ` Emil Renner Berthing
2022-11-18 17:28     ` Emil Renner Berthing
     [not found]   ` <202211190418.2AJ4ImtE072425@SH1-CSMTP-DB111.sundns.com>
2022-11-24  1:57     ` Hal Feng
2022-11-24  1:57       ` Hal Feng
     [not found]   ` <202211190418.2AJ4IQjc072382@SH1-CSMTP-DB111.sundns.com>
2022-11-24  5:56     ` Hal Feng
2022-11-24  5:56       ` Hal Feng
2022-11-24  9:20       ` Emil Renner Berthing
2022-11-24  9:20         ` Emil Renner Berthing
2022-11-24  9:50         ` Hal Feng
2022-11-24  9:50           ` Hal Feng
2022-11-18  1:17 ` [PATCH v2 2/8] dt-bindings: timer: Add StarFive JH7110 clint Hal Feng
2022-11-18  1:17   ` Hal Feng
2022-11-18 11:32   ` Conor Dooley
2022-11-18 11:32     ` Conor Dooley
2022-11-18  1:17 ` [PATCH v2 3/8] dt-bindings: interrupt-controller: Add StarFive JH7110 plic Hal Feng
2022-11-18  1:17   ` Hal Feng
2022-11-18 11:32   ` Conor Dooley
2022-11-18 11:32     ` Conor Dooley
2022-11-18  1:17 ` [PATCH v2 4/8] dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC Hal Feng
2022-11-18  1:17   ` Hal Feng
2022-11-18 11:37   ` Conor Dooley
2022-11-18 11:37     ` Conor Dooley
2022-11-18 11:39     ` Conor Dooley
2022-11-18 11:39       ` Conor Dooley
2022-11-22  8:40       ` Hal Feng
2022-11-22  8:40         ` Hal Feng
2022-11-22  9:07         ` Conor Dooley
2022-11-22  9:07           ` Conor Dooley
2022-11-22  9:09           ` Ben Dooks
2022-11-22  9:09             ` Ben Dooks
2022-11-22  9:55           ` Hal Feng
2022-11-22  9:55             ` Hal Feng
2022-11-22 10:01             ` Conor Dooley
2022-11-22 10:01               ` Conor Dooley
2022-11-22 10:16               ` Hal Feng
2022-11-22 10:16                 ` Hal Feng
2022-11-22 10:35                 ` Emil Renner Berthing
2022-11-22 10:35                   ` Emil Renner Berthing
2022-11-22 12:51                   ` Hal Feng
2022-11-22 12:51                     ` Hal Feng
2022-11-23 22:26                   ` Rob Herring
2022-11-23 22:26                     ` Rob Herring
2022-11-18  1:17 ` [PATCH v2 5/8] soc: sifive: ccache: Add StarFive JH7110 support Hal Feng
2022-11-18  1:17   ` Hal Feng
2022-11-18 11:45   ` Conor Dooley [this message]
2022-11-18 11:45     ` Conor Dooley
2022-11-22  9:02     ` Hal Feng
2022-11-22  9:02       ` Hal Feng
2022-11-22  9:54       ` Emil Renner Berthing
2022-11-22  9:54         ` Emil Renner Berthing
2022-11-22 10:12         ` Conor Dooley
2022-11-22 10:12           ` Conor Dooley
2022-11-18 17:32   ` Emil Renner Berthing
2022-11-18 17:32     ` Emil Renner Berthing
2022-11-22  9:17     ` Hal Feng
2022-11-22  9:17       ` Hal Feng
2022-11-18  1:17 ` [PATCH v2 6/8] riscv: dts: starfive: Add initial StarFive JH7110 device tree Hal Feng
2022-11-18  1:17   ` Hal Feng
2022-11-18 12:01   ` Conor Dooley
2022-11-18 12:01     ` Conor Dooley
2022-11-18 17:39     ` Emil Renner Berthing
2022-11-18 17:39       ` Emil Renner Berthing
2022-11-23  7:11     ` Hal Feng
2022-11-23  7:11       ` Hal Feng
2022-11-18 17:41   ` Emil Renner Berthing
2022-11-18 17:41     ` Emil Renner Berthing
2022-11-23  7:20     ` Hal Feng
2022-11-23  7:20       ` Hal Feng
2022-11-18  1:17 ` [PATCH v2 7/8] riscv: dts: starfive: Add StarFive JH7110 VisionFive2 board " Hal Feng
2022-11-18  1:17   ` Hal Feng
2022-11-18 17:55   ` Emil Renner Berthing
2022-11-18 17:55     ` Emil Renner Berthing
2022-11-24  6:17     ` Hal Feng
2022-11-24  6:17       ` Hal Feng
2022-11-18  1:17 ` [PATCH v2 8/8] RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW Hal Feng
2022-11-18  1:17   ` Hal Feng
2022-11-18 12:04   ` Conor Dooley
2022-11-18 12:04     ` Conor Dooley
2022-12-02 18:00   ` Palmer Dabbelt
2022-12-02 18:00     ` Palmer Dabbelt
2022-12-02 18:07     ` Conor Dooley
2022-12-02 18:07       ` Conor Dooley
2022-12-02 18:13       ` Palmer Dabbelt
2022-12-02 18:13         ` Palmer Dabbelt
2022-12-02 18:18         ` Conor Dooley
2022-12-02 18:18           ` Conor Dooley
2022-12-02 18:24           ` Palmer Dabbelt
2022-12-02 18:24             ` Palmer Dabbelt
2022-12-02 18:43   ` Palmer Dabbelt
2022-12-02 18:43     ` Palmer Dabbelt
2022-12-04  7:20     ` Hal Feng
2022-12-04  7:20       ` Hal Feng
2022-11-18  7:28 ` [PATCH v2 0/8] Basic device tree support for StarFive JH7110 RISC-V SoC Hal Feng
2022-11-18  7:28   ` Hal Feng
2022-12-02 19:00 ` patchwork-bot+linux-riscv
2022-12-02 19:00   ` patchwork-bot+linux-riscv
2022-12-02 19:04   ` Palmer Dabbelt
2022-12-02 19:04     ` Palmer Dabbelt

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