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From: Catalin Marinas <catalin.marinas@arm.com>
To: Ard Biesheuvel <ardb@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org, will@kernel.org
Subject: Re: [PATCH] arm64: mm: Align PGDs to at least 64 bytes
Date: Mon, 28 Nov 2022 17:50:48 +0000	[thread overview]
Message-ID: <Y4T0+PDBdukfu88q@arm.com> (raw)
In-Reply-To: <20221122165618.2453224-1-ardb@kernel.org>

On Tue, Nov 22, 2022 at 05:56:18PM +0100, Ard Biesheuvel wrote:
> My copy of the ARM ARM (DDI 0487G.a) no longer describes the 64 byte

G.a is nearly two years old. You may want to upgrade to H.a ;).

> minimum alignment of root page tables as being conditional on whether
> 52-bit physical addressing is supported and enabled, even though I seem
> to remember that this was the case formerly (and our code suggests the
> same).

The wording in the ARM ARM implies that it's only needed if we go beyond
48 bits for the base address:

  A translation table must be aligned to the size of the table, except
  that when using a translation table base address larger than 48 bits
  the minimum alignment of a table containing fewer than eight entries
  is 64 bytes.

But I'm fine with the patch, always forcing the 64 byte alignment. With
the 'max_t' instead of 'max' (or whatever solves Anshuman's error):

Acked-by: Catalin Marinas <catalin.marinas@arm.com>

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  parent reply	other threads:[~2022-11-28 18:28 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-22 16:56 [PATCH] arm64: mm: Align PGDs to at least 64 bytes Ard Biesheuvel
2022-11-24  4:34 ` Anshuman Khandual
2022-11-24  7:42   ` Ard Biesheuvel
2022-11-24 11:56     ` Anshuman Khandual
2022-11-28 17:50 ` Catalin Marinas [this message]
2022-11-28 17:54   ` Ard Biesheuvel
2022-11-29  9:51   ` Will Deacon
2022-11-29 11:18     ` Ard Biesheuvel
2022-11-29 12:23       ` Will Deacon
2022-11-29 12:54         ` Marc Zyngier

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