From: Conor Dooley <conor@kernel.org>
To: JiaJie Ho <jiajie.ho@starfivetech.com>
Cc: "Conor.Dooley@microchip.com" <Conor.Dooley@microchip.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"herbert@gondor.apana.org.au" <herbert@gondor.apana.org.au>,
"linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
"kernel@esmil.dk" <kernel@esmil.dk>,
"davem@davemloft.net" <davem@davemloft.net>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>
Subject: Re: [PATCH 6/6] riscv: dts: starfive: Add crypto and DMA node for VisionFive 2
Date: Thu, 1 Dec 2022 18:04:04 +0000 [thread overview]
Message-ID: <Y4jslJfTVtQ9cIGm@spud> (raw)
In-Reply-To: <4ddddceba3dc437daca27374dd2f6fd7@EXMBX068.cuchost.com>
On Thu, Dec 01, 2022 at 06:17:26AM +0000, JiaJie Ho wrote:
> > -----Original Message-----
> > From: Conor.Dooley@microchip.com <Conor.Dooley@microchip.com>
> > Hey Jia Jie Ho,
> >
> > On 30/11/2022 05:52, Jia Jie Ho wrote:
> > > [You don't often get email from jiajie.ho@starfivetech.com. Learn why
> > > this is important at https://aka.ms/LearnAboutSenderIdentification ]
> > >
> > > EXTERNAL EMAIL: Do not click links or open attachments unless you know
> > > the content is safe
> > >
> > > Adding StarFive crypto IP and DMA controller node to VisionFive 2 SoC.
> > >
> > > Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
> > > Signed-off-by: Huan Feng <huan.feng@starfivetech.com>
> >
> > Out of curiosity, what was Huan Feng's contribution to this patch?
> > Did they co-develop it, or is there some other reason?
> >
> Hi Conor,
> Yes, Huan Feng co-developed this driver.
In that case, the SoB block should look like:
Co-developed-by: Huan Feng <huan.feng@starfivetech.com>
Signed-off-by: Huan Feng <huan.feng@starfivetech.com>
Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
Similarly for any other patches they may have co-developed :)
> > >
> > > diff --git
> > > a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts
> > > b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts
> > > index 450e920236a5..da2aa4d597f3 100644
> > > --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts
> > > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts
> > > @@ -115,3 +115,11 @@ &tdm_ext {
> > > &mclk_ext {
> > > clock-frequency = <49152000>;
> > > };
> > > +
> > > +&sec_dma {
> > > + status = "okay";
> > > +};
> > > +
> > > +&crypto {
> > > + status = "okay";
> > > +};
> >
> > In what scenario would you not want to have these enabled?
> These drivers are always enabled.
> Is everything ok with the dts node entries?
If the hardware is always present, why not drop the "disabled" in
jh7110.dtsi & these two entries marking them as "okay" in the .dts?
> > > diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> > > b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> > > index 4ac159d79d66..745a5650882c 100644
> > > --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> > > +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> > > @@ -455,5 +455,41 @@ uart5: serial@12020000 {
> > > reg-shift = <2>;
> > > status = "disabled";
> > > };
> > > +
> > > + sec_dma: sec_dma@16008000 {
> > > + status = "disabled";
> > > + };
> > > +
> > > + crypto: crypto@16000000 {
> > > + status = "disabled";
> > > + };
> > > };
> > > };
Thanks,
Conor.
WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: JiaJie Ho <jiajie.ho@starfivetech.com>
Cc: "Conor.Dooley@microchip.com" <Conor.Dooley@microchip.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"herbert@gondor.apana.org.au" <herbert@gondor.apana.org.au>,
"linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
"kernel@esmil.dk" <kernel@esmil.dk>,
"davem@davemloft.net" <davem@davemloft.net>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>
Subject: Re: [PATCH 6/6] riscv: dts: starfive: Add crypto and DMA node for VisionFive 2
Date: Thu, 1 Dec 2022 18:04:04 +0000 [thread overview]
Message-ID: <Y4jslJfTVtQ9cIGm@spud> (raw)
In-Reply-To: <4ddddceba3dc437daca27374dd2f6fd7@EXMBX068.cuchost.com>
On Thu, Dec 01, 2022 at 06:17:26AM +0000, JiaJie Ho wrote:
> > -----Original Message-----
> > From: Conor.Dooley@microchip.com <Conor.Dooley@microchip.com>
> > Hey Jia Jie Ho,
> >
> > On 30/11/2022 05:52, Jia Jie Ho wrote:
> > > [You don't often get email from jiajie.ho@starfivetech.com. Learn why
> > > this is important at https://aka.ms/LearnAboutSenderIdentification ]
> > >
> > > EXTERNAL EMAIL: Do not click links or open attachments unless you know
> > > the content is safe
> > >
> > > Adding StarFive crypto IP and DMA controller node to VisionFive 2 SoC.
> > >
> > > Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
> > > Signed-off-by: Huan Feng <huan.feng@starfivetech.com>
> >
> > Out of curiosity, what was Huan Feng's contribution to this patch?
> > Did they co-develop it, or is there some other reason?
> >
> Hi Conor,
> Yes, Huan Feng co-developed this driver.
In that case, the SoB block should look like:
Co-developed-by: Huan Feng <huan.feng@starfivetech.com>
Signed-off-by: Huan Feng <huan.feng@starfivetech.com>
Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
Similarly for any other patches they may have co-developed :)
> > >
> > > diff --git
> > > a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts
> > > b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts
> > > index 450e920236a5..da2aa4d597f3 100644
> > > --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts
> > > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts
> > > @@ -115,3 +115,11 @@ &tdm_ext {
> > > &mclk_ext {
> > > clock-frequency = <49152000>;
> > > };
> > > +
> > > +&sec_dma {
> > > + status = "okay";
> > > +};
> > > +
> > > +&crypto {
> > > + status = "okay";
> > > +};
> >
> > In what scenario would you not want to have these enabled?
> These drivers are always enabled.
> Is everything ok with the dts node entries?
If the hardware is always present, why not drop the "disabled" in
jh7110.dtsi & these two entries marking them as "okay" in the .dts?
> > > diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> > > b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> > > index 4ac159d79d66..745a5650882c 100644
> > > --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> > > +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> > > @@ -455,5 +455,41 @@ uart5: serial@12020000 {
> > > reg-shift = <2>;
> > > status = "disabled";
> > > };
> > > +
> > > + sec_dma: sec_dma@16008000 {
> > > + status = "disabled";
> > > + };
> > > +
> > > + crypto: crypto@16000000 {
> > > + status = "disabled";
> > > + };
> > > };
> > > };
Thanks,
Conor.
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next prev parent reply other threads:[~2022-12-01 18:04 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-30 5:52 [PATCH 0/6] crypto: starfive: Add driver for cryptographic engine Jia Jie Ho
2022-11-30 5:52 ` Jia Jie Ho
2022-11-30 5:52 ` [PATCH 1/6] crypto: starfive - Add StarFive crypto engine support Jia Jie Ho
2022-11-30 5:52 ` Jia Jie Ho
2022-11-30 13:15 ` Krzysztof Kozlowski
2022-11-30 13:15 ` Krzysztof Kozlowski
2022-12-01 6:52 ` JiaJie Ho
2022-12-01 6:52 ` JiaJie Ho
2022-12-01 9:28 ` Krzysztof Kozlowski
2022-12-01 9:28 ` Krzysztof Kozlowski
2022-12-01 9:43 ` JiaJie Ho
2022-12-01 9:43 ` JiaJie Ho
2022-11-30 5:52 ` [PATCH 2/6] crypto: starfive - Add hash and HMAC support Jia Jie Ho
2022-11-30 5:52 ` Jia Jie Ho
2022-11-30 5:52 ` [PATCH 3/6] crypto: starfive - Add AES skcipher and aead support Jia Jie Ho
2022-11-30 5:52 ` Jia Jie Ho
2022-11-30 5:52 ` [PATCH 4/6] crypto: starfive - Add Public Key algo support Jia Jie Ho
2022-11-30 5:52 ` Jia Jie Ho
2022-11-30 5:52 ` [PATCH 5/6] dt-bindings: crypto: Add bindings for Starfive crypto driver Jia Jie Ho
2022-11-30 5:52 ` Jia Jie Ho
2022-11-30 13:20 ` Krzysztof Kozlowski
2022-11-30 13:20 ` Krzysztof Kozlowski
2022-12-01 9:01 ` JiaJie Ho
2022-12-01 9:01 ` JiaJie Ho
2022-12-01 9:27 ` Krzysztof Kozlowski
2022-12-01 9:27 ` Krzysztof Kozlowski
2022-12-06 8:35 ` JiaJie Ho
2022-12-06 8:35 ` JiaJie Ho
2022-11-30 13:47 ` Rob Herring
2022-11-30 13:47 ` Rob Herring
2022-12-06 3:48 ` JiaJie Ho
2022-12-06 3:48 ` JiaJie Ho
2022-12-06 8:26 ` Krzysztof Kozlowski
2022-12-06 8:26 ` Krzysztof Kozlowski
2022-12-06 8:32 ` JiaJie Ho
2022-12-06 8:32 ` JiaJie Ho
2022-11-30 5:52 ` [PATCH 6/6] riscv: dts: starfive: Add crypto and DMA node for VisionFive 2 Jia Jie Ho
2022-11-30 5:52 ` Jia Jie Ho
2022-11-30 9:31 ` Conor.Dooley
2022-11-30 9:31 ` Conor.Dooley
2022-12-01 6:17 ` JiaJie Ho
2022-12-01 6:17 ` JiaJie Ho
2022-12-01 18:04 ` Conor Dooley [this message]
2022-12-01 18:04 ` Conor Dooley
2022-12-06 3:55 ` JiaJie Ho
2022-12-06 3:55 ` JiaJie Ho
2022-11-30 13:21 ` Krzysztof Kozlowski
2022-11-30 13:21 ` Krzysztof Kozlowski
2022-12-01 7:25 ` JiaJie Ho
2022-12-01 7:25 ` JiaJie Ho
2022-12-08 9:09 ` [PATCH 0/6] crypto: starfive: Add driver for cryptographic engine JiaJie Ho
2022-12-08 9:09 ` JiaJie Ho
2022-12-08 9:28 ` Krzysztof Kozlowski
2022-12-08 9:28 ` Krzysztof Kozlowski
2022-12-08 9:35 ` JiaJie Ho
2022-12-08 9:35 ` JiaJie Ho
2022-12-13 6:20 ` Palmer Dabbelt
2022-12-13 6:20 ` Palmer Dabbelt
2022-12-13 6:32 ` JiaJie Ho
2022-12-13 6:32 ` JiaJie Ho
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