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From: gregkh <gregkh@linuxfoundation.org>
To: Bin Meng <bmeng@tinylab.org>
Cc: linux-kernel <linux-kernel@vger.kernel.org>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	linux-serial <linux-serial@vger.kernel.org>,
	aou <aou@eecs.berkeley.edu>,
	"catalin.marinas" <catalin.marinas@arm.com>,
	jirislaby <jirislaby@kernel.org>, palmer <palmer@dabbelt.com>,
	"paul.walmsley" <paul.walmsley@sifive.com>,
	linux <linux@armlinux.org.uk>, will <will@kernel.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 0/3] serial: Add RISC-V support to the earlycon semihost driver
Date: Wed, 21 Dec 2022 17:09:28 +0100	[thread overview]
Message-ID: <Y6MvuJfocYIw9NPv@kroah.com> (raw)
In-Reply-To: <em37536add-7867-4e7d-9294-9a8389a661e2@a9022134.com>

On Wed, Dec 21, 2022 at 03:51:59PM +0000, Bin Meng wrote:
> On 2022/12/9 23:04:34, "Bin Meng" <bmeng@tinylab.org> wrote:
> 
> > RISC-V semihosting spec [1] is built on top of the existing Arm one;
> > we can add RISC-V earlycon semihost driver easily.
> > 
> > This series refactors the existing driver a little bit, to move smh_putc()
> > variants in respective arch's semihost.h, then we can implement RISC-V's
> > version in the riscv arch directory.
> > 
> > Link: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc [1]
> > 
> > Changes in v3:
> > - add #ifdef in the header to prevent from multiple inclusion
> > - add forward-declare struct uart_port
> > - add a Link tag in the commit message
> > 
> Ping?

It is the middle of the merge window, we can not do anything until after
6.2-rc1 is out, please be patient.

While you wait, please take the time to review other patches on the
mailing list to help with the workload of the maintainers.

thanks,

greg k-h

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: gregkh <gregkh@linuxfoundation.org>
To: Bin Meng <bmeng@tinylab.org>
Cc: linux-kernel <linux-kernel@vger.kernel.org>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	linux-serial <linux-serial@vger.kernel.org>,
	aou <aou@eecs.berkeley.edu>,
	"catalin.marinas" <catalin.marinas@arm.com>,
	jirislaby <jirislaby@kernel.org>, palmer <palmer@dabbelt.com>,
	"paul.walmsley" <paul.walmsley@sifive.com>,
	linux <linux@armlinux.org.uk>, will <will@kernel.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 0/3] serial: Add RISC-V support to the earlycon semihost driver
Date: Wed, 21 Dec 2022 17:09:28 +0100	[thread overview]
Message-ID: <Y6MvuJfocYIw9NPv@kroah.com> (raw)
In-Reply-To: <em37536add-7867-4e7d-9294-9a8389a661e2@a9022134.com>

On Wed, Dec 21, 2022 at 03:51:59PM +0000, Bin Meng wrote:
> On 2022/12/9 23:04:34, "Bin Meng" <bmeng@tinylab.org> wrote:
> 
> > RISC-V semihosting spec [1] is built on top of the existing Arm one;
> > we can add RISC-V earlycon semihost driver easily.
> > 
> > This series refactors the existing driver a little bit, to move smh_putc()
> > variants in respective arch's semihost.h, then we can implement RISC-V's
> > version in the riscv arch directory.
> > 
> > Link: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc [1]
> > 
> > Changes in v3:
> > - add #ifdef in the header to prevent from multiple inclusion
> > - add forward-declare struct uart_port
> > - add a Link tag in the commit message
> > 
> Ping?

It is the middle of the merge window, we can not do anything until after
6.2-rc1 is out, please be patient.

While you wait, please take the time to review other patches on the
mailing list to help with the workload of the maintainers.

thanks,

greg k-h

WARNING: multiple messages have this Message-ID (diff)
From: gregkh <gregkh@linuxfoundation.org>
To: Bin Meng <bmeng@tinylab.org>
Cc: linux-kernel <linux-kernel@vger.kernel.org>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	linux-serial <linux-serial@vger.kernel.org>,
	aou <aou@eecs.berkeley.edu>,
	"catalin.marinas" <catalin.marinas@arm.com>,
	jirislaby <jirislaby@kernel.org>, palmer <palmer@dabbelt.com>,
	"paul.walmsley" <paul.walmsley@sifive.com>,
	linux <linux@armlinux.org.uk>, will <will@kernel.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 0/3] serial: Add RISC-V support to the earlycon semihost driver
Date: Wed, 21 Dec 2022 17:09:28 +0100	[thread overview]
Message-ID: <Y6MvuJfocYIw9NPv@kroah.com> (raw)
In-Reply-To: <em37536add-7867-4e7d-9294-9a8389a661e2@a9022134.com>

On Wed, Dec 21, 2022 at 03:51:59PM +0000, Bin Meng wrote:
> On 2022/12/9 23:04:34, "Bin Meng" <bmeng@tinylab.org> wrote:
> 
> > RISC-V semihosting spec [1] is built on top of the existing Arm one;
> > we can add RISC-V earlycon semihost driver easily.
> > 
> > This series refactors the existing driver a little bit, to move smh_putc()
> > variants in respective arch's semihost.h, then we can implement RISC-V's
> > version in the riscv arch directory.
> > 
> > Link: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc [1]
> > 
> > Changes in v3:
> > - add #ifdef in the header to prevent from multiple inclusion
> > - add forward-declare struct uart_port
> > - add a Link tag in the commit message
> > 
> Ping?

It is the middle of the merge window, we can not do anything until after
6.2-rc1 is out, please be patient.

While you wait, please take the time to review other patches on the
mailing list to help with the workload of the maintainers.

thanks,

greg k-h

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-12-21 16:10 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-09 15:04 [PATCH v3 0/3] serial: Add RISC-V support to the earlycon semihost driver Bin Meng
2022-12-09 15:04 ` Bin Meng
2022-12-09 15:04 ` Bin Meng
2022-12-09 15:04 ` [PATCH v3 1/3] serial: earlycon-arm-semihost: Move smh_putc() variants in respective arch's semihost.h Bin Meng
2022-12-09 15:04   ` Bin Meng
2022-12-09 15:04   ` Bin Meng
2022-12-09 15:04 ` [PATCH v3 2/3] riscv: Implement semihost.h for earlycon semihost driver Bin Meng
2022-12-09 15:04   ` Bin Meng
2022-12-09 15:04 ` [PATCH v3 3/3] serial: Rename " Bin Meng
2022-12-09 15:04   ` Bin Meng
2022-12-21 15:51 ` [PATCH v3 0/3] serial: Add RISC-V support to the " Bin Meng
2022-12-21 15:51   ` Bin Meng
2022-12-21 15:51   ` Bin Meng
2022-12-21 16:09   ` gregkh [this message]
2022-12-21 16:09     ` gregkh
2022-12-21 16:09     ` gregkh
2022-12-22 20:06 ` Sergey Matyukevich
2022-12-22 20:06   ` Sergey Matyukevich
2022-12-22 20:06   ` Sergey Matyukevich
2022-12-23  9:11   ` Bin Meng
2022-12-23  9:11     ` Bin Meng
2022-12-23  9:11     ` Bin Meng
2022-12-29 16:22 ` Palmer Dabbelt
2022-12-29 16:22   ` Palmer Dabbelt
2022-12-29 16:22   ` Palmer Dabbelt

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