From: Corentin Labbe <clabbe.montjoie@gmail.com>
To: Samuel Holland <samuel@sholland.org>
Cc: Herbert Xu <herbert@gondor.apana.org.au>,
"David S . Miller" <davem@davemloft.net>,
Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Albert Ou <aou@eecs.berkeley.edu>,
Conor Dooley <conor@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev
Subject: Re: [PATCH v2 1/3] dt-bindings: crypto: sun8i-ce: Add compatible for D1
Date: Fri, 6 Jan 2023 09:20:20 +0100 [thread overview]
Message-ID: <Y7fZxAl8WwVztDj/@Red> (raw)
In-Reply-To: <20221231220146.646-2-samuel@sholland.org>
Le Sat, Dec 31, 2022 at 04:01:43PM -0600, Samuel Holland a écrit :
> D1 has a crypto engine similar to the one in other Allwinner SoCs.
> Like H6, it has a separate MBUS clock gate.
>
> It also requires the internal RC oscillator to be enabled for the TRNG
> to return data, presumably because noise from the oscillator is used as
> an entropy source. This is likely the case for earlier variants as well,
> but it really only matters for H616 and newer SoCs, as H6 provides no
> way to disable the internal oscillator.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> I noticed that the vendor driver has code to explicitly enable IOSC when
> using the TRNG on A83T (search SS_TRNG_OSC_ADDR), but that is covered by
> a different binding/driver in mainline.
>
> Changes in v2:
> - Add TRNG clock
>
> .../bindings/crypto/allwinner,sun8i-ce.yaml | 33 ++++++++++++++-----
> 1 file changed, 25 insertions(+), 8 deletions(-)
>
Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Thanks
WARNING: multiple messages have this Message-ID (diff)
From: Corentin Labbe <clabbe.montjoie@gmail.com>
To: Samuel Holland <samuel@sholland.org>
Cc: Herbert Xu <herbert@gondor.apana.org.au>,
"David S . Miller" <davem@davemloft.net>,
Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Albert Ou <aou@eecs.berkeley.edu>,
Conor Dooley <conor@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev
Subject: Re: [PATCH v2 1/3] dt-bindings: crypto: sun8i-ce: Add compatible for D1
Date: Fri, 6 Jan 2023 09:20:20 +0100 [thread overview]
Message-ID: <Y7fZxAl8WwVztDj/@Red> (raw)
In-Reply-To: <20221231220146.646-2-samuel@sholland.org>
Le Sat, Dec 31, 2022 at 04:01:43PM -0600, Samuel Holland a écrit :
> D1 has a crypto engine similar to the one in other Allwinner SoCs.
> Like H6, it has a separate MBUS clock gate.
>
> It also requires the internal RC oscillator to be enabled for the TRNG
> to return data, presumably because noise from the oscillator is used as
> an entropy source. This is likely the case for earlier variants as well,
> but it really only matters for H616 and newer SoCs, as H6 provides no
> way to disable the internal oscillator.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> I noticed that the vendor driver has code to explicitly enable IOSC when
> using the TRNG on A83T (search SS_TRNG_OSC_ADDR), but that is covered by
> a different binding/driver in mainline.
>
> Changes in v2:
> - Add TRNG clock
>
> .../bindings/crypto/allwinner,sun8i-ce.yaml | 33 ++++++++++++++-----
> 1 file changed, 25 insertions(+), 8 deletions(-)
>
Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Thanks
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Corentin Labbe <clabbe.montjoie@gmail.com>
To: Samuel Holland <samuel@sholland.org>
Cc: Herbert Xu <herbert@gondor.apana.org.au>,
"David S . Miller" <davem@davemloft.net>,
Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Albert Ou <aou@eecs.berkeley.edu>,
Conor Dooley <conor@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev
Subject: Re: [PATCH v2 1/3] dt-bindings: crypto: sun8i-ce: Add compatible for D1
Date: Fri, 6 Jan 2023 09:20:20 +0100 [thread overview]
Message-ID: <Y7fZxAl8WwVztDj/@Red> (raw)
In-Reply-To: <20221231220146.646-2-samuel@sholland.org>
Le Sat, Dec 31, 2022 at 04:01:43PM -0600, Samuel Holland a écrit :
> D1 has a crypto engine similar to the one in other Allwinner SoCs.
> Like H6, it has a separate MBUS clock gate.
>
> It also requires the internal RC oscillator to be enabled for the TRNG
> to return data, presumably because noise from the oscillator is used as
> an entropy source. This is likely the case for earlier variants as well,
> but it really only matters for H616 and newer SoCs, as H6 provides no
> way to disable the internal oscillator.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
> I noticed that the vendor driver has code to explicitly enable IOSC when
> using the TRNG on A83T (search SS_TRNG_OSC_ADDR), but that is covered by
> a different binding/driver in mainline.
>
> Changes in v2:
> - Add TRNG clock
>
> .../bindings/crypto/allwinner,sun8i-ce.yaml | 33 ++++++++++++++-----
> 1 file changed, 25 insertions(+), 8 deletions(-)
>
Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Thanks
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-01-06 8:20 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-31 22:01 [PATCH v2 0/3] crypto: Allwinner D1 crypto support Samuel Holland
2022-12-31 22:01 ` Samuel Holland
2022-12-31 22:01 ` Samuel Holland
2022-12-31 22:01 ` [PATCH v2 1/3] dt-bindings: crypto: sun8i-ce: Add compatible for D1 Samuel Holland
2022-12-31 22:01 ` Samuel Holland
2022-12-31 22:01 ` Samuel Holland
2023-01-01 15:57 ` Krzysztof Kozlowski
2023-01-01 15:57 ` Krzysztof Kozlowski
2023-01-01 15:57 ` Krzysztof Kozlowski
2023-01-06 8:20 ` Corentin Labbe [this message]
2023-01-06 8:20 ` Corentin Labbe
2023-01-06 8:20 ` Corentin Labbe
2023-01-13 3:51 ` Herbert Xu
2023-01-13 3:51 ` Herbert Xu
2023-01-13 3:51 ` Herbert Xu
2023-01-13 8:33 ` Krzysztof Kozlowski
2023-01-13 8:33 ` Krzysztof Kozlowski
2023-01-13 8:33 ` Krzysztof Kozlowski
2023-01-13 8:37 ` Herbert Xu
2023-01-13 8:37 ` Herbert Xu
2023-01-13 8:37 ` Herbert Xu
2022-12-31 22:01 ` [PATCH v2 2/3] crypto: sun8i-ce - Add TRNG clock to the D1 variant Samuel Holland
2022-12-31 22:01 ` Samuel Holland
2022-12-31 22:01 ` Samuel Holland
2023-01-05 16:29 ` Jernej Škrabec
2023-01-05 16:29 ` Jernej Škrabec
2023-01-05 16:29 ` Jernej Škrabec
2023-01-06 8:18 ` Corentin Labbe
2023-01-06 8:18 ` Corentin Labbe
2023-01-06 8:18 ` Corentin Labbe
2022-12-31 22:01 ` [PATCH v2 3/3] riscv: dts: allwinner: d1: Add crypto engine node Samuel Holland
2022-12-31 22:01 ` Samuel Holland
2022-12-31 22:01 ` Samuel Holland
2023-01-05 16:30 ` Jernej Škrabec
2023-01-05 16:30 ` Jernej Škrabec
2023-01-05 16:30 ` Jernej Škrabec
2023-03-07 20:55 ` Palmer Dabbelt
2023-03-07 20:55 ` Palmer Dabbelt
2023-03-07 20:55 ` Palmer Dabbelt
2023-03-14 20:35 ` Jernej Škrabec
2023-03-14 20:35 ` Jernej Škrabec
2023-03-14 20:35 ` Jernej Škrabec
2023-01-13 8:40 ` [PATCH v2 0/3] crypto: Allwinner D1 crypto support Herbert Xu
2023-01-13 8:40 ` Herbert Xu
2023-01-13 8:40 ` Herbert Xu
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