From: Oliver Upton <oliver.upton@linux.dev>
To: Reiji Watanabe <reijiw@google.com>
Cc: Marc Zyngier <maz@kernel.org>,
kvmarm@lists.cs.columbia.edu, kvmarm@lists.linux.dev,
kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
James Morse <james.morse@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Ricardo Koller <ricarkol@google.com>,
Jing Zhang <jingzhangos@google.com>,
Raghavendra Rao Anata <rananta@google.com>
Subject: Re: [PATCH 2/7] KVM: arm64: PMU: Use reset_pmu_reg() for PMUSERENR_EL0 and PMCCFILTR_EL0
Date: Tue, 10 Jan 2023 01:46:41 +0000 [thread overview]
Message-ID: <Y7zDgdmURNztXseL@google.com> (raw)
In-Reply-To: <CAAeT=Fxnkn++j6MObaAhHwb4nTf-g9XGOgzr0NYpA5K6hicFkg@mail.gmail.com>
On Mon, Jan 09, 2023 at 05:17:59PM -0800, Reiji Watanabe wrote:
> On Sun, Jan 8, 2023 at 11:13 AM Oliver Upton <oliver.upton@linux.dev> wrote:
> >
> > On Thu, Dec 29, 2022 at 07:59:23PM -0800, Reiji Watanabe wrote:
> > > The default reset function for PMU registers (reset_pmu_reg())
> > > now simply clears a specified register. Use that function for
> > > PMUSERENR_EL0 and PMCCFILTR_EL0, since those registers should
> > > simply be cleared on vCPU reset.
> >
> > AFAICT, the fields in both these registers have UNKNOWN reset values. Of
> > course, 0 is an entirely valid reset value but the architectural
> > behavior should be mentioned in the commit message.
>
> Uh, yeah, the commit message was misleading.
> The fields in both these registers have UNKNOWN reset values.
> The ones for 32bit registers (PMUSERENR and PMCCFILTR) have zero reset
> values though.
Gosh, that silly (but highly relevant) detail escaped me.
> I will update the commit message to mention those explicitly.
Thanks!
--
Best,
Oliver
WARNING: multiple messages have this Message-ID (diff)
From: Oliver Upton <oliver.upton@linux.dev>
To: Reiji Watanabe <reijiw@google.com>
Cc: Marc Zyngier <maz@kernel.org>,
kvmarm@lists.cs.columbia.edu, kvmarm@lists.linux.dev,
kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
James Morse <james.morse@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Ricardo Koller <ricarkol@google.com>,
Jing Zhang <jingzhangos@google.com>,
Raghavendra Rao Anata <rananta@google.com>
Subject: Re: [PATCH 2/7] KVM: arm64: PMU: Use reset_pmu_reg() for PMUSERENR_EL0 and PMCCFILTR_EL0
Date: Tue, 10 Jan 2023 01:46:41 +0000 [thread overview]
Message-ID: <Y7zDgdmURNztXseL@google.com> (raw)
In-Reply-To: <CAAeT=Fxnkn++j6MObaAhHwb4nTf-g9XGOgzr0NYpA5K6hicFkg@mail.gmail.com>
On Mon, Jan 09, 2023 at 05:17:59PM -0800, Reiji Watanabe wrote:
> On Sun, Jan 8, 2023 at 11:13 AM Oliver Upton <oliver.upton@linux.dev> wrote:
> >
> > On Thu, Dec 29, 2022 at 07:59:23PM -0800, Reiji Watanabe wrote:
> > > The default reset function for PMU registers (reset_pmu_reg())
> > > now simply clears a specified register. Use that function for
> > > PMUSERENR_EL0 and PMCCFILTR_EL0, since those registers should
> > > simply be cleared on vCPU reset.
> >
> > AFAICT, the fields in both these registers have UNKNOWN reset values. Of
> > course, 0 is an entirely valid reset value but the architectural
> > behavior should be mentioned in the commit message.
>
> Uh, yeah, the commit message was misleading.
> The fields in both these registers have UNKNOWN reset values.
> The ones for 32bit registers (PMUSERENR and PMCCFILTR) have zero reset
> values though.
Gosh, that silly (but highly relevant) detail escaped me.
> I will update the commit message to mention those explicitly.
Thanks!
--
Best,
Oliver
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-01-10 2:09 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-30 3:59 [PATCH 0/7] KVM: arm64: PMU: Allow userspace to limit the number of PMCs on vCPU Reiji Watanabe
2022-12-30 3:59 ` Reiji Watanabe
2022-12-30 3:59 ` Reiji Watanabe
2022-12-30 3:59 ` [PATCH 1/7] KVM: arm64: PMU: Have reset_pmu_reg() to clear a register Reiji Watanabe
2022-12-30 3:59 ` Reiji Watanabe
2022-12-30 3:59 ` Reiji Watanabe
2023-01-08 19:07 ` Oliver Upton
2023-01-08 19:07 ` Oliver Upton
2023-01-10 5:50 ` Reiji Watanabe
2023-01-10 5:50 ` Reiji Watanabe
2022-12-30 3:59 ` [PATCH 2/7] KVM: arm64: PMU: Use reset_pmu_reg() for PMUSERENR_EL0 and PMCCFILTR_EL0 Reiji Watanabe
2022-12-30 3:59 ` Reiji Watanabe
2022-12-30 3:59 ` Reiji Watanabe
2023-01-08 19:13 ` Oliver Upton
2023-01-08 19:13 ` Oliver Upton
2023-01-10 1:17 ` Reiji Watanabe
2023-01-10 1:17 ` Reiji Watanabe
2023-01-10 1:46 ` Oliver Upton [this message]
2023-01-10 1:46 ` Oliver Upton
2022-12-30 3:59 ` [PATCH 3/7] KVM: arm64: PMU: Preserve vCPU's PMCR_EL0.N value on vCPU reset Reiji Watanabe
2022-12-30 3:59 ` Reiji Watanabe
2022-12-30 3:59 ` Reiji Watanabe
2022-12-30 3:59 ` [PATCH 4/7] tools: arm64: Import perf_event.h Reiji Watanabe
2022-12-30 3:59 ` Reiji Watanabe
2022-12-30 3:59 ` Reiji Watanabe
2022-12-30 3:59 ` [PATCH 5/7] KVM: selftests: aarch64: Introduce vpmu_counter_access test Reiji Watanabe
2022-12-30 3:59 ` Reiji Watanabe
2022-12-30 3:59 ` Reiji Watanabe
2022-12-30 3:59 ` [PATCH 6/7] KVM: selftests: aarch64: vPMU register test for implemented counters Reiji Watanabe
2022-12-30 3:59 ` Reiji Watanabe
2022-12-30 3:59 ` Reiji Watanabe
2022-12-30 3:59 ` [PATCH 7/7] KVM: selftests: aarch64: vPMU register test for unimplemented counters Reiji Watanabe
2022-12-30 3:59 ` Reiji Watanabe
2022-12-30 3:59 ` Reiji Watanabe
2023-01-03 12:40 ` [PATCH 0/7] KVM: arm64: PMU: Allow userspace to limit the number of PMCs on vCPU Jonathan Cameron
2023-01-03 12:40 ` Jonathan Cameron
2023-01-03 12:40 ` Jonathan Cameron
2023-01-03 12:47 ` Marc Zyngier
2023-01-03 12:47 ` Marc Zyngier
2023-01-03 12:47 ` Marc Zyngier
2023-01-05 2:59 ` Reiji Watanabe
2023-01-05 2:59 ` Reiji Watanabe
2023-01-05 2:59 ` Reiji Watanabe
2023-01-10 2:01 ` Oliver Upton
2023-01-10 2:01 ` Oliver Upton
2023-01-11 0:55 ` Reiji Watanabe
2023-01-11 0:55 ` Reiji Watanabe
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