From: Tony Lindgren <tony@atomide.com>
To: Andreas Kemnade <andreas@kemnade.info>
Cc: linux-omap@vger.kernel.org, peter.ujfalusi@gmail.com,
jarkko.nikula@bitmer.com
Subject: Re: omap mcbsp and prcm_fck
Date: Tue, 24 Jan 2023 15:25:45 +0200 [thread overview]
Message-ID: <Y8/cWRnK1RScmzQL@atomide.com> (raw)
In-Reply-To: <20230119221628.169766c9@aktux>
Hi,
* Andreas Kemnade <andreas@kemnade.info> [230119 21:16]:
> I tried this hack-fix:
>
> --- a/sound/soc/ti/omap-mcbsp.c
> +++ b/sound/soc/ti/omap-mcbsp.c
> @@ -64,7 +64,7 @@ static int omap2_mcbsp_set_clks_src(struct omap_mcbsp *mcbsp, u8 fck_src_id)
> if (fck_src_id == MCBSP_CLKS_PAD_SRC)
> src = "pad_fck";
> else if (fck_src_id == MCBSP_CLKS_PRCM_SRC)
> - src = "prcm_fck";
> + src = "mcbsp2_sync_mux_ck";
> else
> return -EINVAL;
>
>
> Then I stumple upon the next problem:
> omap-mcbsp 40124000.mcbsp: CLKS: could not clk_set_parent() to mcbsp2_sync_mux_ck
I don't think it's the direct parent here, the clkctrl clock bit 0 has
the clksel parent at bits [25:24], and the clksel internal clock parent
is bits [27:26]. See omap4_func_mcbsp2_gfclk_parents[] and
omap4_mcbsp2_bit_data[].
I'd just use assigned-clock-parents on the internal clock, and possibly
also for the clksel clock in the board specific dts file. This way the
mcbsp driver doing pm_runtime_enable() will enable the clkctrl modulemode
and the rest of the clock configuration should happen automatically.
Regards,
Tony
prev parent reply other threads:[~2023-01-24 13:25 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-17 11:08 omap mcbsp and prcm_fck Andreas Kemnade
2023-01-19 7:41 ` Tony Lindgren
2023-01-19 21:16 ` Andreas Kemnade
2023-01-24 13:25 ` Tony Lindgren [this message]
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