From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: "Bjørn Mork" <bjorn@mork.no>
Cc: netdev@vger.kernel.org, Sean Wang <sean.wang@mediatek.com>,
linux-kernel@vger.kernel.org,
"David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Eric Dumazet <edumazet@google.com>,
Alexander Couzens <lynxis@fe80.eu>,
John Crispin <john@phrozen.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
linux-mediatek@lists.infradead.org,
Frank Wunderlich <linux@fw-web.de>,
Paolo Abeni <pabeni@redhat.com>,
Mark Lee <Mark-MC.Lee@mediatek.com>,
linux-arm-kernel@lists.infradead.org,
Felix Fietkau <nbd@nbd.name>
Subject: Re: [PATCH v2] net: mtk_sgmii: implement mtk_pcs_ops
Date: Mon, 16 Jan 2023 18:54:05 +0000 [thread overview]
Message-ID: <Y8WdTVU141f2L1R5@shell.armlinux.org.uk> (raw)
In-Reply-To: <87a62i1ge4.fsf@miraculix.mork.no>
On Mon, Jan 16, 2023 at 07:30:27PM +0100, Bjørn Mork wrote:
> "Russell King (Oracle)" <linux@armlinux.org.uk> writes:
>
> > That all looks fine. However, I'm running out of ideas.
>
> Thanks a lot for the effort in any case. It's comforting that even the
> top experts can't figure out this one :-)
>
>
> > What we seem to have is:
> >
> > PHY:
> > VSPEC1_SGMII_CTRL = 0x34da
> > VSPEC1_SGMII_STAT = 0x000e
> >
> > The PHY is programmed to exchange SGMII with the host PCS, and it
> > says that it hasn't completed that exchange (bit 5 of STAT).
> >
> > The Mediatek PCS says:
> > BMCR = 0x1140 AN enabled
> > BMSR = 0x0008 AN capable
> > ADVERTISE = 0x0001 SGMII response (bit 14 is clear, hardware is
> > supposed to manage that bit)
> > LPA = 0x0000 SGMII received control word (nothing)
> > SGMII_MODE = 0x011b SGMII mode, duplex AN, 1000M, Full duplex,
> > Remote fault disable
> >
> > which all looks like it should work - but it isn't.
> >
> > One last thing I can think of trying at the moment would be writing
> > the VSPEC1_SGMII_CTRL with 0x36da, setting bit 9 which allegedly
> > restarts the SGMII exchange. There's some comments in the PHY driver
> > that this may be needed - maybe it's necessary once the MAC's PCS
> > has been switched to SGMII mode.
>
>
> Tried that now. Didn't change anything. And still no packets.
>
> root@OpenWrt:/# mdio mdio-bus 6:30 raw 8
> 0x34da
> root@OpenWrt:/# mdio mdio-bus 6:30 raw 9
> 0x000e
> root@OpenWrt:/# mdio mdio-bus 6:30 raw 8 0x36da
> root@OpenWrt:/# mdio mdio-bus 6:30 raw 8
> 0x34da
> root@OpenWrt:/# mdio mdio-bus 6:30 raw 9
> 0x000e
If bit 9 is indeed the restart-an bit, it will be self-clearing, so
I wouldn't expect a read back of it to change to 0x36da.
I guess next thing to try is clearing and setting the AN enable bit,
bit 12, so please try this:
mdio mdio-bus 6:30 raw 8 0x24da
mdio mdio-bus 6:30 raw 8 0x36da
mdio mdio-bus 6:30 raw 9
If that doesn't work, then let's try something a bit harder:
mdio mdio-bus 6:30 raw 8 0xb4da
mdio mdio-bus 6:30 raw 9
Please let me know the results from those.
Thanks.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
WARNING: multiple messages have this Message-ID (diff)
From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: "Bjørn Mork" <bjorn@mork.no>
Cc: Frank Wunderlich <frank-w@public-files.de>,
Frank Wunderlich <linux@fw-web.de>,
linux-mediatek@lists.infradead.org,
Alexander Couzens <lynxis@fe80.eu>, Felix Fietkau <nbd@nbd.name>,
John Crispin <john@phrozen.org>,
Sean Wang <sean.wang@mediatek.com>,
Mark Lee <Mark-MC.Lee@mediatek.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] net: mtk_sgmii: implement mtk_pcs_ops
Date: Mon, 16 Jan 2023 18:54:05 +0000 [thread overview]
Message-ID: <Y8WdTVU141f2L1R5@shell.armlinux.org.uk> (raw)
In-Reply-To: <87a62i1ge4.fsf@miraculix.mork.no>
On Mon, Jan 16, 2023 at 07:30:27PM +0100, Bjørn Mork wrote:
> "Russell King (Oracle)" <linux@armlinux.org.uk> writes:
>
> > That all looks fine. However, I'm running out of ideas.
>
> Thanks a lot for the effort in any case. It's comforting that even the
> top experts can't figure out this one :-)
>
>
> > What we seem to have is:
> >
> > PHY:
> > VSPEC1_SGMII_CTRL = 0x34da
> > VSPEC1_SGMII_STAT = 0x000e
> >
> > The PHY is programmed to exchange SGMII with the host PCS, and it
> > says that it hasn't completed that exchange (bit 5 of STAT).
> >
> > The Mediatek PCS says:
> > BMCR = 0x1140 AN enabled
> > BMSR = 0x0008 AN capable
> > ADVERTISE = 0x0001 SGMII response (bit 14 is clear, hardware is
> > supposed to manage that bit)
> > LPA = 0x0000 SGMII received control word (nothing)
> > SGMII_MODE = 0x011b SGMII mode, duplex AN, 1000M, Full duplex,
> > Remote fault disable
> >
> > which all looks like it should work - but it isn't.
> >
> > One last thing I can think of trying at the moment would be writing
> > the VSPEC1_SGMII_CTRL with 0x36da, setting bit 9 which allegedly
> > restarts the SGMII exchange. There's some comments in the PHY driver
> > that this may be needed - maybe it's necessary once the MAC's PCS
> > has been switched to SGMII mode.
>
>
> Tried that now. Didn't change anything. And still no packets.
>
> root@OpenWrt:/# mdio mdio-bus 6:30 raw 8
> 0x34da
> root@OpenWrt:/# mdio mdio-bus 6:30 raw 9
> 0x000e
> root@OpenWrt:/# mdio mdio-bus 6:30 raw 8 0x36da
> root@OpenWrt:/# mdio mdio-bus 6:30 raw 8
> 0x34da
> root@OpenWrt:/# mdio mdio-bus 6:30 raw 9
> 0x000e
If bit 9 is indeed the restart-an bit, it will be self-clearing, so
I wouldn't expect a read back of it to change to 0x36da.
I guess next thing to try is clearing and setting the AN enable bit,
bit 12, so please try this:
mdio mdio-bus 6:30 raw 8 0x24da
mdio mdio-bus 6:30 raw 8 0x36da
mdio mdio-bus 6:30 raw 9
If that doesn't work, then let's try something a bit harder:
mdio mdio-bus 6:30 raw 8 0xb4da
mdio mdio-bus 6:30 raw 9
Please let me know the results from those.
Thanks.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: "Bjørn Mork" <bjorn@mork.no>
Cc: Frank Wunderlich <frank-w@public-files.de>,
Frank Wunderlich <linux@fw-web.de>,
linux-mediatek@lists.infradead.org,
Alexander Couzens <lynxis@fe80.eu>, Felix Fietkau <nbd@nbd.name>,
John Crispin <john@phrozen.org>,
Sean Wang <sean.wang@mediatek.com>,
Mark Lee <Mark-MC.Lee@mediatek.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] net: mtk_sgmii: implement mtk_pcs_ops
Date: Mon, 16 Jan 2023 18:54:05 +0000 [thread overview]
Message-ID: <Y8WdTVU141f2L1R5@shell.armlinux.org.uk> (raw)
In-Reply-To: <87a62i1ge4.fsf@miraculix.mork.no>
On Mon, Jan 16, 2023 at 07:30:27PM +0100, Bjørn Mork wrote:
> "Russell King (Oracle)" <linux@armlinux.org.uk> writes:
>
> > That all looks fine. However, I'm running out of ideas.
>
> Thanks a lot for the effort in any case. It's comforting that even the
> top experts can't figure out this one :-)
>
>
> > What we seem to have is:
> >
> > PHY:
> > VSPEC1_SGMII_CTRL = 0x34da
> > VSPEC1_SGMII_STAT = 0x000e
> >
> > The PHY is programmed to exchange SGMII with the host PCS, and it
> > says that it hasn't completed that exchange (bit 5 of STAT).
> >
> > The Mediatek PCS says:
> > BMCR = 0x1140 AN enabled
> > BMSR = 0x0008 AN capable
> > ADVERTISE = 0x0001 SGMII response (bit 14 is clear, hardware is
> > supposed to manage that bit)
> > LPA = 0x0000 SGMII received control word (nothing)
> > SGMII_MODE = 0x011b SGMII mode, duplex AN, 1000M, Full duplex,
> > Remote fault disable
> >
> > which all looks like it should work - but it isn't.
> >
> > One last thing I can think of trying at the moment would be writing
> > the VSPEC1_SGMII_CTRL with 0x36da, setting bit 9 which allegedly
> > restarts the SGMII exchange. There's some comments in the PHY driver
> > that this may be needed - maybe it's necessary once the MAC's PCS
> > has been switched to SGMII mode.
>
>
> Tried that now. Didn't change anything. And still no packets.
>
> root@OpenWrt:/# mdio mdio-bus 6:30 raw 8
> 0x34da
> root@OpenWrt:/# mdio mdio-bus 6:30 raw 9
> 0x000e
> root@OpenWrt:/# mdio mdio-bus 6:30 raw 8 0x36da
> root@OpenWrt:/# mdio mdio-bus 6:30 raw 8
> 0x34da
> root@OpenWrt:/# mdio mdio-bus 6:30 raw 9
> 0x000e
If bit 9 is indeed the restart-an bit, it will be self-clearing, so
I wouldn't expect a read back of it to change to 0x36da.
I guess next thing to try is clearing and setting the AN enable bit,
bit 12, so please try this:
mdio mdio-bus 6:30 raw 8 0x24da
mdio mdio-bus 6:30 raw 8 0x36da
mdio mdio-bus 6:30 raw 9
If that doesn't work, then let's try something a bit harder:
mdio mdio-bus 6:30 raw 8 0xb4da
mdio mdio-bus 6:30 raw 9
Please let me know the results from those.
Thanks.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
next prev parent reply other threads:[~2023-01-16 18:54 UTC|newest]
Thread overview: 124+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-20 14:44 [PATCH v2] net: mtk_sgmii: implement mtk_pcs_ops Frank Wunderlich
2022-10-20 14:44 ` Frank Wunderlich
2022-10-20 14:44 ` Frank Wunderlich
2022-10-20 16:17 ` Russell King (Oracle)
2022-10-20 16:17 ` Russell King (Oracle)
2022-10-20 16:17 ` Russell King (Oracle)
2022-10-21 6:04 ` Frank Wunderlich
2022-10-21 6:04 ` Frank Wunderlich
2022-10-21 7:24 ` Russell King (Oracle)
2022-10-21 7:24 ` Russell King (Oracle)
[not found] ` <9E91B812-8687-463D-8B98-3C4BF26CBE08@fw-web.de>
2022-10-21 9:00 ` Russell King (Oracle)
2022-10-21 9:00 ` Russell King (Oracle)
2022-10-21 9:00 ` Russell King (Oracle)
2022-10-21 9:06 ` Russell King (Oracle)
2022-10-21 9:06 ` Russell King (Oracle)
2022-10-21 17:47 ` Aw: " Frank Wunderlich
2022-10-21 17:47 ` Frank Wunderlich
2022-10-21 18:31 ` Russell King (Oracle)
2022-10-21 18:31 ` Russell King (Oracle)
2022-10-21 19:52 ` Aw: " Frank Wunderlich
2022-10-21 19:52 ` Frank Wunderlich
2022-10-21 21:28 ` Russell King (Oracle)
2022-10-21 21:28 ` Russell King (Oracle)
2022-10-22 6:25 ` Frank Wunderlich
2022-10-22 6:25 ` Frank Wunderlich
2022-10-22 9:11 ` Russell King (Oracle)
2022-10-22 9:11 ` Russell King (Oracle)
2022-10-22 9:11 ` Russell King (Oracle)
2022-10-22 10:52 ` Aw: " Frank Wunderlich
2022-10-22 10:52 ` Frank Wunderlich
2022-10-22 17:05 ` Russell King (Oracle)
2022-10-22 17:05 ` Russell King (Oracle)
2022-10-22 17:53 ` Aw: " Frank Wunderlich
2022-10-22 17:53 ` Frank Wunderlich
2022-10-22 19:18 ` Russell King (Oracle)
2022-10-22 19:18 ` Russell King (Oracle)
2022-10-23 7:26 ` Aw: " Frank Wunderlich
2022-10-23 7:26 ` Frank Wunderlich
2022-10-23 9:43 ` Russell King (Oracle)
2022-10-23 9:43 ` Russell King (Oracle)
2022-10-23 15:05 ` Aw: " Frank Wunderlich
2022-10-23 15:05 ` Frank Wunderlich
2022-10-23 15:46 ` Russell King (Oracle)
2022-10-23 15:46 ` Russell King (Oracle)
2022-10-23 16:41 ` Aw: " Frank Wunderlich
2022-10-23 16:41 ` Frank Wunderlich
2022-10-23 17:52 ` Russell King (Oracle)
2022-10-23 17:52 ` Russell King (Oracle)
2022-10-23 19:03 ` Aw: " Frank Wunderlich
2022-10-23 19:03 ` Frank Wunderlich
2022-10-23 19:21 ` Frank Wunderlich
2022-10-23 19:21 ` Frank Wunderlich
2022-10-23 20:09 ` Russell King (Oracle)
2022-10-23 20:09 ` Russell King (Oracle)
2022-10-24 9:27 ` Russell King (Oracle)
2022-10-24 9:27 ` Russell King (Oracle)
2022-10-24 14:45 ` Aw: " Frank Wunderlich
2022-10-24 14:45 ` Frank Wunderlich
2022-10-24 14:56 ` Russell King (Oracle)
2022-10-24 14:56 ` Russell King (Oracle)
2022-10-25 8:03 ` Frank Wunderlich
2022-10-25 8:03 ` Frank Wunderlich
2023-01-16 13:08 ` Bjørn Mork
2023-01-16 13:08 ` Bjørn Mork
2023-01-16 13:47 ` Russell King (Oracle)
2023-01-16 13:47 ` Russell King (Oracle)
2023-01-16 13:47 ` Russell King (Oracle)
2023-01-16 14:45 ` Bjørn Mork
2023-01-16 14:45 ` Bjørn Mork
2023-01-16 14:45 ` Bjørn Mork
2023-01-16 14:59 ` Russell King (Oracle)
2023-01-16 14:59 ` Russell King (Oracle)
2023-01-16 14:59 ` Russell King (Oracle)
2023-01-16 15:21 ` Bjørn Mork
2023-01-16 15:21 ` Bjørn Mork
2023-01-16 15:21 ` Bjørn Mork
2023-01-16 15:32 ` Russell King (Oracle)
2023-01-16 15:32 ` Russell King (Oracle)
2023-01-16 15:32 ` Russell King (Oracle)
2023-01-16 16:33 ` Bjørn Mork
2023-01-16 16:33 ` Bjørn Mork
2023-01-16 16:33 ` Bjørn Mork
2023-01-16 16:43 ` Russell King (Oracle)
2023-01-16 16:43 ` Russell King (Oracle)
2023-01-16 16:43 ` Russell King (Oracle)
2023-01-16 16:48 ` Bjørn Mork
2023-01-16 16:48 ` Bjørn Mork
2023-01-16 16:48 ` Bjørn Mork
2023-01-16 16:45 ` Bjørn Mork
2023-01-16 16:45 ` Bjørn Mork
2023-01-16 16:45 ` Bjørn Mork
2023-01-16 17:47 ` Russell King (Oracle)
2023-01-16 17:47 ` Russell King (Oracle)
2023-01-16 17:47 ` Russell King (Oracle)
2023-01-16 17:59 ` Bjørn Mork
2023-01-16 17:59 ` Bjørn Mork
2023-01-16 17:59 ` Bjørn Mork
2023-01-16 18:04 ` Bjørn Mork
2023-01-16 18:04 ` Bjørn Mork
2023-01-16 18:04 ` Bjørn Mork
2023-01-16 18:14 ` Russell King (Oracle)
2023-01-16 18:14 ` Russell King (Oracle)
2023-01-16 18:14 ` Russell King (Oracle)
2023-01-16 18:30 ` Bjørn Mork
2023-01-16 18:30 ` Bjørn Mork
2023-01-16 18:30 ` Bjørn Mork
2023-01-16 18:50 ` Bjørn Mork
2023-01-16 18:50 ` Bjørn Mork
2023-01-16 18:50 ` Bjørn Mork
2023-01-16 19:15 ` Russell King (Oracle)
2023-01-16 19:15 ` Russell King (Oracle)
2023-01-16 19:15 ` Russell King (Oracle)
2023-01-16 18:54 ` Russell King (Oracle) [this message]
2023-01-16 18:54 ` Russell King (Oracle)
2023-01-16 18:54 ` Russell King (Oracle)
2023-01-16 18:59 ` Bjørn Mork
2023-01-16 18:59 ` Bjørn Mork
2023-01-16 18:59 ` Bjørn Mork
2023-01-16 18:06 ` Russell King (Oracle)
2023-01-16 18:06 ` Russell King (Oracle)
2023-01-16 18:06 ` Russell King (Oracle)
2022-10-20 19:10 ` Jakub Kicinski
2022-10-20 19:10 ` Jakub Kicinski
2022-10-20 19:10 ` Jakub Kicinski
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