[PATCH 0/8] Add DFU, emmc and usb boot for TI am62x

[PATCH 0/8] Add DFU, emmc and usb boot for TI am62x

[Sjoerd Simons]

This series adds more boot sources for the TI am62x. For that the dts'
are synced from the upstream ti-next git tree (to add usb nodes), some
dwc3 glue is and finally the default configuration is tuned to add
support for DFU and USB (host and gadget)



Aswath Govindraju (1):
  configs: am62: Add configs for enabling USB in U-Boot

Sjoerd Simons (7):
  omap: timer: add ti,am654-timer compatibility
  arm: mach-k3: am62: Add timer0 id to the dev list
  arm: dts: k3-am62: Bump dtsi from ti-next
  arm: dts: k3-am625-sk: Enable emmc in SPL
  usb: dwc3: Add dwc3 glue for am62
  arm: dts: k3-am625-sk: Enable usb ports in u-boot
  configs: am62x_evm_*: Enable USB and DFU support

 arch/arm/dts/k3-am62-main.dtsi       | 259 ++++++++++++++++++++++++---
 arch/arm/dts/k3-am62-mcu.dtsi        |  49 +++++
 arch/arm/dts/k3-am62-wakeup.dtsi     |   4 +-
 arch/arm/dts/k3-am625-r5-sk.dts      |   2 +-
 arch/arm/dts/k3-am625-sk-u-boot.dtsi |  39 +++-
 arch/arm/dts/k3-am625-sk.dts         |  95 +++++-----
 arch/arm/dts/k3-am625.dtsi           |  52 ++++++
 arch/arm/mach-k3/am62x/dev-data.c    |   1 +
 configs/am62x_evm_a53_defconfig      |  33 +++-
 configs/am62x_evm_r5_defconfig       |  26 ++-
 drivers/timer/omap-timer.c           |   1 +
 drivers/usb/dwc3/dwc3-generic.c      | 102 +++++++++++
 include/configs/am62x_evm.h          |  10 +-
 13 files changed, 578 insertions(+), 95 deletions(-)

-- 
2.39.0

[PATCH 1/8] omap: timer: add ti,am654-timer compatibility

[Sjoerd Simons]

THe TI AM654 timer is compatible with the omap-timer implementation, so
add it to the id list

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
---

 drivers/timer/omap-timer.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/timer/omap-timer.c b/drivers/timer/omap-timer.c
index aa2e4360c1b..9b6d97dae67 100644
--- a/drivers/timer/omap-timer.c
+++ b/drivers/timer/omap-timer.c
@@ -114,6 +114,7 @@ static const struct udevice_id omap_timer_ids[] = {
 	{ .compatible = "ti,am335x-timer" },
 	{ .compatible = "ti,am4372-timer" },
 	{ .compatible = "ti,omap5430-timer" },
+	{ .compatible = "ti,am654-timer" },
 	{}
 };
 
-- 
2.39.0

Re: [PATCH 1/8] omap: timer: add ti,am654-timer compatibility

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 283 bytes --]

On Sat, Jan 21, 2023 at 04:54:27PM +0100, Sjoerd Simons wrote:

> THe TI AM654 timer is compatible with the omap-timer implementation, so
> add it to the id list
> 
> Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom

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Re: [PATCH 1/8] omap: timer: add ti,am654-timer compatibility

[Dhruva Gole]

On 21/01/23 21:24, Sjoerd Simons wrote:
> THe TI AM654 timer is compatible with the omap-timer implementation, so
> add it to the id list
>
> Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
> ---
>
>  drivers/timer/omap-timer.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/timer/omap-timer.c b/drivers/timer/omap-timer.c
> index aa2e4360c1b..9b6d97dae67 100644
> --- a/drivers/timer/omap-timer.c
> +++ b/drivers/timer/omap-timer.c
> @@ -114,6 +114,7 @@ static const struct udevice_id omap_timer_ids[] = {
>  	{ .compatible = "ti,am335x-timer" },
>  	{ .compatible = "ti,am4372-timer" },
>  	{ .compatible = "ti,omap5430-timer" },

Reviewed-by: Dhruva Gole <d-gole@ti.com>

> +	{ .compatible = "ti,am654-timer" },
>  	{}
>  };
>  

-- 
Best regards,
Dhruva Gole
Texas Instruments Incorporated

[PATCH 2/8] arm: mach-k3: am62: Add timer0 id to the dev list

[Sjoerd Simons]

Timer0 is used by u-boot as the tick timer; Add it to the soc devices
list so it can be enabled via the k3 power controller.

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
---

 arch/arm/mach-k3/am62x/dev-data.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-k3/am62x/dev-data.c b/arch/arm/mach-k3/am62x/dev-data.c
index 616d0650b9c..140dca4bd1d 100644
--- a/arch/arm/mach-k3/am62x/dev-data.c
+++ b/arch/arm/mach-k3/am62x/dev-data.c
@@ -58,6 +58,7 @@ static struct ti_dev soc_dev_list[] = {
 	PSC_DEV(161, &soc_lpsc_list[8]),
 	PSC_DEV(162, &soc_lpsc_list[9]),
 	PSC_DEV(75, &soc_lpsc_list[10]),
+	PSC_DEV(36, &soc_lpsc_list[11]),
 	PSC_DEV(102, &soc_lpsc_list[11]),
 	PSC_DEV(146, &soc_lpsc_list[11]),
 	PSC_DEV(13, &soc_lpsc_list[12]),
-- 
2.39.0

Re: [PATCH 2/8] arm: mach-k3: am62: Add timer0 id to the dev list

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 314 bytes --]

On Sat, Jan 21, 2023 at 04:54:28PM +0100, Sjoerd Simons wrote:

> Timer0 is used by u-boot as the tick timer; Add it to the soc devices
> list so it can be enabled via the k3 power controller.
> 
> Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom

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[PATCH 3/8] arm: dts: k3-am62: Bump dtsi from ti-next

[Sjoerd Simons]

Update the am62 and am625 device-trees from current ti-k3-next (commit
880932e657f). This needed the following tweaks to the u-boot specific$
dtsi as well:
- Switch tick-timer to the main_timer as it's now defined in the main dtsi
- Add mdio pins to the cpsw3g pinctrl. It moved to a subnode in the
  linux dtsi that u-boot doesn't use/support

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
---

 arch/arm/dts/k3-am62-main.dtsi       | 259 ++++++++++++++++++++++++---
 arch/arm/dts/k3-am62-mcu.dtsi        |  49 +++++
 arch/arm/dts/k3-am62-wakeup.dtsi     |   4 +-
 arch/arm/dts/k3-am625-r5-sk.dts      |   2 +-
 arch/arm/dts/k3-am625-sk-u-boot.dtsi |   8 +-
 arch/arm/dts/k3-am625-sk.dts         |  95 +++++-----
 arch/arm/dts/k3-am625.dtsi           |  52 ++++++
 7 files changed, 381 insertions(+), 88 deletions(-)

diff --git a/arch/arm/dts/k3-am62-main.dtsi b/arch/arm/dts/k3-am62-main.dtsi
index 4a42f1b2e31..ea683fd77d6 100644
--- a/arch/arm/dts/k3-am62-main.dtsi
+++ b/arch/arm/dts/k3-am62-main.dtsi
@@ -54,6 +54,12 @@
 			reg = <0x4044 0x8>;
 			#phy-cells = <1>;
 		};
+
+		epwm_tbclk: clock@4130 {
+			compatible = "ti,am62-epwm-tbclk", "syscon";
+			reg = <0x4130 0x4>;
+			#clock-cells = <1>;
+		};
 	};
 
 	dmss: bus@48000000 {
@@ -144,8 +150,8 @@
 		compatible = "ti,k2g-sci";
 		ti,host-id = <12>;
 		mbox-names = "rx", "tx";
-		mboxes= <&secure_proxy_main 12>,
-			<&secure_proxy_main 13>;
+		mboxes = <&secure_proxy_main 12>,
+			 <&secure_proxy_main 13>;
 		reg-names = "debug_messages";
 		reg = <0x00 0x44043000 0x00 0xfe0>;
 
@@ -186,6 +192,102 @@
 		pinctrl-single,function-mask = <0xffffffff>;
 	};
 
+	main_timer0: timer@2400000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x2400000 0x00 0x400>;
+		interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 36 2>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 36 2>;
+		assigned-clock-parents = <&k3_clks 36 3>;
+		power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+	};
+
+	main_timer1: timer@2410000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x2410000 0x00 0x400>;
+		interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 37 2>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 37 2>;
+		assigned-clock-parents = <&k3_clks 37 3>;
+		power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+	};
+
+	main_timer2: timer@2420000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x2420000 0x00 0x400>;
+		interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 38 2>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 38 2>;
+		assigned-clock-parents = <&k3_clks 38 3>;
+		power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+	};
+
+	main_timer3: timer@2430000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x2430000 0x00 0x400>;
+		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 39 2>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 39 2>;
+		assigned-clock-parents = <&k3_clks 39 3>;
+		power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+	};
+
+	main_timer4: timer@2440000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x2440000 0x00 0x400>;
+		interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 40 2>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 40 2>;
+		assigned-clock-parents = <&k3_clks 40 3>;
+		power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+	};
+
+	main_timer5: timer@2450000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x2450000 0x00 0x400>;
+		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 41 2>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 41 2>;
+		assigned-clock-parents = <&k3_clks 41 3>;
+		power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+	};
+
+	main_timer6: timer@2460000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x2460000 0x00 0x400>;
+		interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 42 2>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 42 2>;
+		assigned-clock-parents = <&k3_clks 42 3>;
+		power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+	};
+
+	main_timer7: timer@2470000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x2470000 0x00 0x400>;
+		interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 43 2>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 43 2>;
+		assigned-clock-parents = <&k3_clks 43 3>;
+		power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+	};
+
 	main_uart0: serial@2800000 {
 		compatible = "ti,am64-uart", "ti,am654-uart";
 		reg = <0x00 0x02800000 0x00 0x100>;
@@ -193,6 +295,7 @@
 		power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 146 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	main_uart1: serial@2810000 {
@@ -202,6 +305,7 @@
 		power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 152 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	main_uart2: serial@2820000 {
@@ -211,6 +315,7 @@
 		power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 153 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	main_uart3: serial@2830000 {
@@ -220,6 +325,7 @@
 		power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 154 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	main_uart4: serial@2840000 {
@@ -229,6 +335,7 @@
 		power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 155 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	main_uart5: serial@2850000 {
@@ -238,6 +345,7 @@
 		power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 156 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	main_uart6: serial@2860000 {
@@ -247,6 +355,7 @@
 		power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 158 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	main_i2c0: i2c@20000000 {
@@ -258,6 +367,7 @@
 		power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 102 2>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 
 	main_i2c1: i2c@20010000 {
@@ -269,6 +379,7 @@
 		power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 103 2>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 
 	main_i2c2: i2c@20020000 {
@@ -280,6 +391,7 @@
 		power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 104 2>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 
 	main_i2c3: i2c@20030000 {
@@ -291,6 +403,7 @@
 		power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 105 2>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 
 	main_spi0: spi@20100000 {
@@ -300,7 +413,8 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 		power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
-		clocks = <&k3_clks 172 0>;
+		clocks = <&k3_clks 141 0>;
+		status = "disabled";
 	};
 
 	main_spi1: spi@20110000 {
@@ -310,7 +424,8 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 		power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
-		clocks = <&k3_clks 173 0>;
+		clocks = <&k3_clks 142 0>;
+		status = "disabled";
 	};
 
 	main_spi2: spi@20120000 {
@@ -320,7 +435,8 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 		power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
-		clocks = <&k3_clks 174 0>;
+		clocks = <&k3_clks 143 0>;
+		status = "disabled";
 	};
 
 	main_gpio_intr: interrupt-controller@a00000 {
@@ -385,8 +501,11 @@
 		ti,clkbuf-sel = <0x7>;
 		ti,otap-del-sel-legacy = <0x0>;
 		ti,otap-del-sel-mmc-hs = <0x0>;
-		ti,otap-del-sel-ddr52 = <0x9>;
-		ti,otap-del-sel-hs200 = <0x6>;
+		ti,otap-del-sel-ddr52 = <0x5>;
+		ti,otap-del-sel-hs200 = <0x5>;
+		ti,itap-del-sel-legacy = <0xa>;
+		ti,itap-del-sel-mmc-hs = <0x1>;
+		status = "disabled";
 	};
 
 	sdhci1: mmc@fa00000 {
@@ -397,19 +516,20 @@
 		clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
 		clock-names = "clk_ahb", "clk_xin";
 		ti,trm-icp = <0x2>;
-		ti,otap-del-sel-legacy = <0x0>;
+		ti,otap-del-sel-legacy = <0x8>;
 		ti,otap-del-sel-sd-hs = <0x0>;
-		ti,otap-del-sel-sdr12 = <0xf>;
-		ti,otap-del-sel-sdr25 = <0xf>;
-		ti,otap-del-sel-sdr50 = <0xc>;
-		ti,otap-del-sel-sdr104 = <0x6>;
-		ti,otap-del-sel-ddr50 = <0x9>;
-		ti,itap-del-sel-legacy = <0x0>;
-		ti,itap-del-sel-sd-hs = <0x0>;
-		ti,itap-del-sel-sdr12 = <0x0>;
-		ti,itap-del-sel-sdr25 = <0x0>;
+		ti,otap-del-sel-sdr12 = <0x0>;
+		ti,otap-del-sel-sdr25 = <0x0>;
+		ti,otap-del-sel-sdr50 = <0x8>;
+		ti,otap-del-sel-sdr104 = <0x7>;
+		ti,otap-del-sel-ddr50 = <0x4>;
+		ti,itap-del-sel-legacy = <0xa>;
+		ti,itap-del-sel-sd-hs = <0x1>;
+		ti,itap-del-sel-sdr12 = <0xa>;
+		ti,itap-del-sel-sdr25 = <0x1>;
 		ti,clkbuf-sel = <0x7>;
 		bus-width = <4>;
+		status = "disabled";
 	};
 
 	sdhci2: mmc@fa20000 {
@@ -420,18 +540,65 @@
 		clocks = <&k3_clks 184 5>, <&k3_clks 184 6>;
 		clock-names = "clk_ahb", "clk_xin";
 		ti,trm-icp = <0x2>;
-		ti,otap-del-sel-legacy = <0x0>;
+		ti,otap-del-sel-legacy = <0x8>;
 		ti,otap-del-sel-sd-hs = <0x0>;
-		ti,otap-del-sel-sdr12 = <0xf>;
-		ti,otap-del-sel-sdr25 = <0xf>;
-		ti,otap-del-sel-sdr50 = <0xc>;
-		ti,otap-del-sel-sdr104 = <0x6>;
-		ti,otap-del-sel-ddr50 = <0x9>;
-		ti,itap-del-sel-legacy = <0x0>;
-		ti,itap-del-sel-sd-hs = <0x0>;
-		ti,itap-del-sel-sdr12 = <0x0>;
-		ti,itap-del-sel-sdr25 = <0x0>;
+		ti,otap-del-sel-sdr12 = <0x0>;
+		ti,otap-del-sel-sdr25 = <0x0>;
+		ti,otap-del-sel-sdr50 = <0x8>;
+		ti,otap-del-sel-sdr104 = <0x7>;
+		ti,otap-del-sel-ddr50 = <0x8>;
+		ti,itap-del-sel-legacy = <0xa>;
+		ti,itap-del-sel-sd-hs = <0xa>;
+		ti,itap-del-sel-sdr12 = <0xa>;
+		ti,itap-del-sel-sdr25 = <0x1>;
 		ti,clkbuf-sel = <0x7>;
+		status = "disabled";
+	};
+
+	usbss0: dwc3-usb@f900000 {
+		compatible = "ti,am62-usb";
+		reg = <0x00 0x0f900000 0x00 0x800>;
+		clocks = <&k3_clks 161 3>;
+		clock-names = "ref";
+		ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
+		ranges;
+		status = "disabled";
+
+		usb0: usb@31000000 {
+			compatible = "snps,dwc3";
+			reg =<0x00 0x31000000 0x00 0x50000>;
+			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
+				     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
+			interrupt-names = "host", "peripheral";
+			maximum-speed = "high-speed";
+			dr_mode = "otg";
+		};
+	};
+
+	usbss1: dwc3-usb@f910000 {
+		compatible = "ti,am62-usb";
+		reg = <0x00 0x0f910000 0x00 0x800>;
+		clocks = <&k3_clks 162 3>;
+		clock-names = "ref";
+		ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
+		ranges;
+		status = "disabled";
+
+		usb1: usb@31100000 {
+			compatible = "snps,dwc3";
+			reg =<0x00 0x31100000 0x00 0x50000>;
+			interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
+				     <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
+			interrupt-names = "host", "peripheral";
+			maximum-speed = "high-speed";
+			dr_mode = "otg";
+		};
 	};
 
 	fss: bus@fc00000 {
@@ -456,6 +623,7 @@
 			power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			status = "disabled";
 		};
 	};
 
@@ -514,12 +682,13 @@
 			clocks = <&k3_clks 13 0>;
 			clock-names = "fck";
 			bus_freq = <1000000>;
+			status = "disabled";
 		};
 
 		cpts@3d000 {
 			compatible = "ti,j721e-cpts";
 			reg = <0x00 0x3d000 0x00 0x400>;
-			clocks = <&k3_clks 13 1>;
+			clocks = <&k3_clks 13 3>;
 			clock-names = "cpts";
 			interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "cpts";
@@ -551,6 +720,7 @@
 		power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 51 0>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 
 	ecap1: pwm@23110000 {
@@ -560,6 +730,7 @@
 		power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 52 0>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 
 	ecap2: pwm@23120000 {
@@ -569,6 +740,7 @@
 		power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 53 0>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 
 	main_mcan0: can@20701000 {
@@ -583,5 +755,36 @@
 			     <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "int0", "int1";
 		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+		status = "disabled";
+	};
+
+	epwm0: pwm@23000000 {
+		compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+		#pwm-cells = <3>;
+		reg = <0x00 0x23000000 0x00 0x100>;
+		power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
+		clock-names = "tbclk", "fck";
+		status = "disabled";
+	};
+
+	epwm1: pwm@23010000 {
+		compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+		#pwm-cells = <3>;
+		reg = <0x00 0x23010000 0x00 0x100>;
+		power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
+		clock-names = "tbclk", "fck";
+		status = "disabled";
+	};
+
+	epwm2: pwm@23020000 {
+		compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
+		#pwm-cells = <3>;
+		reg = <0x00 0x23020000 0x00 0x100>;
+		power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
+		clock-names = "tbclk", "fck";
+		status = "disabled";
 	};
 };
diff --git a/arch/arm/dts/k3-am62-mcu.dtsi b/arch/arm/dts/k3-am62-mcu.dtsi
index f56c803560f..a427231527c 100644
--- a/arch/arm/dts/k3-am62-mcu.dtsi
+++ b/arch/arm/dts/k3-am62-mcu.dtsi
@@ -14,6 +14,51 @@
 		pinctrl-single,function-mask = <0xffffffff>;
 	};
 
+	/*
+	 * The MCU domain timer interrupts are routed only to the ESM module,
+	 * and not currently available for Linux. The MCU domain timers are
+	 * of limited use without interrupts, and likely reserved by the ESM.
+	 */
+	mcu_timer0: timer@4800000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x4800000 0x00 0x400>;
+		clocks = <&k3_clks 35 2>;
+		clock-names = "fck";
+		power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+		status = "reserved";
+	};
+
+	mcu_timer1: timer@4810000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x4810000 0x00 0x400>;
+		clocks = <&k3_clks 48 2>;
+		clock-names = "fck";
+		power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+		status = "reserved";
+	};
+
+	mcu_timer2: timer@4820000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x4820000 0x00 0x400>;
+		clocks = <&k3_clks 49 2>;
+		clock-names = "fck";
+		power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+		status = "reserved";
+	};
+
+	mcu_timer3: timer@4830000 {
+		compatible = "ti,am654-timer";
+		reg = <0x00 0x4830000 0x00 0x400>;
+		clocks = <&k3_clks 50 2>;
+		clock-names = "fck";
+		power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>;
+		ti,timer-pwm;
+		status = "reserved";
+	};
+
 	mcu_uart0: serial@4a00000 {
 		compatible = "ti,am64-uart", "ti,am654-uart";
 		reg = <0x00 0x04a00000 0x00 0x100>;
@@ -21,6 +66,7 @@
 		power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 149 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	mcu_i2c0: i2c@4900000 {
@@ -32,6 +78,7 @@
 		power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 106 2>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 
 	mcu_spi0: spi@4b00000 {
@@ -42,6 +89,7 @@
 		#size-cells = <0>;
 		power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 147 0>;
+		status = "disabled";
 	};
 
 	mcu_spi1: spi@4b10000 {
@@ -52,6 +100,7 @@
 		#size-cells = <0>;
 		power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 148 0>;
+		status = "disabled";
 	};
 
 	mcu_gpio_intr: interrupt-controller@4210000 {
diff --git a/arch/arm/dts/k3-am62-wakeup.dtsi b/arch/arm/dts/k3-am62-wakeup.dtsi
index 4090134676c..38dced6b4fe 100644
--- a/arch/arm/dts/k3-am62-wakeup.dtsi
+++ b/arch/arm/dts/k3-am62-wakeup.dtsi
@@ -26,16 +26,18 @@
 		power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 114 0>;
 		clock-names = "fclk";
+		status = "disabled";
 	};
 
 	wkup_i2c0: i2c@2b200000 {
 		compatible = "ti,am64-i2c", "ti,omap4-i2c";
-		reg = <0x00 0x02b200000 0x00 0x100>;
+		reg = <0x00 0x2b200000 0x00 0x100>;
 		interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 		power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 107 4>;
 		clock-names = "fck";
+		status = "disabled";
 	};
 };
diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts
index d39b334ed03..4019ec3b3eb 100644
--- a/arch/arm/dts/k3-am625-r5-sk.dts
+++ b/arch/arm/dts/k3-am625-r5-sk.dts
@@ -20,7 +20,7 @@
 
 	chosen {
 		stdout-path = "serial2:115200n8";
-		tick-timer = &timer1;
+		tick-timer = &main_timer0;
 	};
 
 	memory@80000000 {
diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
index f275e3b46ca..37458737d76 100644
--- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
@@ -7,7 +7,7 @@
 / {
 	chosen {
 		stdout-path = "serial2:115200n8";
-		tick-timer = &timer1;
+		tick-timer = &main_timer0;
 	};
 
 	aliases {
@@ -22,10 +22,7 @@
 &cbass_main{
 	u-boot,dm-spl;
 
-	timer1: timer@2400000 {
-		compatible = "ti,omap5430-timer";
-		reg = <0x00 0x2400000 0x00 0x80>;
-		ti,timer-alwon;
+	timer@2400000 {
 		clock-frequency = <25000000>;
 		u-boot,dm-spl;
 	};
@@ -133,6 +130,7 @@
 	reg-names = "cpsw_nuss", "mac_efuse";
 	/delete-property/ ranges;
 	u-boot,dm-spl;
+	pinctrl-0 = <&main_mdio1_pins_default &main_rgmii1_pins_default>;
 
 	cpsw-phy-sel@04044 {
 		compatible = "ti,am64-phy-gmii-sel";
diff --git a/arch/arm/dts/k3-am625-sk.dts b/arch/arm/dts/k3-am625-sk.dts
index af5617ff44d..6bc7d63cf52 100644
--- a/arch/arm/dts/k3-am625-sk.dts
+++ b/arch/arm/dts/k3-am625-sk.dts
@@ -13,7 +13,7 @@
 #include "k3-am625.dtsi"
 
 / {
-	compatible =  "ti,am625-sk", "ti,am625";
+	compatible = "ti,am625-sk", "ti,am625";
 	model = "Texas Instruments AM625 SK";
 
 	aliases {
@@ -24,6 +24,8 @@
 		spi0 = &ospi0;
 		ethernet0 = &cpsw_port1;
 		ethernet1 = &cpsw_port2;
+		usb0 = &usb0;
+		usb1 = &usb1;
 	};
 
 	chosen {
@@ -31,6 +33,15 @@
 		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
 	};
 
+	opp-table {
+		/* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */
+		opp-1400000000 {
+			opp-hz = /bits/ 64 <1400000000>;
+			opp-supported-hw = <0x01 0x0004>;
+			clock-latency-ns = <6000000>;
+		};
+	};
+
 	memory@80000000 {
 		device_type = "memory";
 		/* 2G RAM */
@@ -275,6 +286,12 @@
 			AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
 		>;
 	};
+
+	main_usb1_pins_default: main-usb1-pins-default {
+		pinctrl-single,pins = <
+			AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */
+		>;
+	};
 };
 
 &wkup_uart0 {
@@ -282,11 +299,8 @@
 	status = "reserved";
 };
 
-&mcu_uart0 {
-	status = "disabled";
-};
-
 &main_uart0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_uart0_pins_default>;
 };
@@ -296,42 +310,16 @@
 	status = "reserved";
 };
 
-&main_uart2 {
-	status = "disabled";
-};
-
-&main_uart3 {
-	status = "disabled";
-};
-
-&main_uart4 {
-	status = "disabled";
-};
-
-&main_uart5 {
-	status = "disabled";
-};
-
-&main_uart6 {
-	status = "disabled";
-};
-
-&mcu_i2c0 {
-	status = "disabled";
-};
-
-&wkup_i2c0 {
-	status = "disabled";
-};
-
 &main_i2c0 {
-	status = "disabled";
+	status = "okay";
+	pinctrl-names = "default";
 	pinctrl-0 = <&main_i2c0_pins_default>;
 	clock-frequency = <400000>;
 };
 
 &main_i2c1 {
-	status = "disabled";
+	status = "okay";
+	pinctrl-names = "default";
 	pinctrl-0 = <&main_i2c1_pins_default>;
 	clock-frequency = <400000>;
 
@@ -363,15 +351,8 @@
 	};
 };
 
-&main_i2c2 {
-	status = "disabled";
-};
-
-&main_i2c3 {
-	status = "disabled";
-};
-
 &sdhci0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_mmc0_pins_default>;
 	ti,driver-strength-ohm = <50>;
@@ -380,6 +361,7 @@
 
 &sdhci1 {
 	/* SD/MMC */
+	status = "okay";
 	vmmc-supply = <&vdd_mmc1>;
 	vqmmc-supply = <&vdd_sd_dv>;
 	pinctrl-names = "default";
@@ -390,8 +372,7 @@
 
 &cpsw3g {
 	pinctrl-names = "default";
-	pinctrl-0 = <&main_mdio1_pins_default
-		     &main_rgmii1_pins_default
+	pinctrl-0 = <&main_rgmii1_pins_default
 		     &main_rgmii2_pins_default>;
 };
 
@@ -406,6 +387,10 @@
 };
 
 &cpsw3g_mdio {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&main_mdio1_pins_default>;
+
 	cpsw3g_phy0: ethernet-phy@0 {
 		reg = <0>;
 		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
@@ -429,6 +414,7 @@
 };
 
 &ospi0 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&ospi0_pins_default>;
 
@@ -487,18 +473,21 @@
 	};
 };
 
-&ecap0 {
-	status = "disabled";
+&usbss0 {
+	status = "okay";
+	ti,vbus-divider;
 };
 
-&ecap1 {
-	status = "disabled";
+&usbss1 {
+	status = "okay";
 };
 
-&ecap2 {
-	status = "disabled";
+&usb0 {
+	dr_mode = "peripheral";
 };
 
-&main_mcan0 {
-	status = "disabled";
+&usb1 {
+	dr_mode = "host";
+	pinctrl-names = "default";
+	pinctrl-0 = <&main_usb1_pins_default>;
 };
diff --git a/arch/arm/dts/k3-am625.dtsi b/arch/arm/dts/k3-am625.dtsi
index 887f31c23fe..acc7f8ab642 100644
--- a/arch/arm/dts/k3-am625.dtsi
+++ b/arch/arm/dts/k3-am625.dtsi
@@ -48,6 +48,8 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <128>;
 			next-level-cache = <&L2_0>;
+			operating-points-v2 = <&a53_opp_table>;
+			clocks = <&k3_clks 135 0>;
 		};
 
 		cpu1: cpu@1 {
@@ -62,6 +64,8 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <128>;
 			next-level-cache = <&L2_0>;
+			operating-points-v2 = <&a53_opp_table>;
+			clocks = <&k3_clks 136 0>;
 		};
 
 		cpu2: cpu@2 {
@@ -76,6 +80,8 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <128>;
 			next-level-cache = <&L2_0>;
+			operating-points-v2 = <&a53_opp_table>;
+			clocks = <&k3_clks 137 0>;
 		};
 
 		cpu3: cpu@3 {
@@ -90,11 +96,57 @@
 			d-cache-line-size = <64>;
 			d-cache-sets = <128>;
 			next-level-cache = <&L2_0>;
+			operating-points-v2 = <&a53_opp_table>;
+			clocks = <&k3_clks 138 0>;
+		};
+	};
+
+	a53_opp_table: opp-table {
+		compatible = "operating-points-v2-ti-cpu";
+		opp-shared;
+		syscon = <&wkup_conf>;
+
+		opp-200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-supported-hw = <0x01 0x0007>;
+			clock-latency-ns = <6000000>;
+		};
+
+		opp-400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-supported-hw = <0x01 0x0007>;
+			clock-latency-ns = <6000000>;
+		};
+
+		opp-600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-supported-hw = <0x01 0x0007>;
+			clock-latency-ns = <6000000>;
+		};
+
+		opp-800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-supported-hw = <0x01 0x0007>;
+			clock-latency-ns = <6000000>;
+		};
+
+		opp-1000000000 {
+			opp-hz = /bits/ 64 <1000000000>;
+			opp-supported-hw = <0x01 0x0006>;
+			clock-latency-ns = <6000000>;
+		};
+
+		opp-1250000000 {
+			opp-hz = /bits/ 64 <1250000000>;
+			opp-supported-hw = <0x01 0x0004>;
+			clock-latency-ns = <6000000>;
+			opp-suspend;
 		};
 	};
 
 	L2_0: l2-cache0 {
 		compatible = "cache";
+		cache-unified;
 		cache-level = <2>;
 		cache-size = <0x40000>;
 		cache-line-size = <64>;
-- 
2.39.0

Re: [PATCH 3/8] arm: dts: k3-am62: Bump dtsi from ti-next

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 613 bytes --]

On Sat, Jan 21, 2023 at 04:54:29PM +0100, Sjoerd Simons wrote:

> Update the am62 and am625 device-trees from current ti-k3-next (commit
> 880932e657f). This needed the following tweaks to the u-boot specific$
> dtsi as well:
> - Switch tick-timer to the main_timer as it's now defined in the main dtsi
> - Add mdio pins to the cpsw3g pinctrl. It moved to a subnode in the
>   linux dtsi that u-boot doesn't use/support
> 
> Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>

These need to come from linux-next or similar, not a TI tree. What's the
status on upstreaming those changes?

-- 
Tom

[-- Attachment #2: signature.asc --]
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Re: [PATCH 3/8] arm: dts: k3-am62: Bump dtsi from ti-next

[Sjoerd Simons]

On Tue, 2023-01-24 at 15:47 -0500, Tom Rini wrote:
> On Sat, Jan 21, 2023 at 04:54:29PM +0100, Sjoerd Simons wrote:
> 
> > Update the am62 and am625 device-trees from current ti-k3-next 

...

> These need to come from linux-next or similar, not a TI tree. What's
> the
> status on upstreaming those changes?

With ti-k3-next i was referring to: 

https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git/log/?h=ti-k3-next

Which is a maintainer branch that flows into the ti tree that gets
pulled into linux next.. Just checked this morning and the relevant
commit is now available in linux-next as well (it wasn't just yet when
i sent this out).


Would you like me to resend this series with the body of this patch
updated to reflect that ?

-- 
Sjoerd Simons
Collabora Ltd.

Re: [PATCH 3/8] arm: dts: k3-am62: Bump dtsi from ti-next

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 1009 bytes --]

On Wed, Jan 25, 2023 at 08:32:39AM +0100, Sjoerd Simons wrote:
> On Tue, 2023-01-24 at 15:47 -0500, Tom Rini wrote:
> > On Sat, Jan 21, 2023 at 04:54:29PM +0100, Sjoerd Simons wrote:
> > 
> > > Update the am62 and am625 device-trees from current ti-k3-next 
> 
> ...
> 
> > These need to come from linux-next or similar, not a TI tree. What's
> > the
> > status on upstreaming those changes?
> 
> With ti-k3-next i was referring to: 
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git/log/?h=ti-k3-next
> 
> Which is a maintainer branch that flows into the ti tree that gets
> pulled into linux next.. Just checked this morning and the relevant
> commit is now available in linux-next as well (it wasn't just yet when
> i sent this out).
> 
> 
> Would you like me to resend this series with the body of this patch
> updated to reflect that ?

Thanks for clarifying, both of you. For this go-round it's fine, just
please rephrase things for future series.

-- 
Tom

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[PATCH 4/8] arm: dts: k3-am625-sk: Enable emmc in SPL

[Sjoerd Simons]

sdhci0 on the k3-am625-sk is the emmc, enable this in SPL as well to
allow booting from that media.

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
---

 arch/arm/dts/k3-am625-sk-u-boot.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
index 37458737d76..32163e5373a 100644
--- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
@@ -92,6 +92,14 @@
 	u-boot,dm-spl;
 };
 
+&sdhci0 {
+	u-boot,dm-spl;
+};
+
+&main_mmc0_pins_default {
+	u-boot,dm-spl;
+};
+
 &sdhci1 {
 	u-boot,dm-spl;
 };
-- 
2.39.0

Re: [PATCH 4/8] arm: dts: k3-am625-sk: Enable emmc in SPL

[Tom Rini]

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On Sat, Jan 21, 2023 at 04:54:30PM +0100, Sjoerd Simons wrote:

> sdhci0 on the k3-am625-sk is the emmc, enable this in SPL as well to
> allow booting from that media.
> 
> Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>

Applied to u-boot/master, thanks!

-- 
Tom

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Re: [PATCH 4/8] arm: dts: k3-am625-sk: Enable emmc in SPL

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 901 bytes --]

On Sat, Jan 21, 2023 at 04:54:30PM +0100, Sjoerd Simons wrote:

> sdhci0 on the k3-am625-sk is the emmc, enable this in SPL as well to
> allow booting from that media.
> 
> Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
> ---
> 
>  arch/arm/dts/k3-am625-sk-u-boot.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
> index 37458737d76..32163e5373a 100644
> --- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
> +++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
> @@ -92,6 +92,14 @@
>  	u-boot,dm-spl;
>  };
>  
> +&sdhci0 {
> +	u-boot,dm-spl;
> +};
> +
> +&main_mmc0_pins_default {
> +	u-boot,dm-spl;
> +};
> +
>  &sdhci1 {
>  	u-boot,dm-spl;
>  };

I mis-typed when I said I had applied this already and was intending to
say:
Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom

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[PATCH 5/8] usb: dwc3: Add dwc3 glue for am62

[Sjoerd Simons]

Add glue code for TI AM62 to the dwc3 driver; Most code adopted from
TI vendor u-boot code.

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
---

 drivers/usb/dwc3/dwc3-generic.c | 102 ++++++++++++++++++++++++++++++++
 1 file changed, 102 insertions(+)

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 78966718d01..cab7b2e928d 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -11,6 +11,7 @@
 #include <cpu_func.h>
 #include <log.h>
 #include <dm.h>
+#include <dm/device_compat.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
 #include <dwc3-uboot.h>
@@ -23,7 +24,9 @@
 #include <usb.h>
 #include "core.h"
 #include "gadget.h"
+#include <regmap.h>
 #include <reset.h>
+#include <syscon.h>
 #include <clk.h>
 #include <usb/xhci.h>
 #include <asm/gpio.h>
@@ -398,6 +401,104 @@ struct dwc3_glue_ops ti_ops = {
 	.glue_configure = dwc3_ti_glue_configure,
 };
 
+void dwc3_ti_am62_glue_configure(struct udevice *dev, int index,
+				 enum usb_dr_mode mode)
+{
+#define USBSS_MODE_CONTROL		0x1c
+#define USBSS_PHY_CONFIG		0x8
+#define USBSS_PHY_VBUS_SEL_MASK		GENMASK(2, 1)
+#define USBSS_PHY_VBUS_SEL_SHIFT	1
+#define USBSS_MODE_VALID	BIT(0)
+#define PHY_PLL_REFCLK_MASK	GENMASK(3, 0)
+static const int dwc3_ti_am62_rate_table[] = {	/* in KHZ */
+	9600,
+	10000,
+	12000,
+	19200,
+	20000,
+	24000,
+	25000,
+	26000,
+	38400,
+	40000,
+	58000,
+	50000,
+	52000,
+};
+
+	struct clk usb2_refclk;
+	int rate_code, i, ret;
+	unsigned long rate;
+	u32 reg;
+	void *usbss;
+	bool vbus_divider;
+	struct regmap *syscon;
+	struct ofnode_phandle_args args;
+
+	usbss = dev_remap_addr_index(dev, 0);
+	if (IS_ERR(usbss)) {
+		dev_err(dev, "can't map IOMEM resource\n");
+		return;
+	}
+
+	ret = clk_get_by_name(dev, "ref", &usb2_refclk);
+	if (ret) {
+		dev_err(dev, "can't get usb2_refclk\n");
+		return;
+	}
+
+	/* Calcuate the rate code */
+	rate = clk_get_rate(&usb2_refclk);
+	rate /= 1000;	/* To KHz */
+	for (i = 0; i < ARRAY_SIZE(dwc3_ti_am62_rate_table); i++) {
+		if (dwc3_ti_am62_rate_table[i] == rate)
+			break;
+	}
+
+	if (i == ARRAY_SIZE(dwc3_ti_am62_rate_table)) {
+		dev_err(dev, "unsupported usb2_refclk rate: %lu KHz\n", rate);
+		return;
+	}
+
+	rate_code = i;
+
+	/* Read the syscon property */
+	syscon = syscon_regmap_lookup_by_phandle(dev, "ti,syscon-phy-pll-refclk");
+	if (IS_ERR(syscon)) {
+		dev_err(dev, "unable to get ti,syscon-phy-pll-refclk regmap\n");
+		return;
+	}
+
+	ret = ofnode_parse_phandle_with_args(dev_ofnode(dev), "ti,syscon-phy-pll-refclk", NULL, 1,
+					     0, &args);
+	if (ret)
+		return;
+
+	/* Program PHY PLL refclk by reading syscon property */
+	ret = regmap_update_bits(syscon, args.args[0], PHY_PLL_REFCLK_MASK, rate_code);
+	if (ret) {
+		dev_err(dev, "failed to set phy pll reference clock rate\n");
+		return;
+	}
+
+	/* VBUS divider select */
+	reg = readl(usbss + USBSS_PHY_CONFIG);
+	vbus_divider = dev_read_bool(dev, "ti,vbus-divider");
+	if (vbus_divider)
+		reg |= 1 << USBSS_PHY_VBUS_SEL_SHIFT;
+
+	writel(reg, usbss + USBSS_PHY_CONFIG);
+
+	/* Set mode valid */
+	reg = readl(usbss + USBSS_MODE_CONTROL);
+	reg |= USBSS_MODE_VALID;
+	writel(reg, usbss + USBSS_MODE_CONTROL);
+}
+
+struct dwc3_glue_ops ti_am62_ops = {
+	.glue_configure = dwc3_ti_am62_glue_configure,
+};
+
 static int dwc3_glue_bind(struct udevice *parent)
 {
 	ofnode node;
@@ -570,6 +671,7 @@ static const struct udevice_id dwc3_glue_ids[] = {
 	{ .compatible = "ti,keystone-dwc3"},
 	{ .compatible = "ti,dwc3", .data = (ulong)&ti_ops },
 	{ .compatible = "ti,am437x-dwc3", .data = (ulong)&ti_ops },
+	{ .compatible = "ti,am62-usb", .data = (ulong)&ti_am62_ops },
 	{ .compatible = "ti,am654-dwc3" },
 	{ .compatible = "rockchip,rk3328-dwc3" },
 	{ .compatible = "rockchip,rk3399-dwc3" },
-- 
2.39.0

Re: [PATCH 5/8] usb: dwc3: Add dwc3 glue for am62

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 4509 bytes --]

On Sat, Jan 21, 2023 at 04:54:31PM +0100, Sjoerd Simons wrote:

> Add glue code for TI AM62 to the dwc3 driver; Most code adopted from
> TI vendor u-boot code.
> 
> Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>

After talking with Marek, this should be reworked to go on top of:
https://patchwork.ozlabs.org/project/uboot/list/?series=337977&state=*
which itself does need a v2, instead of this approach.

> ---
> 
>  drivers/usb/dwc3/dwc3-generic.c | 102 ++++++++++++++++++++++++++++++++
>  1 file changed, 102 insertions(+)
> 
> diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
> index 78966718d01..cab7b2e928d 100644
> --- a/drivers/usb/dwc3/dwc3-generic.c
> +++ b/drivers/usb/dwc3/dwc3-generic.c
> @@ -11,6 +11,7 @@
>  #include <cpu_func.h>
>  #include <log.h>
>  #include <dm.h>
> +#include <dm/device_compat.h>
>  #include <dm/device-internal.h>
>  #include <dm/lists.h>
>  #include <dwc3-uboot.h>
> @@ -23,7 +24,9 @@
>  #include <usb.h>
>  #include "core.h"
>  #include "gadget.h"
> +#include <regmap.h>
>  #include <reset.h>
> +#include <syscon.h>
>  #include <clk.h>
>  #include <usb/xhci.h>
>  #include <asm/gpio.h>
> @@ -398,6 +401,104 @@ struct dwc3_glue_ops ti_ops = {
>  	.glue_configure = dwc3_ti_glue_configure,
>  };
>  
> +void dwc3_ti_am62_glue_configure(struct udevice *dev, int index,
> +				 enum usb_dr_mode mode)
> +{
> +#define USBSS_MODE_CONTROL		0x1c
> +#define USBSS_PHY_CONFIG		0x8
> +#define USBSS_PHY_VBUS_SEL_MASK		GENMASK(2, 1)
> +#define USBSS_PHY_VBUS_SEL_SHIFT	1
> +#define USBSS_MODE_VALID	BIT(0)
> +#define PHY_PLL_REFCLK_MASK	GENMASK(3, 0)
> +static const int dwc3_ti_am62_rate_table[] = {	/* in KHZ */
> +	9600,
> +	10000,
> +	12000,
> +	19200,
> +	20000,
> +	24000,
> +	25000,
> +	26000,
> +	38400,
> +	40000,
> +	58000,
> +	50000,
> +	52000,
> +};
> +
> +	struct clk usb2_refclk;
> +	int rate_code, i, ret;
> +	unsigned long rate;
> +	u32 reg;
> +	void *usbss;
> +	bool vbus_divider;
> +	struct regmap *syscon;
> +	struct ofnode_phandle_args args;
> +
> +	usbss = dev_remap_addr_index(dev, 0);
> +	if (IS_ERR(usbss)) {
> +		dev_err(dev, "can't map IOMEM resource\n");
> +		return;
> +	}
> +
> +	ret = clk_get_by_name(dev, "ref", &usb2_refclk);
> +	if (ret) {
> +		dev_err(dev, "can't get usb2_refclk\n");
> +		return;
> +	}
> +
> +	/* Calcuate the rate code */
> +	rate = clk_get_rate(&usb2_refclk);
> +	rate /= 1000;	/* To KHz */
> +	for (i = 0; i < ARRAY_SIZE(dwc3_ti_am62_rate_table); i++) {
> +		if (dwc3_ti_am62_rate_table[i] == rate)
> +			break;
> +	}
> +
> +	if (i == ARRAY_SIZE(dwc3_ti_am62_rate_table)) {
> +		dev_err(dev, "unsupported usb2_refclk rate: %lu KHz\n", rate);
> +		return;
> +	}
> +
> +	rate_code = i;
> +
> +	/* Read the syscon property */
> +	syscon = syscon_regmap_lookup_by_phandle(dev, "ti,syscon-phy-pll-refclk");
> +	if (IS_ERR(syscon)) {
> +		dev_err(dev, "unable to get ti,syscon-phy-pll-refclk regmap\n");
> +		return;
> +	}
> +
> +	ret = ofnode_parse_phandle_with_args(dev_ofnode(dev), "ti,syscon-phy-pll-refclk", NULL, 1,
> +					     0, &args);
> +	if (ret)
> +		return;
> +
> +	/* Program PHY PLL refclk by reading syscon property */
> +	ret = regmap_update_bits(syscon, args.args[0], PHY_PLL_REFCLK_MASK, rate_code);
> +	if (ret) {
> +		dev_err(dev, "failed to set phy pll reference clock rate\n");
> +		return;
> +	}
> +
> +	/* VBUS divider select */
> +	reg = readl(usbss + USBSS_PHY_CONFIG);
> +	vbus_divider = dev_read_bool(dev, "ti,vbus-divider");
> +	if (vbus_divider)
> +		reg |= 1 << USBSS_PHY_VBUS_SEL_SHIFT;
> +
> +	writel(reg, usbss + USBSS_PHY_CONFIG);
> +
> +	/* Set mode valid */
> +	reg = readl(usbss + USBSS_MODE_CONTROL);
> +	reg |= USBSS_MODE_VALID;
> +	writel(reg, usbss + USBSS_MODE_CONTROL);
> +}
> +
> +struct dwc3_glue_ops ti_am62_ops = {
> +	.glue_configure = dwc3_ti_am62_glue_configure,
> +};
> +
>  static int dwc3_glue_bind(struct udevice *parent)
>  {
>  	ofnode node;
> @@ -570,6 +671,7 @@ static const struct udevice_id dwc3_glue_ids[] = {
>  	{ .compatible = "ti,keystone-dwc3"},
>  	{ .compatible = "ti,dwc3", .data = (ulong)&ti_ops },
>  	{ .compatible = "ti,am437x-dwc3", .data = (ulong)&ti_ops },
> +	{ .compatible = "ti,am62-usb", .data = (ulong)&ti_am62_ops },
>  	{ .compatible = "ti,am654-dwc3" },
>  	{ .compatible = "rockchip,rk3328-dwc3" },
>  	{ .compatible = "rockchip,rk3399-dwc3" },

-- 
Tom

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[PATCH 6/8] configs: am62: Add configs for enabling USB in U-Boot

[Sjoerd Simons]

From: Aswath Govindraju <a-govindraju@ti.com>

Add configs for enabling USB host MSC and USB DFU in U-Boot.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
[ rebase from vendor u-boot to upstream ]
Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
---

 include/configs/am62x_evm.h | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/include/configs/am62x_evm.h b/include/configs/am62x_evm.h
index 7fbefdece40..580ff390f6e 100644
--- a/include/configs/am62x_evm.h
+++ b/include/configs/am62x_evm.h
@@ -11,6 +11,7 @@
 
 #include <config_distro_bootcmd.h>
 #include <environment/ti/mmc.h>
+#include <environment/ti/k3_dfu.h>
 
 /* DDR Configuration */
 #define CFG_SYS_SDRAM_BASE1		0x880000000
@@ -77,13 +78,20 @@
 		"${bootdir}/${name_fit}\0"				\
 	"partitions=" PARTS_DEFAULT
 
+#define EXTRA_ENV_DFUARGS \
+	DFU_ALT_INFO_MMC \
+	DFU_ALT_INFO_EMMC \
+	DFU_ALT_INFO_RAM \
+	DFU_ALT_INFO_OSPI
+
 /* Incorporate settings into the U-Boot environment */
 #define CFG_EXTRA_ENV_SETTINGS					\
 	DEFAULT_LINUX_BOOT_ENV						\
 	DEFAULT_MMC_TI_ARGS						\
 	EXTRA_ENV_AM625_BOARD_SETTINGS					\
 	EXTRA_ENV_AM625_BOARD_SETTINGS_MMC				\
-	BOOTENV
+	BOOTENV								\
+	EXTRA_ENV_DFUARGS
 
 /* Now for the remaining common defines */
 #include <configs/ti_armv7_common.h>
-- 
2.39.0

[PATCH 7/8] arm: dts: k3-am625-sk: Enable usb ports in u-boot

[Sjoerd Simons]

Enable both usb0 as a peripheral for use with DFU and usb1 as a host
port for usage with e.g. usb storage.

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
---

 arch/arm/dts/k3-am625-sk-u-boot.dtsi | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
index 32163e5373a..5a5b539f97a 100644
--- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
@@ -154,3 +154,26 @@
 &cpsw_port2 {
 	status = "disabled";
 };
+
+&usbss0 {
+	u-boot,dm-spl;
+};
+
+&usb0 {
+	dr_mode = "peripheral";
+	/* Since role switching is not supported in U-Boot */
+	/delete-property/ extcon;
+	u-boot,dm-spl;
+};
+
+&usbss1 {
+	u-boot,dm-spl;
+};
+
+&usb1 {
+	u-boot,dm-spl;
+};
+
+&main_usb1_pins_default {
+	u-boot,dm-spl;
+};
-- 
2.39.0

Re: [PATCH 7/8] arm: dts: k3-am625-sk: Enable usb ports in u-boot

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 296 bytes --]

On Sat, Jan 21, 2023 at 04:54:33PM +0100, Sjoerd Simons wrote:

> Enable both usb0 as a peripheral for use with DFU and usb1 as a host
> port for usage with e.g. usb storage.
> 
> Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom

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[PATCH 8/8] configs: am62x_evm_*: Enable USB and DFU support

[Sjoerd Simons]

Enable USB host as well as USB gadget and DFU support; This allows using
a single set binaries to load both the u-boot chain and linux from USB DFU,
SD card and emmc.

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>

---

 configs/am62x_evm_a53_defconfig | 33 ++++++++++++++++++++++++++++++---
 configs/am62x_evm_r5_defconfig  | 26 +++++++++++++++++++++++---
 2 files changed, 53 insertions(+), 6 deletions(-)

diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig
index 273db2edbfb..5a650d21f32 100644
--- a/configs/am62x_evm_a53_defconfig
+++ b/configs/am62x_evm_a53_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_K3=y
+CONFIG_SYS_MALLOC_LEN=0x2000000
 CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -7,6 +8,8 @@ CONFIG_NR_DRAM_BANKS=2
 CONFIG_SOC_K3_AM625=y
 CONFIG_K3_ATF_LOAD_ADDR=0x9e780000
 CONFIG_TARGET_AM625_A53_EVM=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
 CONFIG_SPL_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="k3-am625-sk"
 CONFIG_SPL_TEXT_BASE=0x80080000
@@ -18,8 +21,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_DISTRO_DEFAULTS=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
@@ -32,17 +33,23 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
+CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
 CONFIG_SPL_DM_MAILBOX=y
 CONFIG_SPL_DM_SPI_FLASH=y
 CONFIG_SPL_POWER_DOMAIN=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
 # CONFIG_SPL_SPI_FLASH_TINY is not set
 CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_DFU=y
 CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_SYS_BOOTM_LEN=0x800000
+CONFIG_CMD_DFU=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_MULTI_DTB_FIT=y
@@ -53,10 +60,17 @@ CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
 CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_CLK_TI_SCI=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_RAM=y
+CONFIG_DFU_SF=y
+CONFIG_SYS_DFU_DATA_BUF_SIZE=0x5000
+CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000
 CONFIG_DMA_CHANNELS=y
 CONFIG_TI_K3_NAVSS_UDMA=y
 CONFIG_TI_SCI_PROTOCOL=y
@@ -97,5 +111,18 @@ CONFIG_CADENCE_QSPI=y
 CONFIG_SYSRESET=y
 CONFIG_SPL_SYSRESET=y
 CONFIG_SYSRESET_TI_SCI=y
+CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
+CONFIG_SPL_DM_USB_GADGET=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_SPL_USB_DWC3_GENERIC=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0x6165
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig
index 7350882a36f..3ac54e50472 100644
--- a/configs/am62x_evm_r5_defconfig
+++ b/configs/am62x_evm_r5_defconfig
@@ -7,6 +7,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SOC_K3_AM625=y
 CONFIG_TARGET_AM625_R5_EVM=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7000ffff
 CONFIG_ENV_SIZE=0x20000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_DM_SPI=y
@@ -21,8 +23,6 @@ CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7000ffff
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
@@ -41,6 +41,7 @@ CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000
 CONFIG_SPL_EARLY_BSS=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
+CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_DM_MAILBOX=y
 CONFIG_SPL_DM_SPI_FLASH=y
 CONFIG_SPL_DM_RESET=y
@@ -52,6 +53,8 @@ CONFIG_SPL_REMOTEPROC=y
 CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_DFU=y
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
@@ -71,17 +74,20 @@ CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
 CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_SPL_CLK_CCF=y
 CONFIG_SPL_CLK_K3_PLL=y
 CONFIG_SPL_CLK_K3=y
+CONFIG_SYS_DFU_DATA_BUF_SIZE=0x5000
 CONFIG_TI_SCI_PROTOCOL=y
 CONFIG_DA8XX_GPIO=y
 CONFIG_DM_MAILBOX=y
 CONFIG_K3_SEC_PROXY=y
-CONFIG_SPL_MISC=y
+CONFIG_MISC=y
 CONFIG_ESM_K3=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ADMA=y
@@ -117,5 +123,19 @@ CONFIG_CADENCE_QSPI=y
 CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
 CONFIG_OMAP_TIMER=y
+CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
+CONFIG_SPL_DM_USB_GADGET=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_SPL_USB_DWC3_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0x6165
+CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_LIB_RATIONAL=y
 CONFIG_SPL_LIB_RATIONAL=y
-- 
2.39.0