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From: Joerg Roedel <joro@8bytes.org>
To: "Raj, Ashok" <ashok.raj@intel.com>
Cc: kevin.tian@intel.com, sanjay.k.kumar@intel.com,
	linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org,
	jacob.jun.pan@intel.com, Will Deacon <will@kernel.org>
Subject: Re: [PATCH 2/5] iommu/vt-d: Remove WO permissions on second-level paging entries
Date: Thu, 18 Mar 2021 10:12:46 +0100	[thread overview]
Message-ID: <YFMZjiGT13S2TZ6H@8bytes.org> (raw)
In-Reply-To: <20210308194746.GA15436@otc-nc-03>

Hi,

On Mon, Mar 08, 2021 at 11:47:46AM -0800, Raj, Ashok wrote:
> That is the primary motivation, given that we have moved to 1st level for
> general IOVA, first level doesn't have a WO mapping. I didn't know enough
> about the history to determine if a WO without a READ is very useful. I
> guess the ZLR was invented to support those cases without a READ in PCIe. I

Okay, please update the commit message and re-send. I guess these
patches are 5.13 stuff. In that case, Baolu can include them into his
pull request later this cycle.

Regards,

	Joerg
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Joerg Roedel <joro@8bytes.org>
To: "Raj, Ashok" <ashok.raj@intel.com>
Cc: Lu Baolu <baolu.lu@linux.intel.com>,
	Will Deacon <will@kernel.org>,
	kevin.tian@intel.com, jacob.jun.pan@intel.com,
	yi.l.liu@intel.com, sanjay.k.kumar@intel.com,
	iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/5] iommu/vt-d: Remove WO permissions on second-level paging entries
Date: Thu, 18 Mar 2021 10:12:46 +0100	[thread overview]
Message-ID: <YFMZjiGT13S2TZ6H@8bytes.org> (raw)
In-Reply-To: <20210308194746.GA15436@otc-nc-03>

Hi,

On Mon, Mar 08, 2021 at 11:47:46AM -0800, Raj, Ashok wrote:
> That is the primary motivation, given that we have moved to 1st level for
> general IOVA, first level doesn't have a WO mapping. I didn't know enough
> about the history to determine if a WO without a READ is very useful. I
> guess the ZLR was invented to support those cases without a READ in PCIe. I

Okay, please update the commit message and re-send. I guess these
patches are 5.13 stuff. In that case, Baolu can include them into his
pull request later this cycle.

Regards,

	Joerg

  reply	other threads:[~2021-03-18  9:12 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-25  6:26 [PATCH 0/5] iommu/vt-d: Several misc fixes Lu Baolu
2021-02-25  6:26 ` Lu Baolu
2021-02-25  6:26 ` [PATCH 1/5] iommu/vt-d: Report the right page fault address Lu Baolu
2021-02-25  6:26   ` Lu Baolu
2021-02-25  6:26 ` [PATCH 2/5] iommu/vt-d: Remove WO permissions on second-level paging entries Lu Baolu
2021-02-25  6:26   ` Lu Baolu
2021-03-04 12:26   ` Joerg Roedel
2021-03-04 12:26     ` Joerg Roedel
2021-03-08  1:58     ` Lu Baolu
2021-03-08  1:58       ` Lu Baolu
2021-03-08 19:47       ` Raj, Ashok
2021-03-08 19:47         ` Raj, Ashok
2021-03-18  9:12         ` Joerg Roedel [this message]
2021-03-18  9:12           ` Joerg Roedel
2021-03-19  0:24           ` Lu Baolu
2021-03-19  0:24             ` Lu Baolu
2021-02-25  6:26 ` [PATCH 3/5] iommu/vt-d: Invalidate PASID cache when root/context entry changed Lu Baolu
2021-02-25  6:26   ` Lu Baolu
2021-02-25  6:26 ` [PATCH 4/5] iommu/vt-d: Use user privilege for RID2PASID translation Lu Baolu
2021-02-25  6:26   ` Lu Baolu
2021-02-25  6:26 ` [PATCH 5/5] iommu/vt-d: Avoid unnecessary cache flush in pasid entry teardown Lu Baolu
2021-02-25  6:26   ` Lu Baolu

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