All of lore.kernel.org
 help / color / mirror / Atom feed
From: Joerg Roedel <joro@8bytes.org>
To: Nadav Amit <nadav.amit@gmail.com>
Cc: Nadav Amit <namit@vmware.com>,
	iommu@lists.linux-foundation.org, Will Deacon <will@kernel.org>,
	Jiajun Cao <caojiajun@vmware.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] iommu/amd: page-specific invalidations for more than one page
Date: Wed, 7 Apr 2021 12:01:07 +0200	[thread overview]
Message-ID: <YG2C42UdIEsWex2L@8bytes.org> (raw)
In-Reply-To: <20210323210619.513069-1-namit@vmware.com>

On Tue, Mar 23, 2021 at 02:06:19PM -0700, Nadav Amit wrote:
> From: Nadav Amit <namit@vmware.com>
> 
> Currently, IOMMU invalidations and device-IOTLB invalidations using
> AMD IOMMU fall back to full address-space invalidation if more than a
> single page need to be flushed.
> 
> Full flushes are especially inefficient when the IOMMU is virtualized by
> a hypervisor, since it requires the hypervisor to synchronize the entire
> address-space.
> 
> AMD IOMMUs allow to provide a mask to perform page-specific
> invalidations for multiple pages that match the address. The mask is
> encoded as part of the address, and the first zero bit in the address
> (in bits [51:12]) indicates the mask size.
> 
> Use this hardware feature to perform selective IOMMU and IOTLB flushes.
> Combine the logic between both for better code reuse.
> 
> The IOMMU invalidations passed a smoke-test. The device IOTLB
> invalidations are untested.

Have you thoroughly tested this on real hardware? I had a patch-set
doing the same many years ago and it lead to data corruption under load.
Back then it could have been a bug in my code of course, but it made me
cautious about using targeted invalidations.

Regards,

	Joerg

_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Joerg Roedel <joro@8bytes.org>
To: Nadav Amit <nadav.amit@gmail.com>
Cc: Will Deacon <will@kernel.org>, Nadav Amit <namit@vmware.com>,
	Jiajun Cao <caojiajun@vmware.com>,
	iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] iommu/amd: page-specific invalidations for more than one page
Date: Wed, 7 Apr 2021 12:01:07 +0200	[thread overview]
Message-ID: <YG2C42UdIEsWex2L@8bytes.org> (raw)
In-Reply-To: <20210323210619.513069-1-namit@vmware.com>

On Tue, Mar 23, 2021 at 02:06:19PM -0700, Nadav Amit wrote:
> From: Nadav Amit <namit@vmware.com>
> 
> Currently, IOMMU invalidations and device-IOTLB invalidations using
> AMD IOMMU fall back to full address-space invalidation if more than a
> single page need to be flushed.
> 
> Full flushes are especially inefficient when the IOMMU is virtualized by
> a hypervisor, since it requires the hypervisor to synchronize the entire
> address-space.
> 
> AMD IOMMUs allow to provide a mask to perform page-specific
> invalidations for multiple pages that match the address. The mask is
> encoded as part of the address, and the first zero bit in the address
> (in bits [51:12]) indicates the mask size.
> 
> Use this hardware feature to perform selective IOMMU and IOTLB flushes.
> Combine the logic between both for better code reuse.
> 
> The IOMMU invalidations passed a smoke-test. The device IOTLB
> invalidations are untested.

Have you thoroughly tested this on real hardware? I had a patch-set
doing the same many years ago and it lead to data corruption under load.
Back then it could have been a bug in my code of course, but it made me
cautious about using targeted invalidations.

Regards,

	Joerg


  reply	other threads:[~2021-04-07 10:01 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-23 21:06 [PATCH] iommu/amd: page-specific invalidations for more than one page Nadav Amit
2021-03-23 21:06 ` Nadav Amit
2021-04-07 10:01 ` Joerg Roedel [this message]
2021-04-07 10:01   ` Joerg Roedel
2021-04-07 17:57   ` Nadav Amit
2021-04-07 17:57     ` Nadav Amit
2021-04-08  7:18     ` Joerg Roedel
2021-04-08  7:18       ` Joerg Roedel
2021-04-08 10:29       ` Nadav Amit
2021-04-08 10:29         ` Nadav Amit
2021-04-08 13:23         ` Joerg Roedel
2021-04-08 13:23           ` Joerg Roedel
2021-04-08 15:16 ` Joerg Roedel
2021-04-08 15:16   ` Joerg Roedel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=YG2C42UdIEsWex2L@8bytes.org \
    --to=joro@8bytes.org \
    --cc=caojiajun@vmware.com \
    --cc=iommu@lists.linux-foundation.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=nadav.amit@gmail.com \
    --cc=namit@vmware.com \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.