* [PATCH 0/2] arm64: dts: renesas: Fix CSI-2 validation errors
@ 2021-04-21 15:02 Niklas Söderlund
2021-04-21 15:02 ` [PATCH 1/2] arm64: dts: renesas: aistarvision-mipi-adapter-2.1: Fix CSI40 ports Niklas Söderlund
2021-04-21 15:02 ` [PATCH 2/2] arm64: dts: renesas: Add port@0 node for all CSI-2 nodes to dtsi Niklas Söderlund
0 siblings, 2 replies; 7+ messages in thread
From: Niklas Söderlund @ 2021-04-21 15:02 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Laurent Pinchart, linux-renesas-soc, Niklas Söderlund
Hi Geert,
This series fixes all current validation warnings/errors touching CSI-2
nodes. Patch 1/2 fixes an unspecified port while patch 2/2 deals with
the fallout of [1] that made the port@0 node explicitly mandatory.
Tested on-top of latest renesas-drivers for all in tree DTB files with
'make dtbs_check'.
1. commit 066a94e28a23e04c ("media: dt-bindings: media: Use graph and video-interfaces schemas")
Niklas Söderlund (2):
arm64: dts: renesas: aistarvision-mipi-adapter-2.1: Fix CSI40 ports
arm64: dts: renesas: Add port@0 node for all CSI-2 nodes to dtsi
...hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi | 2 --
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 8 ++++++++
arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 8 ++++++++
.../boot/dts/renesas/r8a774c0-ek874-mipi-2.1.dts | 2 +-
arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 4 ++++
arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 8 ++++++++
arch/arm64/boot/dts/renesas/r8a77950.dtsi | 4 ++++
arch/arm64/boot/dts/renesas/r8a77951.dtsi | 12 ++++++++++++
arch/arm64/boot/dts/renesas/r8a77960.dtsi | 8 ++++++++
arch/arm64/boot/dts/renesas/r8a77961.dtsi | 8 ++++++++
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 8 ++++++++
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 4 ++++
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 8 ++++++++
arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts | 2 --
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 4 ++++
arch/arm64/boot/dts/renesas/salvator-common.dtsi | 3 ---
16 files changed, 85 insertions(+), 8 deletions(-)
--
2.31.1
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 1/2] arm64: dts: renesas: aistarvision-mipi-adapter-2.1: Fix CSI40 ports 2021-04-21 15:02 [PATCH 0/2] arm64: dts: renesas: Fix CSI-2 validation errors Niklas Söderlund @ 2021-04-21 15:02 ` Niklas Söderlund 2021-04-25 18:48 ` Geert Uytterhoeven 2021-04-27 0:20 ` Laurent Pinchart 2021-04-21 15:02 ` [PATCH 2/2] arm64: dts: renesas: Add port@0 node for all CSI-2 nodes to dtsi Niklas Söderlund 1 sibling, 2 replies; 7+ messages in thread From: Niklas Söderlund @ 2021-04-21 15:02 UTC (permalink / raw) To: Geert Uytterhoeven Cc: Laurent Pinchart, linux-renesas-soc, Niklas Söderlund Fix the DTS schema by explicitly stating that the input is port@0. This fixes a schema validation error but have no runtime effect as the default port number is 0 if not specified. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> --- arch/arm64/boot/dts/renesas/r8a774c0-ek874-mipi-2.1.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/r8a774c0-ek874-mipi-2.1.dts b/arch/arm64/boot/dts/renesas/r8a774c0-ek874-mipi-2.1.dts index e7b4a929bb174840..2e3d1981cac48144 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0-ek874-mipi-2.1.dts +++ b/arch/arm64/boot/dts/renesas/r8a774c0-ek874-mipi-2.1.dts @@ -33,7 +33,7 @@ &csi40 { status = "okay"; ports { - port { + port@0 { csi40_in: endpoint { clock-lanes = <0>; data-lanes = <1 2>; -- 2.31.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] arm64: dts: renesas: aistarvision-mipi-adapter-2.1: Fix CSI40 ports 2021-04-21 15:02 ` [PATCH 1/2] arm64: dts: renesas: aistarvision-mipi-adapter-2.1: Fix CSI40 ports Niklas Söderlund @ 2021-04-25 18:48 ` Geert Uytterhoeven 2021-04-27 0:20 ` Laurent Pinchart 1 sibling, 0 replies; 7+ messages in thread From: Geert Uytterhoeven @ 2021-04-25 18:48 UTC (permalink / raw) To: Niklas Söderlund; +Cc: Laurent Pinchart, Linux-Renesas On Wed, Apr 21, 2021 at 5:02 PM Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> wrote: > Fix the DTS schema by explicitly stating that the input is port@0. This > fixes a schema validation error but have no runtime effect as the > default port number is 0 if not specified. > > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v5.13. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] arm64: dts: renesas: aistarvision-mipi-adapter-2.1: Fix CSI40 ports 2021-04-21 15:02 ` [PATCH 1/2] arm64: dts: renesas: aistarvision-mipi-adapter-2.1: Fix CSI40 ports Niklas Söderlund 2021-04-25 18:48 ` Geert Uytterhoeven @ 2021-04-27 0:20 ` Laurent Pinchart 1 sibling, 0 replies; 7+ messages in thread From: Laurent Pinchart @ 2021-04-27 0:20 UTC (permalink / raw) To: Niklas Söderlund; +Cc: Geert Uytterhoeven, linux-renesas-soc Hi Niklas, Thank you for the patch. On Wed, Apr 21, 2021 at 05:02:20PM +0200, Niklas Söderlund wrote: > Fix the DTS schema by explicitly stating that the input is port@0. This > fixes a schema validation error but have no runtime effect as the > default port number is 0 if not specified. > > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > arch/arm64/boot/dts/renesas/r8a774c0-ek874-mipi-2.1.dts | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/renesas/r8a774c0-ek874-mipi-2.1.dts b/arch/arm64/boot/dts/renesas/r8a774c0-ek874-mipi-2.1.dts > index e7b4a929bb174840..2e3d1981cac48144 100644 > --- a/arch/arm64/boot/dts/renesas/r8a774c0-ek874-mipi-2.1.dts > +++ b/arch/arm64/boot/dts/renesas/r8a774c0-ek874-mipi-2.1.dts > @@ -33,7 +33,7 @@ &csi40 { > status = "okay"; > > ports { > - port { > + port@0 { > csi40_in: endpoint { > clock-lanes = <0>; > data-lanes = <1 2>; -- Regards, Laurent Pinchart ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 2/2] arm64: dts: renesas: Add port@0 node for all CSI-2 nodes to dtsi 2021-04-21 15:02 [PATCH 0/2] arm64: dts: renesas: Fix CSI-2 validation errors Niklas Söderlund 2021-04-21 15:02 ` [PATCH 1/2] arm64: dts: renesas: aistarvision-mipi-adapter-2.1: Fix CSI40 ports Niklas Söderlund @ 2021-04-21 15:02 ` Niklas Söderlund 2021-04-25 18:48 ` Geert Uytterhoeven 2021-04-27 0:26 ` Laurent Pinchart 1 sibling, 2 replies; 7+ messages in thread From: Niklas Söderlund @ 2021-04-21 15:02 UTC (permalink / raw) To: Geert Uytterhoeven Cc: Laurent Pinchart, linux-renesas-soc, Niklas Söderlund The port@0 is a mandatory port, add or move the declaration to the CSI-2 nodes top declared in dtsi files instead of depending on dts files adding them when describing the external connection. This fixes validation warnings for DTB outputs that does not connect all CSI-2 receivers to transmitters and thus declaring all port@0 nodes in dts files. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> --- ...hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi | 2 -- arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 8 ++++++++ arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 8 ++++++++ arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 4 ++++ arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 8 ++++++++ arch/arm64/boot/dts/renesas/r8a77950.dtsi | 4 ++++ arch/arm64/boot/dts/renesas/r8a77951.dtsi | 12 ++++++++++++ arch/arm64/boot/dts/renesas/r8a77960.dtsi | 8 ++++++++ arch/arm64/boot/dts/renesas/r8a77961.dtsi | 8 ++++++++ arch/arm64/boot/dts/renesas/r8a77965.dtsi | 8 ++++++++ arch/arm64/boot/dts/renesas/r8a77970.dtsi | 4 ++++ arch/arm64/boot/dts/renesas/r8a77980.dtsi | 8 ++++++++ arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts | 2 -- arch/arm64/boot/dts/renesas/r8a77990.dtsi | 4 ++++ arch/arm64/boot/dts/renesas/salvator-common.dtsi | 3 --- 15 files changed, 84 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi index c62ddb9b2ba565e9..3771144a2ce49a45 100644 --- a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi +++ b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi @@ -14,7 +14,6 @@ &csi20 { ports { port@0 { - reg = <0>; csi20_in: endpoint { clock-lanes = <0>; data-lanes = <1 2>; @@ -29,7 +28,6 @@ &csi40 { ports { port@0 { - reg = <0>; csi40_in: endpoint { clock-lanes = <0>; data-lanes = <1 2>; diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi index d64fb8b1b86c3731..46f8dbf6890482d9 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi @@ -2573,6 +2573,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; @@ -2628,6 +2632,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi index 5b05474dc2727884..d16a4be5ef77a21b 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi @@ -2419,6 +2419,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; @@ -2474,6 +2478,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi index 20fa3caa050e5d5e..1aef34447abd1b3d 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi @@ -1823,6 +1823,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi index 8eb006cbd9af4c98..1f51237ab0a648fa 100644 --- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi @@ -2709,6 +2709,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; @@ -2764,6 +2768,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/renesas/r8a77950.dtsi b/arch/arm64/boot/dts/renesas/r8a77950.dtsi index 25b87da32eebb6dc..b643d3079db1e7aa 100644 --- a/arch/arm64/boot/dts/renesas/r8a77950.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77950.dtsi @@ -192,6 +192,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi index 5c39152e45707441..85d66d15465ab2b6 100644 --- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi @@ -3097,6 +3097,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; @@ -3152,6 +3156,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; @@ -3191,6 +3199,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi index 25d947a81b294a81..12476e354d746d0e 100644 --- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi @@ -2761,6 +2761,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; @@ -2816,6 +2820,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi index ab081f14af9aa0fb..d9804768425a7603 100644 --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi @@ -2499,6 +2499,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; @@ -2554,6 +2558,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index 657b20d3533bd398..dcb9df861d749692 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi @@ -2575,6 +2575,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; @@ -2630,6 +2634,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index 5a5d5649332a8b1d..e8f6352c3665f44c 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -1106,6 +1106,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi index 1ffa4a995a7ab8ae..7b51d464de0eac8b 100644 --- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi @@ -1439,6 +1439,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; @@ -1478,6 +1482,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts index 295d34f1d216d963..4715e4a4abe064cd 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts +++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts @@ -298,8 +298,6 @@ &csi40 { ports { port@0 { - reg = <0>; - csi40_in: endpoint { clock-lanes = <0>; data-lanes = <1 2>; diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index 5010f23fafcc7f98..0eaea58f4210d89a 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -1970,6 +1970,10 @@ ports { #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi index e18747df219f8118..453ffcef24fae1be 100644 --- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi +++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi @@ -349,7 +349,6 @@ &csi20 { ports { port@0 { - reg = <0>; csi20_in: endpoint { clock-lanes = <0>; data-lanes = <1>; @@ -364,8 +363,6 @@ &csi40 { ports { port@0 { - reg = <0>; - csi40_in: endpoint { clock-lanes = <0>; data-lanes = <1 2 3 4>; -- 2.31.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] arm64: dts: renesas: Add port@0 node for all CSI-2 nodes to dtsi 2021-04-21 15:02 ` [PATCH 2/2] arm64: dts: renesas: Add port@0 node for all CSI-2 nodes to dtsi Niklas Söderlund @ 2021-04-25 18:48 ` Geert Uytterhoeven 2021-04-27 0:26 ` Laurent Pinchart 1 sibling, 0 replies; 7+ messages in thread From: Geert Uytterhoeven @ 2021-04-25 18:48 UTC (permalink / raw) To: Niklas Söderlund; +Cc: Laurent Pinchart, Linux-Renesas On Wed, Apr 21, 2021 at 5:02 PM Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> wrote: > The port@0 is a mandatory port, add or move the declaration to the CSI-2 > nodes top declared in dtsi files instead of depending on dts files > adding them when describing the external connection. > > This fixes validation warnings for DTB outputs that does not connect all > CSI-2 receivers to transmitters and thus declaring all port@0 nodes in > dts files. > > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v5.13. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] arm64: dts: renesas: Add port@0 node for all CSI-2 nodes to dtsi 2021-04-21 15:02 ` [PATCH 2/2] arm64: dts: renesas: Add port@0 node for all CSI-2 nodes to dtsi Niklas Söderlund 2021-04-25 18:48 ` Geert Uytterhoeven @ 2021-04-27 0:26 ` Laurent Pinchart 1 sibling, 0 replies; 7+ messages in thread From: Laurent Pinchart @ 2021-04-27 0:26 UTC (permalink / raw) To: Niklas Söderlund; +Cc: Geert Uytterhoeven, linux-renesas-soc Hi Niklas, Thank you for the patch. On Wed, Apr 21, 2021 at 05:02:21PM +0200, Niklas Söderlund wrote: > The port@0 is a mandatory port, add or move the declaration to the CSI-2 > nodes top declared in dtsi files instead of depending on dts files > adding them when describing the external connection. > > This fixes validation warnings for DTB outputs that does not connect all > CSI-2 receivers to transmitters and thus declaring all port@0 nodes in > dts files. > > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > --- > ...hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi | 2 -- > arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 8 ++++++++ > arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 8 ++++++++ > arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 4 ++++ > arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 8 ++++++++ > arch/arm64/boot/dts/renesas/r8a77950.dtsi | 4 ++++ > arch/arm64/boot/dts/renesas/r8a77951.dtsi | 12 ++++++++++++ > arch/arm64/boot/dts/renesas/r8a77960.dtsi | 8 ++++++++ > arch/arm64/boot/dts/renesas/r8a77961.dtsi | 8 ++++++++ > arch/arm64/boot/dts/renesas/r8a77965.dtsi | 8 ++++++++ > arch/arm64/boot/dts/renesas/r8a77970.dtsi | 4 ++++ > arch/arm64/boot/dts/renesas/r8a77980.dtsi | 8 ++++++++ > arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts | 2 -- > arch/arm64/boot/dts/renesas/r8a77990.dtsi | 4 ++++ > arch/arm64/boot/dts/renesas/salvator-common.dtsi | 3 --- > 15 files changed, 84 insertions(+), 7 deletions(-) > > diff --git a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi > index c62ddb9b2ba565e9..3771144a2ce49a45 100644 > --- a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi > +++ b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi > @@ -14,7 +14,6 @@ &csi20 { > > ports { > port@0 { > - reg = <0>; > csi20_in: endpoint { > clock-lanes = <0>; > data-lanes = <1 2>; > @@ -29,7 +28,6 @@ &csi40 { > > ports { > port@0 { > - reg = <0>; > csi40_in: endpoint { > clock-lanes = <0>; > data-lanes = <1 2>; > diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi > index d64fb8b1b86c3731..46f8dbf6890482d9 100644 > --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi > @@ -2573,6 +2573,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; I wonder if we should also add #address-cells and #size-cells. That could simplify the board DT files, but on the other hand, as this is a CSI-2 input, having multiple endpoints would probably be very rare. It's probably good enough to leave it as-is. Trusting that you've addressed all occurrences, Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > @@ -2628,6 +2632,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi > index 5b05474dc2727884..d16a4be5ef77a21b 100644 > --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi > @@ -2419,6 +2419,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > @@ -2474,6 +2478,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi > index 20fa3caa050e5d5e..1aef34447abd1b3d 100644 > --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi > @@ -1823,6 +1823,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi > index 8eb006cbd9af4c98..1f51237ab0a648fa 100644 > --- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi > @@ -2709,6 +2709,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > @@ -2764,6 +2768,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > diff --git a/arch/arm64/boot/dts/renesas/r8a77950.dtsi b/arch/arm64/boot/dts/renesas/r8a77950.dtsi > index 25b87da32eebb6dc..b643d3079db1e7aa 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77950.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77950.dtsi > @@ -192,6 +192,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi > index 5c39152e45707441..85d66d15465ab2b6 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi > @@ -3097,6 +3097,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > @@ -3152,6 +3156,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > @@ -3191,6 +3199,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi > index 25d947a81b294a81..12476e354d746d0e 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi > @@ -2761,6 +2761,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > @@ -2816,6 +2820,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi > index ab081f14af9aa0fb..d9804768425a7603 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi > @@ -2499,6 +2499,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > @@ -2554,6 +2558,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi > index 657b20d3533bd398..dcb9df861d749692 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi > @@ -2575,6 +2575,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > @@ -2630,6 +2634,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi > index 5a5d5649332a8b1d..e8f6352c3665f44c 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi > @@ -1106,6 +1106,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi > index 1ffa4a995a7ab8ae..7b51d464de0eac8b 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi > @@ -1439,6 +1439,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > @@ -1478,6 +1482,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts > index 295d34f1d216d963..4715e4a4abe064cd 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts > +++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts > @@ -298,8 +298,6 @@ &csi40 { > > ports { > port@0 { > - reg = <0>; > - > csi40_in: endpoint { > clock-lanes = <0>; > data-lanes = <1 2>; > diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi > index 5010f23fafcc7f98..0eaea58f4210d89a 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi > @@ -1970,6 +1970,10 @@ ports { > #address-cells = <1>; > #size-cells = <0>; > > + port@0 { > + reg = <0>; > + }; > + > port@1 { > #address-cells = <1>; > #size-cells = <0>; > diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi > index e18747df219f8118..453ffcef24fae1be 100644 > --- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi > +++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi > @@ -349,7 +349,6 @@ &csi20 { > > ports { > port@0 { > - reg = <0>; > csi20_in: endpoint { > clock-lanes = <0>; > data-lanes = <1>; > @@ -364,8 +363,6 @@ &csi40 { > > ports { > port@0 { > - reg = <0>; > - > csi40_in: endpoint { > clock-lanes = <0>; > data-lanes = <1 2 3 4>; -- Regards, Laurent Pinchart ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2021-04-27 0:26 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2021-04-21 15:02 [PATCH 0/2] arm64: dts: renesas: Fix CSI-2 validation errors Niklas Söderlund 2021-04-21 15:02 ` [PATCH 1/2] arm64: dts: renesas: aistarvision-mipi-adapter-2.1: Fix CSI40 ports Niklas Söderlund 2021-04-25 18:48 ` Geert Uytterhoeven 2021-04-27 0:20 ` Laurent Pinchart 2021-04-21 15:02 ` [PATCH 2/2] arm64: dts: renesas: Add port@0 node for all CSI-2 nodes to dtsi Niklas Söderlund 2021-04-25 18:48 ` Geert Uytterhoeven 2021-04-27 0:26 ` Laurent Pinchart
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