Re: [Intel-gfx] [PATCH] drm/i915/adl_p: enable MSO on pipe B

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Wed, May 26, 2021 at 11:29:03AM +0300, Jani Nikula wrote:
> On ADL-P, it's possible to enable the stream splitter on pipe B in
> addition to pipe A.
> 
> Bspec: 50174
> Cc: Uma Shankar <uma.shankar@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

I have a feeling I reviewed this already. But maybe I'm just
imagining it.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 3d8918674153..4d6f1a206f56 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4729,9 +4729,12 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
>  
>  		dig_port->hpd_pulse = intel_dp_hpd_pulse;
>  
> -		/* Splitter enable for eDP MSO is supported for pipe A only. */
> -		if (dig_port->dp.mso_link_count)
> +		/* Splitter enable for eDP MSO is limited to certain pipes. */
> +		if (dig_port->dp.mso_link_count) {
>  			encoder->pipe_mask = BIT(PIPE_A);
> +			if (IS_ALDERLAKE_P(dev_priv))
> +				encoder->pipe_mask |= BIT(PIPE_B);
> +		}
>  	}
>  
>  	/* In theory we don't need the encoder->type check, but leave it just in
> -- 
> 2.20.1

-- 
Ville Syrjälä
Intel
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