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From: Abel Vesa <abel.vesa@nxp.com>
To: Dong Aisheng <dongas86@gmail.com>
Cc: Abel Vesa <abelvesa@kernel.org>, Rob Herring <robh@kernel.org>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>, Jacky Bai <ping.bai@nxp.com>,
	Dong Aisheng <aisheng.dong@nxp.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	devicetree <devicetree@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
	<linux-arm-kernel@lists.infradead.org>,
	Clark Wang <xiaoning.wang@nxp.com>
Subject: Re: [PATCH 3/7] arm64: dts: freescale: Add adma subsystem dtsi for imx8dxl
Date: Wed, 2 Jun 2021 14:28:43 +0300	[thread overview]
Message-ID: <YLdra2JOW+/peGch@ryzen.lan> (raw)
In-Reply-To: <CAA+hA=R1-JJ+uwa0qio-twUnFW7CYDPaj26CmwuoFcP0oXcNtQ@mail.gmail.com>

On 21-05-18 15:52:00, Dong Aisheng wrote:
> On Tue, May 18, 2021 at 1:15 AM <abelvesa@kernel.org> wrote:
> >
> > From: Abel Vesa <abel.vesa@nxp.com>
> >
> > Override the I2Cs, LPUARTs, audio_ipg_clk and dma_ipg_clk with
> > the i.MX8DXL specific properties.
> >
> > Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
> > Signed-off-by: Jacky Bai <ping.bai@nxp.com>
> > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> 
> Please add dt-binding update as well.
> Better along with this patch series
> 

Will do in the next version.

> > ---
> >  .../boot/dts/freescale/imx8dxl-ss-adma.dtsi   | 53 +++++++++++++++++++
> >  1 file changed, 53 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
> > new file mode 100644
> > index 000000000000..12ccbc6587ca
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
> > @@ -0,0 +1,53 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright 2019-2021 NXP
> > + */
> > +
> > +&audio_ipg_clk {
> > +       clock-frequency = <160000000>;
> > +};
> > +
> > +&dma_ipg_clk {
> > +       clock-frequency = <160000000>;
> > +};
> > +
> > +&i2c0 {
> > +       compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
> > +       interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&i2c1 {
> > +       compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
> > +       interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&i2c2 {
> > +       compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
> > +       interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&i2c3 {
> > +       compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
> > +       interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&lpuart0 {
> > +       compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
> > +       interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&lpuart1 {
> > +       compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
> > +       interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&lpuart2 {
> > +       compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
> > +       interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&lpuart3 {
> > +       compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
> > +       interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > --
> > 2.31.1
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel@lists.infradead.org
> > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Flists.infradead.org%2Fmailman%2Flistinfo%2Flinux-arm-kernel&amp;data=04%7C01%7Cabel.vesa%40nxp.com%7Cc94d080848a648df0ad708d919d1f75f%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637569211861760914%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=J6uUG1sc6bXk2MNXKtBzH1AjIb%2FsmeXCw4Ww%2BqvrixQ%3D&amp;reserved=0

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WARNING: multiple messages have this Message-ID (diff)
From: Abel Vesa <abel.vesa@nxp.com>
To: Dong Aisheng <dongas86@gmail.com>
Cc: Abel Vesa <abelvesa@kernel.org>, Rob Herring <robh@kernel.org>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>, Jacky Bai <ping.bai@nxp.com>,
	Dong Aisheng <aisheng.dong@nxp.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	devicetree <devicetree@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
	<linux-arm-kernel@lists.infradead.org>,
	Clark Wang <xiaoning.wang@nxp.com>
Subject: Re: [PATCH 3/7] arm64: dts: freescale: Add adma subsystem dtsi for imx8dxl
Date: Wed, 2 Jun 2021 14:28:43 +0300	[thread overview]
Message-ID: <YLdra2JOW+/peGch@ryzen.lan> (raw)
In-Reply-To: <CAA+hA=R1-JJ+uwa0qio-twUnFW7CYDPaj26CmwuoFcP0oXcNtQ@mail.gmail.com>

On 21-05-18 15:52:00, Dong Aisheng wrote:
> On Tue, May 18, 2021 at 1:15 AM <abelvesa@kernel.org> wrote:
> >
> > From: Abel Vesa <abel.vesa@nxp.com>
> >
> > Override the I2Cs, LPUARTs, audio_ipg_clk and dma_ipg_clk with
> > the i.MX8DXL specific properties.
> >
> > Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
> > Signed-off-by: Jacky Bai <ping.bai@nxp.com>
> > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> 
> Please add dt-binding update as well.
> Better along with this patch series
> 

Will do in the next version.

> > ---
> >  .../boot/dts/freescale/imx8dxl-ss-adma.dtsi   | 53 +++++++++++++++++++
> >  1 file changed, 53 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
> > new file mode 100644
> > index 000000000000..12ccbc6587ca
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
> > @@ -0,0 +1,53 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright 2019-2021 NXP
> > + */
> > +
> > +&audio_ipg_clk {
> > +       clock-frequency = <160000000>;
> > +};
> > +
> > +&dma_ipg_clk {
> > +       clock-frequency = <160000000>;
> > +};
> > +
> > +&i2c0 {
> > +       compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
> > +       interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&i2c1 {
> > +       compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
> > +       interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&i2c2 {
> > +       compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
> > +       interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&i2c3 {
> > +       compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
> > +       interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&lpuart0 {
> > +       compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
> > +       interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&lpuart1 {
> > +       compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
> > +       interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&lpuart2 {
> > +       compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
> > +       interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > +&lpuart3 {
> > +       compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
> > +       interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
> > +};
> > +
> > --
> > 2.31.1
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel@lists.infradead.org
> > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Flists.infradead.org%2Fmailman%2Flistinfo%2Flinux-arm-kernel&amp;data=04%7C01%7Cabel.vesa%40nxp.com%7Cc94d080848a648df0ad708d919d1f75f%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637569211861760914%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=J6uUG1sc6bXk2MNXKtBzH1AjIb%2FsmeXCw4Ww%2BqvrixQ%3D&amp;reserved=0

  reply	other threads:[~2021-06-02 11:56 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-17 17:11 [PATCH 0/7] arm64: dts: freescale: Add i.MX8DXL support abelvesa
2021-05-17 17:11 ` abelvesa
2021-05-17 17:11 ` [PATCH 1/7] arm64: dts: freescale: Add the top level dtsi support for imx8dxl abelvesa
2021-05-17 17:11   ` abelvesa
2021-05-18  7:35   ` Dong Aisheng
2021-05-18  7:35     ` Dong Aisheng
2021-06-02  9:29     ` Abel Vesa
2021-06-02  9:29       ` Abel Vesa
2021-05-17 17:12 ` [PATCH 2/7] arm64: dts: imx8-ss-lsio: Add mu5a mailbox abelvesa
2021-05-17 17:12   ` abelvesa
2021-05-18  7:50   ` Dong Aisheng
2021-05-18  7:50     ` Dong Aisheng
2021-06-02  9:48     ` Abel Vesa
2021-06-02  9:48       ` Abel Vesa
2021-05-17 17:12 ` [PATCH 3/7] arm64: dts: freescale: Add adma subsystem dtsi for imx8dxl abelvesa
2021-05-17 17:12   ` abelvesa
2021-05-18  7:52   ` Dong Aisheng
2021-05-18  7:52     ` Dong Aisheng
2021-06-02 11:28     ` Abel Vesa [this message]
2021-06-02 11:28       ` Abel Vesa
2021-05-17 17:12 ` [PATCH 4/7] arm64: dts: freescale: Add the imx8dxl connectivity subsys dtsi abelvesa
2021-05-17 17:12   ` abelvesa
2021-05-18  7:53   ` Dong Aisheng
2021-05-18  7:53     ` Dong Aisheng
2021-05-17 17:12 ` [PATCH 5/7] arm64: dts: freescale: Add ddr subsys dtsi for imx8dxl abelvesa
2021-05-17 17:12   ` abelvesa
2021-05-18  7:54   ` Dong Aisheng
2021-05-18  7:54     ` Dong Aisheng
2021-05-17 17:12 ` [PATCH 6/7] arm64: dts: freescale: Add lsio " abelvesa
2021-05-17 17:12   ` abelvesa
2021-05-18  7:55   ` Dong Aisheng
2021-05-18  7:55     ` Dong Aisheng
2021-05-17 17:12 ` [PATCH 7/7] arm64: dts: imx8dxl: Add i.MX8DXL evk board support abelvesa
2021-05-17 17:12   ` abelvesa
2021-05-18  7:57   ` Dong Aisheng
2021-05-18  7:57     ` Dong Aisheng

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