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From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Mark Brown <broonie@kernel.org>
Cc: Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>,
	Tudor Ambarus <tudor.ambarus@microchip.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org
Subject: Re: [PATCH] mtd: spi-nor: intel-spi: Add support for second flash chip
Date: Fri, 4 Jun 2021 17:10:22 +0300	[thread overview]
Message-ID: <YLo0TrtBVEEfXrXH@lahna.fi.intel.com> (raw)
In-Reply-To: <20210604115339.GC4045@sirena.org.uk>

On Fri, Jun 04, 2021 at 12:53:39PM +0100, Mark Brown wrote:
> On Fri, Jun 04, 2021 at 02:28:08PM +0300, Mika Westerberg wrote:
> 
> > Yes, exactly. With ACPI/DT the SPI core handles this after the SPI
> > master device is registered and that would result spi_nor_probe() to be
> > called for the children. However, with this one there is no ACPI node
> > for the controller (it is PCI enumerated) so there would need to be some
> > way to create that child device. In the old days that would be "platform
> > data" but that's pretty much frowned upon these days ;-)
> 
> No, that's totally fine and normal - it's just like probing a MFD, we do
> it all the time for child devices.

Okay, thanks! Then I think I have all the questions answered and can try
to convert the driver over the "SPI MEM" framework.

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Mark Brown <broonie@kernel.org>
Cc: Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>,
	Tudor Ambarus <tudor.ambarus@microchip.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org
Subject: Re: [PATCH] mtd: spi-nor: intel-spi: Add support for second flash chip
Date: Fri, 4 Jun 2021 17:10:22 +0300	[thread overview]
Message-ID: <YLo0TrtBVEEfXrXH@lahna.fi.intel.com> (raw)
In-Reply-To: <20210604115339.GC4045@sirena.org.uk>

On Fri, Jun 04, 2021 at 12:53:39PM +0100, Mark Brown wrote:
> On Fri, Jun 04, 2021 at 02:28:08PM +0300, Mika Westerberg wrote:
> 
> > Yes, exactly. With ACPI/DT the SPI core handles this after the SPI
> > master device is registered and that would result spi_nor_probe() to be
> > called for the children. However, with this one there is no ACPI node
> > for the controller (it is PCI enumerated) so there would need to be some
> > way to create that child device. In the old days that would be "platform
> > data" but that's pretty much frowned upon these days ;-)
> 
> No, that's totally fine and normal - it's just like probing a MFD, we do
> it all the time for child devices.

Okay, thanks! Then I think I have all the questions answered and can try
to convert the driver over the "SPI MEM" framework.

  reply	other threads:[~2021-06-04 14:12 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-25 16:03 [PATCH] mtd: spi-nor: intel-spi: Add support for second flash chip Mika Westerberg
2021-05-25 19:14 ` Pratyush Yadav
2021-05-26  9:12   ` Mika Westerberg
2021-05-26  9:24     ` Mika Westerberg
2021-05-26  9:31       ` Michael Walle
2021-05-26 10:28         ` Mika Westerberg
2021-05-31 11:27           ` Mika Westerberg
2021-06-03 11:07             ` Mika Westerberg
2021-06-03 18:08               ` Pratyush Yadav
2021-06-03 18:08                 ` Pratyush Yadav
2021-06-04 11:28                 ` Mika Westerberg
2021-06-04 11:28                   ` Mika Westerberg
2021-06-04 11:53                   ` Mark Brown
2021-06-04 11:53                     ` Mark Brown
2021-06-04 14:10                     ` Mika Westerberg [this message]
2021-06-04 14:10                       ` Mika Westerberg

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