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From: Rob Herring <robh@kernel.org>
To: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Rob Herring <robh+dt@kernel.org>,
	Masami Hiramatsu <mhiramat@kernel.org>,
	Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 1/2] dt-bindings: nvmem: Extend patternProperties to optionally indicate bit position
Date: Thu, 29 Jul 2021 12:47:34 -0600	[thread overview]
Message-ID: <YQL3xmranCyNH0XO@robh.at.kernel.org> (raw)
In-Reply-To: <1626661864-15473-2-git-send-email-hayashi.kunihiko@socionext.com>

On Mon, 19 Jul 2021 11:31:03 +0900, Kunihiko Hayashi wrote:
> Allow to extend expression of sub nodes to optionally indicate bit
> position. This extension is needed to distinguish between different bit
> positions in the same address.
> 
> For example, there are two nvmem nodes starting with bit 4 and bit 0
> at the same address 0x54. In this case, it can be expressed as follows.
> 
>     trim@54,4 {
>         reg = <0x54 1>;
>         bits = <4 2>;
>     };
>     trim@54,0 {
>         reg = <0x54 1>;
>         bits = <0 4>;
>     };
> 
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
>  Documentation/devicetree/bindings/nvmem/nvmem.yaml | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 

Applied, thanks!

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WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Rob Herring <robh+dt@kernel.org>,
	Masami Hiramatsu <mhiramat@kernel.org>,
	Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 1/2] dt-bindings: nvmem: Extend patternProperties to optionally indicate bit position
Date: Thu, 29 Jul 2021 12:47:34 -0600	[thread overview]
Message-ID: <YQL3xmranCyNH0XO@robh.at.kernel.org> (raw)
In-Reply-To: <1626661864-15473-2-git-send-email-hayashi.kunihiko@socionext.com>

On Mon, 19 Jul 2021 11:31:03 +0900, Kunihiko Hayashi wrote:
> Allow to extend expression of sub nodes to optionally indicate bit
> position. This extension is needed to distinguish between different bit
> positions in the same address.
> 
> For example, there are two nvmem nodes starting with bit 4 and bit 0
> at the same address 0x54. In this case, it can be expressed as follows.
> 
>     trim@54,4 {
>         reg = <0x54 1>;
>         bits = <4 2>;
>     };
>     trim@54,0 {
>         reg = <0x54 1>;
>         bits = <0 4>;
>     };
> 
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
>  Documentation/devicetree/bindings/nvmem/nvmem.yaml | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 

Applied, thanks!

  parent reply	other threads:[~2021-07-29 18:49 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-19  2:31 [PATCH v2 0/2] dt-bindings: Update nvmem and UniPhier eFuse bindings Kunihiko Hayashi
2021-07-19  2:31 ` Kunihiko Hayashi
2021-07-19  2:31 ` [PATCH v2 1/2] dt-bindings: nvmem: Extend patternProperties to optionally indicate bit position Kunihiko Hayashi
2021-07-19  2:31   ` Kunihiko Hayashi
2021-07-29 18:47   ` Rob Herring
2021-07-29 18:47     ` Rob Herring
2021-07-29 18:47   ` Rob Herring [this message]
2021-07-29 18:47     ` Rob Herring
2021-07-19  2:31 ` [PATCH v2 2/2] dt-bindings: nvmem: Convert UniPhier eFuse bindings to json-schema Kunihiko Hayashi
2021-07-19  2:31   ` Kunihiko Hayashi
2021-07-29 18:49   ` Rob Herring
2021-07-29 18:49     ` Rob Herring

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